TW200623290A - Semiconductor package - Google Patents
Semiconductor packageInfo
- Publication number
- TW200623290A TW200623290A TW093140361A TW93140361A TW200623290A TW 200623290 A TW200623290 A TW 200623290A TW 093140361 A TW093140361 A TW 093140361A TW 93140361 A TW93140361 A TW 93140361A TW 200623290 A TW200623290 A TW 200623290A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor package
- passive component
- substrate
- disposed
- semiconductor device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19103—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW093140361A TWI244715B (en) | 2004-12-23 | 2004-12-23 | Semiconductor package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW093140361A TWI244715B (en) | 2004-12-23 | 2004-12-23 | Semiconductor package |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI244715B TWI244715B (en) | 2005-12-01 |
TW200623290A true TW200623290A (en) | 2006-07-01 |
Family
ID=37154871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093140361A TWI244715B (en) | 2004-12-23 | 2004-12-23 | Semiconductor package |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI244715B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI734616B (zh) * | 2020-09-21 | 2021-07-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
TWI787149B (zh) * | 2015-06-24 | 2022-12-21 | 日月光半導體製造股份有限公司 | 半導體封裝及其製造方法 |
-
2004
- 2004-12-23 TW TW093140361A patent/TWI244715B/zh not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI787149B (zh) * | 2015-06-24 | 2022-12-21 | 日月光半導體製造股份有限公司 | 半導體封裝及其製造方法 |
TWI734616B (zh) * | 2020-09-21 | 2021-07-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
Also Published As
Publication number | Publication date |
---|---|
TWI244715B (en) | 2005-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW516141B (en) | Semiconductor device | |
SG148851A1 (en) | Stacked semiconductor packages | |
WO2008149322A3 (en) | Mount for a semiconductor light emitting device | |
TW200511453A (en) | Methods and apparatus for packaging integrated circuit devices | |
EP1662564A4 (en) | SEMICONDUCTOR HOUSING AND PROCESS FOR PRODUCING THE SAME | |
TW200703599A (en) | Offset integrated circuit package-on-package stacking system | |
TW200802789A (en) | Stackable molded packages and methods of making the same | |
TW200608851A (en) | Substrate, semiconductor device, substrate fabricating method, and semiconductor device fabricating method | |
TW200631201A (en) | Semiconductor light-emitting device and method of manufacture | |
TW200631064A (en) | Semiconductor device | |
SG134334A1 (en) | Semiconductor package with passive device integration | |
TW200620657A (en) | Recessed semiconductor device | |
HK1095208A1 (en) | Semiconductor device and method of fabricating thesame | |
WO2007057814A3 (en) | Electronic device comprising a mems element | |
TW200943517A (en) | Semiconductor die package including embedded flip chip | |
WO2010090820A3 (en) | Ic package with capacitors disposed on an interposal layer | |
TW200631188A (en) | Optoelectronic package with wire-protection lid | |
WO2006116162A3 (en) | Semiconductor package | |
WO2004077508A3 (en) | Lead frame with included passive devices | |
TW200627555A (en) | Method for wafer level package | |
WO2008008581A3 (en) | An electronics package with an integrated circuit device having post wafer fabrication integrated passive components | |
TW200634941A (en) | Chip embedded package structure and fabrication method thereof | |
TW200503200A (en) | Chip package structur | |
SG122016A1 (en) | Semiconductor chip package and method of manufacture | |
TW200715424A (en) | Semiconductor device and method of manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |