TW200618552A - Circuit and method for zero offset auto-calibration - Google Patents

Circuit and method for zero offset auto-calibration

Info

Publication number
TW200618552A
TW200618552A TW093136264A TW93136264A TW200618552A TW 200618552 A TW200618552 A TW 200618552A TW 093136264 A TW093136264 A TW 093136264A TW 93136264 A TW93136264 A TW 93136264A TW 200618552 A TW200618552 A TW 200618552A
Authority
TW
Taiwan
Prior art keywords
calibration
signal
circuit
calibration voltage
indicator signal
Prior art date
Application number
TW093136264A
Other languages
English (en)
Other versions
TWI260142B (en
Inventor
Po-Chin Hsu
Original Assignee
Sunplus Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sunplus Technology Co Ltd filed Critical Sunplus Technology Co Ltd
Priority to TW093136264A priority Critical patent/TWI260142B/zh
Priority to US11/161,172 priority patent/US7084792B2/en
Publication of TW200618552A publication Critical patent/TW200618552A/zh
Application granted granted Critical
Publication of TWI260142B publication Critical patent/TWI260142B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • H03M1/1014Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/1023Offset correction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
TW093136264A 2004-11-25 2004-11-25 Circuit and method for zero offset auto-calibration TWI260142B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW093136264A TWI260142B (en) 2004-11-25 2004-11-25 Circuit and method for zero offset auto-calibration
US11/161,172 US7084792B2 (en) 2004-11-25 2005-07-26 Circuit for zero offset auto-calibration and method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093136264A TWI260142B (en) 2004-11-25 2004-11-25 Circuit and method for zero offset auto-calibration

Publications (2)

Publication Number Publication Date
TW200618552A true TW200618552A (en) 2006-06-01
TWI260142B TWI260142B (en) 2006-08-11

Family

ID=36460445

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093136264A TWI260142B (en) 2004-11-25 2004-11-25 Circuit and method for zero offset auto-calibration

Country Status (2)

Country Link
US (1) US7084792B2 (zh)
TW (1) TWI260142B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7187318B1 (en) * 2005-08-08 2007-03-06 National Semiconductor Corporation Pipeline ADC using multiplying DAC and analog delay circuits
JP2011071852A (ja) * 2009-09-28 2011-04-07 Fujitsu Ltd 伝送システムおよび伝送方法
US8390486B2 (en) 2011-05-31 2013-03-05 SK Hynix Inc. Automatic offset adjustment for digital calibration of column parallel single-slope ADCs for image sensors
US8754794B1 (en) * 2012-07-25 2014-06-17 Altera Corporation Methods and apparatus for calibrating pipeline analog-to-digital converters
CN106130551A (zh) * 2015-05-07 2016-11-16 松下知识产权经营株式会社 A/d 转换器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970005828B1 (ko) * 1993-12-31 1997-04-21 김정덕 파이프 라인 구조의 다단 아날로그/디지탈 변환기
US5874909A (en) 1996-02-13 1999-02-23 Texas Instruments Incorporated Analog to digital video converter
US6373424B1 (en) * 1999-12-21 2002-04-16 Texas Instruments Incorporated Method and apparatus for obtaining linearity in a pipelined analog-to-digital converter
US6353405B1 (en) 2000-06-29 2002-03-05 System General Corp. Low distortion video analog-to-digital converter
US6606042B2 (en) * 2001-05-23 2003-08-12 Texas Instruments Incorporated True background calibration of pipelined analog digital converters
US6489904B1 (en) * 2001-07-27 2002-12-03 Fairchild Semiconductor Corporation Pipeline analog-to-digital converter with on-chip digital calibration
US6822601B1 (en) * 2003-07-23 2004-11-23 Silicon Integrated Systems Corp. Background-calibrating pipelined analog-to-digital converter
US6977605B2 (en) * 2003-11-26 2005-12-20 Texas Instruments Incorporated Dummy delay line based DLL and method for clocking in pipeline ADC
US6882292B1 (en) * 2004-01-07 2005-04-19 Analog Devices, Inc. Analog to digital converter with bandwidth tuning circuit
US6967603B1 (en) * 2004-07-19 2005-11-22 Realtek Semiconductor Corp. ADC background calibration timing

Also Published As

Publication number Publication date
US20060109151A1 (en) 2006-05-25
US7084792B2 (en) 2006-08-01
TWI260142B (en) 2006-08-11

Similar Documents

Publication Publication Date Title
TW200642280A (en) Clock synthesizer and method thereof
EP1894302A4 (en) QUICK RESPONSE CURRENT MEASURING SYSTEM AND METHOD
TW200733570A (en) Analog-to-digital converter with alternated correction time
EP2048783A3 (en) Electronic system capable of compensating process, voltage and temperature effects
TW200636754A (en) Clock generator and clock duty cycle correction method
TW200711277A (en) Method for regulating an output signal circuit therefor
WO2008029330A3 (en) Adaptation circuit for controlling a conversion circuit
WO2007108974A3 (en) Multi-path digital power supply controller
TW200718023A (en) Delayed locked loop circuit
GB0616518D0 (en) Wireless receiver and method of saving power
TW200627807A (en) Analog-to-digital converter
EP2264889A3 (en) Method and apparatus for controlling power supply of audio amplifier
WO2004010579A8 (en) Apparatus and method for duty cycle correction
WO2007099579A9 (ja) Ramマクロ、そのタイミング生成回路
TW200625926A (en) Method for adjusting sampling condition of ADC and apparatus thereof
EP2518630A4 (en) SIGNAL DECODING CIRCUIT, WAIT TIME SETTING CIRCUIT, MEMORY CONTROLLER, PROCESSOR, COMPUTER, SIGNAL DECODING METHOD, AND WAIT TIME SETTING METHOD
TW200635224A (en) Digital duty cycle corrector
TW200618552A (en) Circuit and method for zero offset auto-calibration
WO2006076643A3 (en) Clock pulse duty cycle control circuit for a clock fanout chip
CN109861690B (zh) 输出反馈时钟占空比调节装置、方法及系统
WO2008092033A8 (en) Method and apparatus for producing triangular waveform with low audio band noise content
TW200703348A (en) Shift register
GB201020047D0 (en) Audio playback device
CN102281038A (zh) 信号处理装置
WO2008102819A1 (ja) 電子回路及び通信システム