TW200604797A - Cache memory prefetcher - Google Patents
Cache memory prefetcherInfo
- Publication number
- TW200604797A TW200604797A TW094106452A TW94106452A TW200604797A TW 200604797 A TW200604797 A TW 200604797A TW 094106452 A TW094106452 A TW 094106452A TW 94106452 A TW94106452 A TW 94106452A TW 200604797 A TW200604797 A TW 200604797A
- Authority
- TW
- Taiwan
- Prior art keywords
- main memory
- data
- memory
- prefetcher
- access
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6028—Prefetching based on hints or prefetch instructions
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/793,561 US20050198439A1 (en) | 2004-03-04 | 2004-03-04 | Cache memory prefetcher |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200604797A true TW200604797A (en) | 2006-02-01 |
Family
ID=34912086
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094106452A TW200604797A (en) | 2004-03-04 | 2005-03-03 | Cache memory prefetcher |
Country Status (3)
Country | Link |
---|---|
US (1) | US20050198439A1 (zh) |
TW (1) | TW200604797A (zh) |
WO (1) | WO2005088455A2 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI563446B (en) * | 2010-08-30 | 2016-12-21 | Intel Corp | Method and apparatus for fuzzy stride prefetch |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7277991B2 (en) * | 2004-04-12 | 2007-10-02 | International Business Machines Corporation | Method, system, and program for prefetching data into cache |
US7249223B2 (en) * | 2004-08-11 | 2007-07-24 | Freescale Semiconductor, Inc. | Prefetching in a data processing system |
US7437517B2 (en) * | 2005-01-11 | 2008-10-14 | International Business Machines Corporation | Methods and arrangements to manage on-chip memory to reduce memory latency |
US8209488B2 (en) * | 2008-02-01 | 2012-06-26 | International Business Machines Corporation | Techniques for prediction-based indirect data prefetching |
US8161263B2 (en) * | 2008-02-01 | 2012-04-17 | International Business Machines Corporation | Techniques for indirect data prefetching |
US8161264B2 (en) * | 2008-02-01 | 2012-04-17 | International Business Machines Corporation | Techniques for data prefetching using indirect addressing with offset |
US8166277B2 (en) * | 2008-02-01 | 2012-04-24 | International Business Machines Corporation | Data prefetching using indirect addressing |
JP5237671B2 (ja) * | 2008-04-08 | 2013-07-17 | ルネサスエレクトロニクス株式会社 | データプロセッサ |
KR102069273B1 (ko) * | 2013-03-11 | 2020-01-22 | 삼성전자주식회사 | 시스템 온 칩 및 그 동작방법 |
KR101946455B1 (ko) * | 2013-03-14 | 2019-02-11 | 삼성전자주식회사 | 시스템 온-칩 및 이의 동작 방법 |
KR102070136B1 (ko) * | 2013-05-03 | 2020-01-28 | 삼성전자주식회사 | 프리페치를 위한 캐시 제어 장치 및 그 캐시 제어 장치를 이용한 프리페치 방법 |
US10037280B2 (en) * | 2015-05-29 | 2018-07-31 | Qualcomm Incorporated | Speculative pre-fetch of translations for a memory management unit (MMU) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5692168A (en) * | 1994-10-18 | 1997-11-25 | Cyrix Corporation | Prefetch buffer using flow control bit to identify changes of flow within the code stream |
US6484239B1 (en) * | 1997-12-29 | 2002-11-19 | Intel Corporation | Prefetch queue |
US6073215A (en) * | 1998-08-03 | 2000-06-06 | Motorola, Inc. | Data processing system having a data prefetch mechanism and method therefor |
US6233645B1 (en) * | 1998-11-02 | 2001-05-15 | Compaq Computer Corporation | Dynamically disabling speculative prefetch when high priority demand fetch opportunity use is high |
US6317811B1 (en) * | 1999-08-26 | 2001-11-13 | International Business Machines Corporation | Method and system for reissuing load requests in a multi-stream prefetch design |
US6446167B1 (en) * | 1999-11-08 | 2002-09-03 | International Business Machines Corporation | Cache prefetching of L2 and L3 |
-
2004
- 2004-03-04 US US10/793,561 patent/US20050198439A1/en not_active Abandoned
-
2005
- 2005-03-03 WO PCT/US2005/007248 patent/WO2005088455A2/en active Application Filing
- 2005-03-03 TW TW094106452A patent/TW200604797A/zh unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI563446B (en) * | 2010-08-30 | 2016-12-21 | Intel Corp | Method and apparatus for fuzzy stride prefetch |
Also Published As
Publication number | Publication date |
---|---|
WO2005088455A2 (en) | 2005-09-22 |
WO2005088455A3 (en) | 2006-02-23 |
US20050198439A1 (en) | 2005-09-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200604797A (en) | Cache memory prefetcher | |
US7822926B2 (en) | Cache memory | |
EP3238074B1 (en) | Cache accessed using virtual addresses | |
KR101485651B1 (ko) | 메모리 액세스를 정확하게 예측하기 위한 영역 기반 기술 | |
TWI525434B (zh) | 存取統一轉譯後備緩衝器的系統與方法 | |
US7330936B2 (en) | System and method for power efficient memory caching | |
TW200502679A (en) | Access request for a data processing system having no system memory | |
WO2003001384A3 (en) | Fast and accurate cache way selection | |
CN106126441B (zh) | 缓存、缓存数据项的方法 | |
KR101139565B1 (ko) | 인-메모리, 인-페이지 디렉토리 캐시 일관성 기법 | |
GB2422929A (en) | Memory Management System | |
JP2014078248A (ja) | キャッシュされたメモリデータを伴うキャッシュメモリ属性インジケータ | |
US20160019065A1 (en) | Prefetching instructions in a data processing apparatus | |
WO2010004497A1 (en) | Cache management systems and methods | |
KR20080063512A (ko) | 변환 색인 버퍼들(tlbs) 필드의 다중 레벨 갱신 | |
US20150039836A1 (en) | Methods and apparatus related to data processors and caches incorporated in data processors | |
WO2007002803A3 (en) | Preventing multiple translation lookaside buffer accesses for a same page in memory | |
US20100250842A1 (en) | Hybrid region cam for region prefetcher and methods thereof | |
US8015361B2 (en) | Memory-centric page table walker | |
US20040148465A1 (en) | Method and apparatus for reducing the effects of hot spots in cache memories | |
US6324632B1 (en) | Processing a data stream | |
WO2004088461A3 (en) | Local emulation of data ram utilizing write-through cache hardware within a cpu module | |
US20100325358A1 (en) | Data storage protocols to determine items stored and items overwritten in linked data stores | |
WO2006120408A3 (en) | Memory caching in data processing | |
CN108874690A (zh) | 数据预取的实现方法和处理器 |