TW200601050A - Storage structure and method having multi-protocol processor units - Google Patents

Storage structure and method having multi-protocol processor units

Info

Publication number
TW200601050A
TW200601050A TW093134645A TW93134645A TW200601050A TW 200601050 A TW200601050 A TW 200601050A TW 093134645 A TW093134645 A TW 093134645A TW 93134645 A TW93134645 A TW 93134645A TW 200601050 A TW200601050 A TW 200601050A
Authority
TW
Taiwan
Prior art keywords
protocol processor
look
storage structure
bus adapter
host bus
Prior art date
Application number
TW093134645A
Other languages
Chinese (zh)
Other versions
TWI247991B (en
Inventor
Jun-Yao Wang
Chung-Ho Chen
Chao-Lin Su
Chao-Hsien Hsu
Cheng-Yeh Yu
I Cheng Chung
Original Assignee
Ind Tech Res Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ind Tech Res Inst filed Critical Ind Tech Res Inst
Priority to TW93134645A priority Critical patent/TWI247991B/en
Publication of TW200601050A publication Critical patent/TW200601050A/en
Application granted granted Critical
Publication of TWI247991B publication Critical patent/TWI247991B/en

Links

Abstract

A storage structure and method having multi-protocol processor units are disclosed. The storage structure comprises a host CPU, a main memory, a storage device, a switch fabric, and a host bus adapter module. The host bus adapter module includes a plurality of protocol processor nodes for processing frames received from a network, and storing those frames into the storage device. A processing module of the host bus adapter module extracts the session information of each frame and compares it with entries recorded in a look-up table. If the connection information hits one entry of the look-up table, the frame can be bypassed into a corresponding protocol processor node according to the definition of the look-up table. Otherwise, a new entry will be inserted into the look-up table for designating a corresponding protocol processor node.
TW93134645A 2004-06-21 2004-11-12 Storage structure and method having multi-protocol processor units TWI247991B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93134645A TWI247991B (en) 2004-06-21 2004-11-12 Storage structure and method having multi-protocol processor units

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW93117927 2004-06-21
TW93134645A TWI247991B (en) 2004-06-21 2004-11-12 Storage structure and method having multi-protocol processor units

Publications (2)

Publication Number Publication Date
TW200601050A true TW200601050A (en) 2006-01-01
TWI247991B TWI247991B (en) 2006-01-21

Family

ID=37400701

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93134645A TWI247991B (en) 2004-06-21 2004-11-12 Storage structure and method having multi-protocol processor units

Country Status (1)

Country Link
TW (1) TWI247991B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI447546B (en) * 2011-08-17 2014-08-01 Ecolumina Technologies Inc Multi-protocol power switch control network

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI447546B (en) * 2011-08-17 2014-08-01 Ecolumina Technologies Inc Multi-protocol power switch control network

Also Published As

Publication number Publication date
TWI247991B (en) 2006-01-21

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees