TW200524071A - Clamping and de-clamping semiconductor wafers on an electrostatic chuck using wafer inertial confinement by applying a single-phase square wave AC clamping voltage - Google Patents

Abstract

The present invention is directed to a method for clamping a wafer to an electrostatic chuck using a single-phase square wave AC clamping voltage. The method comprises determining a single-phase square wave clamping voltage for the electrostatic chuck, wherein the determination is based, at least in part, on an inertial response time of the wafer. The wafer is placed on the electrostatic chuck, wherein a gap between the electrostatic chuck and the wafer is defined. The determined single-phase square wave clamping voltage is then applied, wherein the wafer is generally clamped to the electrostatic chuck within a predetermined distance, while an amount of electrostatic charge is generally not allowed to accumulate, thereby enabling a fast de-clamping of the wafer.

Description

200524071 IX. Description of the invention: [Applications related to this case] This application is related to US application No. 10/642939, which was filed on August 18, 2003. (Agent's file number 02-IMp- 〇56) The title is "MEMS Based Multi-Polar Electrostatic Chuck", which is incorporated herein by reference. This case is related to the US application No. 10/66118, which was filed on September 12, 2003. Person's profile number 03-IMP-002, titled "Clamping and De-Ciamping

Semiconductor Wafers on a J-R Electrostatic Chuck Having a Micromachined Surface by Using Force Delay in Applying a

"Single-Phase Square Wave AC Clamping Voltage". [Technical Field of the Invention] The present invention is generally related to semiconductor processing systems, and is particularly related to a method that uses a single-phase square-wave AC clamping voltage to clamp and unclamp in Semiconductor wafers on electrostatic chucks utilizing wafer inertia limitation. [Prior Art] Electrostatic chucks (ESC) have been used for a long time based on plasma or vacuum-based semiconductor processes such as etching, Chemical polishing (CVD), ion implantation, etc. Electrostatic chucks include the ability of non-edge repulsion and wafer temperature control, which has proven to be of value in processing semiconductor substrates or wafers such as Shixi wafers. An example of a typical electrostatic chuck includes a dielectric layer placed on a conductive electrode, wherein the half 200524071 conductor wafer is placed on the surface of an electrostatic chuck (for example, the crystal The circle system is placed on the surface of a dielectric layer). During semiconductor processing (such as plasma processing), a clamp The voltage system is usually applied between the wafer and the electrode, wherein the wafer is clamped by electrostatic force with respect to the surface of the chuck. In addition, the wafer can be cooled by introducing a gas such as helium and provided between the wafer and the wafer. Dielectric layer. The temperature of the wafer can be controlled by adjusting the reverse pressure between the wafer and the dielectric layer. Unclamped or unattached wafer from the surface of the chuck, however, it is a kind of Considered in many applications for electrostatic chucks. For example, after clamping power is turned off, the wafer generally "sticks to the chuck surface for a considerable period of time, where the wafer cannot be Conventional wafer lifter removal (for example, 'pins extended through electrostatic chucks are used to lift the wafer from the surface of the dielectric layer). Such wafer de-clamping problems can reduce the productivity of the entire process. It is generally believed that the wafer-unclamping problem occurs when the residual charge induced by the clamping voltage is left on the dielectric layer or the wafer surface, resulting in unnecessary electric fields and clamping force. According to a charge movement model, the residual charge is caused by the movement and accumulation of charges during the box making process, where the charges are accumulated on the surface of the dielectric and / or the wafer is reversed (for example, when the wafer surface contains an isolation layer) . For example, an RC fl memory is used when the child fm ... has been counted to be used to characterize the number of charging / discharging times. These times correspond to one-7 time slots, which usually require individual tanks to be The amount of time to unclamp the wafer. The time constant is determined by the volume resistance of the dielectric layer and the wafer and the dielectric layer, and the space capacitance product between the electrical surface 200524071, which is (1) RC =-p (dielectnc) e0sr ^ ielectric ^ r gap The resistance of the electric layer, cgi7p is the gap capacitance between the wafer and the surface of the chuck, 7 • The volume resistance of the dielectric layer of P (Ae / ecirzc), is the work; The number ㊉r is the dielectric constant of the gap, is the thickness of the dielectric layer, and I is the distance between the gate on the dielectric surface and the wafer surface. For example, for a flat plate For electrostatic chucks, if p (heart / Gajin 1015q, "= 8 85χΐ (Γ) 4] ρ / ⑽, d (dieleciric) = 0.2 mrv, ,,, n ^ a mm, and customer叩 = 3 μιη, we will get the constant '; This constant is a very long charging / discharging time, which means that if the clamping time is longer than the measurement second, the de-clamping time will be at least close to 5900 seconds. Don't disclose a number of reports to alleviate wafer de-clamping problems caused by the use of electrostatic chucks. For example,- The technology involves providing a reverse chirp that is applied before the wafer is removed from the electrostatic chuck, thereby reducing the residual attractive force. However, this reverse voltage is 'generally 15 to 2 times higher than the clamping voltage' and the solution The clamping time is still quite long. Another conventional technique involves providing a low-frequency sinusoidal AC voltage for generating a sine wave field with controlled amplitude and phase. However, this low-frequency sinusoidal AC voltage generally provides lower clamping force. This also results in considerable residual clamping time. Other conventional techniques for de-clamping wafers include determining a relative polarity 200524071 DC oscillating voltage, which is applied to the electrode to cancel the holding effect of the residual electrostatic charge, and therefore The wafer can be released. However, in general, this technology involves a fairly complex timing circuit and does not take into account the effects of wafer inertia, the reverse pressure from the cooling gas, or the overall RC time constant of the electrostatic chuck Therefore, there is a need in the art for a system and method for clamping and de-clamping that can The circular inertia effect, the physical and electric properties of the electrostatic chuck are optimized. '[Abstract] The following content presents a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention It is not intended to verify the key elements of the present invention, nor is it to explain the scope of the present invention. Its purpose is to express some aspects of the present invention in a simplified form, a preface to the content described in more detail later. A present invention overcomes the challenges of the prior art by providing a phase square wave AC voltage to an electrostatic chuck (ESC). For example, the polarity conversion speed of one square = «is faster than that of _ semiconductor wafers. The clamped inertial response is fast. In contrast to known electrostatic chucks, the present invention utilizes a relatively simple and inexpensive device. Compared to some of the conventional f-graphs, the residual charge is removed as quickly as possible. The second aspect of the present invention is to prevent the residual charge as a whole — “... m ^ 馒 first. The better method is as follows Attribute limitation ", and cited a square-wave single-phase alternating current system 200524071, which can be applied to a unipolar or a multipolar electrode electrostatic chuck. The dream can be further reduced to the minimum by adjusting the pulse wave width and the pulse wave rise time of the applied voltage when de-clamping. According to one aspect of the present invention, the method can be applied to flat electrostatic plates and electrostatic chucks according to M, where the semiconductor wafer is clamped and un clamped via a wafer inertia limiting mechanism. By controlling parameters such as an early = phase square wave AC signal rise time, pulse width, and pulse wave repetition rate (prf), the semiconductor wafer can be at least partially secured by the inertial mass of the wafer during voltage conversion. Clamping. And according to another aspect of the present invention, the wafer can be decomposed almost instantaneously after the clamping voltage is turned off 'at least in part because the pulse width during the clamping is short enough to be significantly prevented Charges migrate and accumulate on the dielectric front and / or back surface of the wafer. According to another exemplary aspect of the present invention, the electrostatic chuck may include different forms of electrode patterns, including, for example, a simple single-pole structure for an electro-active environment system or for a vacuum environment. System-a simple: D-shaped bipolar structure. Moreover, the present invention does not require complicated electrode patterns or complicated signal timing control electronic circuits. In order to achieve the above-mentioned and related objects, the present invention includes features hereinafter described in its entirety, and these features will be specifically mentioned in the following section. The following description and the accompanying drawings, which are presented in particular, illustrate embodiments of the invention. However, these embodiments are symbolic, and a few different ways can implement the principles of the present invention. Other objects, advantages and significant features of the invention will become more apparent from the following detailed description of the invention in conjunction with the drawings. [Embodiment]

The present invention is directed to a system and a method for clamping and unclamping a wafer using an electrostatic chuck (ESC). Because of Λ, the present invention will be described with reference to the drawings', wherein like reference numerals are used to refer to like elements in the whole. It must be understood that these levels of explanation are for explicitness only and should not be viewed as a restrictive understanding. Specific details are provided below for the purpose of explanation, 'Big Four', for the purpose of providing an overall understanding of the invention.羽 A -u · a 1... It is obvious to those skilled in the art that the present invention can be implemented without these specific details. " The present invention overcomes the challenges of the prior art by providing a system and a method 'for clamping and unclamping a wafer (eg, a semiconductor

Plate), where a predetermined square wave voltage is applied to the electrostatic chuck, so a selective box wafer is applied to it. According to the present invention—the predetermined square wave power in the exemplary embodiment is often a function of the inertial properties of a wafer, the electro-occurrence properties of the electrostatic clamps, and the inverse effects on the cooling between the wafer and the electrostatic disk.向 压力。 To pressure. See the first picture of the 'Examination Schema', which shows _ an exemplary system and system of the system, where the clamping system contains an electrostatic chuck 105 for selective follow-up of a wafer U0 On it. For example, the voltage source 115 is operated 10 200524071 for selectively supplying the voltage F to the electrostatic chuck 105, wherein the voltage can be used to electrostatically clamp the wafer i to reach the selective voltage. An electrostatic chuck; the surface 120 of the electrical layer 125; and the wafer 120 from the surface 120 of the dielectric layer of an electrostatic chuck. According to an exemplary aspect of the present invention, the electric > 1 source 1 1 5 series is operable to provide a single phase square wave AC clamping voltage = the electrostatic chuck 105. For example, providing a single-phase square wave AC grasping clamp [K 'can minimize the unclamping time for crystal gj i (〇, one of which is related to the pulse width and pulse rise time of the square wave. Operable to de-clamp this time, as will be discussed below. System 100, J port progress includes a gas supply 130, operable to provide a reverse lice body pressure P (see also the cooling gas reaction P Supplying H 13〇 to the pressure center to the wafer β ° β body. For example, it is operable to provide a cold-rolled body (not shown), such as helium, on the surface 12 of the electrostatic chuck 105. And wafer 1. A controller 135, for example, is further operable to control the dust force ρ of the cooling gas, wherein the pressure control system is further operable to control the electrostatic chuck 105 and the wafer The amount of heat transfer between u0. Unit U5, for example, is further operable to control the voltage from an electric source (such as a power supply) to an electrostatic chuck. Provide a square-wave clamped electric Dust K to the electrostatic chuck 105 The method for efficient plutonium and decomposing wafer 110 includes overcoming several problems. For example, a square wave clamped by a factory I was applied to the electrostatic chuck. The 055 system is operable to induce an electrostatic clamping force. 4 On the wafer 110, the wafer is attracted to the surface 120 of the static 200524071 electric chuck. But too ..., the polarity of the thumb voltage V is reversed (for example, when the square-wave clamped electricity repeatedly exceeds 0). Volts), the reverse pressure of the cooling gas 'say exceeds the force of manganese Feic' and the wafer J 10 can accelerate away from the surface of the electrostatic chuck 120. Because of the reverse pressure of the cooling gas; 110 can move a distance z away from the electrostatic central disk 105, if the electrostatic chuck is on the top side, it can be and / or away from the wafer due to other forces, such as gravity (not shown). Wafer & quot 〇 Can't move at an infinite speed v. However, its wafer system is limited by its inertial mass. As described in Newton's second law, ~, ... is the sum of the clamping force and the inverse willingness force, such as Equivalent to the inertial mass of wafer 11 Take the acceleration a of the wafer, where the acceleration is defined as derived from the speed and the distance, which is also the best? It is a function of 1 /, in which it can be determined that the wafer will not be missed for a minimum time (for example, the wafer is limited to an area close to the electrostatic chuck 105). It must be noted that the clamping force F ... And the reverse pressure of the cooling gas. W, for example, usually changes when the clamping voltage M r exceeds. Volts, because the: voltage has a rise time, which is a function of time, and 2 on the wafer When the moon gas product between 110 and the surface 120 of the electrostatic chuck 105 expands or compresses, the reverse pressure is operable to change over time. Mathematically, the inertia-limiting dynamics of an electrostatic chuck can be expressed as follows. The movement of wafer 110 is usually observed by Newton's second law, F = so α, which is only the net force on the wafer. The net force f, for example, can be expressed as the sum of the gas reverse pressure y and the clamping force ΑκΓχ, y, where F is a function of the distance J and time ί, so F (x, t) = Fsas (x, t) -Fesc (x, t) = m ^ ±.开始 At the beginning, when the wafer 110 is not moving, the gas reverse pressure is usually constant, so that a static gas reverse pressure p ... ⑶ Where the household gas reverse pressure (unit is Taoer, Torr), which is applied to the circle of the cold section and the radius of the 4 series wafer. The static clamping force ~ shoulder system is further expressed as follows (4) L 1: R ^ s〇 (k'v〇) 2_ 2 (d + k-gap) 2 The Q series vacuum dielectric constant (such as'. = &Amp; Based on the dielectric constant f1 of the insulating dielectric layer 125, it is related to the surface of the electrostatic chuck and the thickness of the crystal / layer. The static gap length Γ on the surface of U0: 2 is occupied by the cooling gas), and the static gap length M is applied, for example, the surface roughness of the surface m that can be electrically clamped. For example, when the applied single-phase square-wave clamping voltage F exceeds 0 volts, for example, the crystal 1] 110 may lose the clamping force 4 and start: 12 away from the surface of the electrostatic chuck 105. , 哕 中 哕 名 ^ π w U ,, T The rolling body reverse pressure F state is defined as a function of distance X and time /, factory suppression (meaning, 0 =

The function of Fgas (°) -gCip x + gap (5) and the borrowing force is also X and ^ (, 5〇 = 4 ^ £ ^ i (C (6) 2 (“Moxibustion ♦ + 卿)) 2, ⑹ Wherein F⑺ is a clamping voltage across the wafer 105 and the electrode 14 of the electrostatic chuck 105. Alternatively, F⑺ is a clamping voltage at two or more of the electrostatic chuck 1〇 5 of the electrode 14〇. And, for example, 'is no longer a constant value but will show an exponential change according to the time constant related to the system 100, where Λ is the resistance of the wafer 〇〇5, and c is The capacitance between the wafer and the electrode 14 0. Therefore, the clamping voltage F⑺ can be expressed by the following formula: m-v0 1-2 · exp ⑺ Combining equations (5) and (6) to equation (2), the wafer The dynamics of the inertial limit brake of 110 can be expressed as a difference equation 14 (8) 200524071 D (x, t) d2x _ 1 dt2 mx + gap 2 (d ^ k ^ (x + gap) f for- Wafer 'The difference equation (8) can be calculated by using a computerized difference equation calculator, such as the chest and shawl produced by Mathsoft Engineering and Education, Inc. After the wafer X is held at 1 χ⑴, the speed v⑴ = do cents, and the acceleration = can be further derived. Figures 2A to 2D show an exemplary single-phase square wave clamping voltage that is applied. In Figure 1, a typical flat electrostatic chuck core is “controlled by a parameter” such as the rise time during a voltage conversion. A phase square wave AC clamps the “signal pulse repetitions. A small part of it.) The circle 11G can be securely clamped. Figure M, for example, the illustration-applied clamp ... and the kiss of the solid 105 and electrode 140 across Figure ι. This exemplary square wave clamp Electricity ... often defines the clamping force ', and Figure 2b illustrates the results of the kiss resolution, where a maximum value (for example,' the maximum distance the wafer moves) to zero time (for example, the initial position of the wafer) Can it be determined? The elapsed time between the circle leaving and returning to its original position, for example, & 'is called the wafer impact time. The 2D and 2D figures individually illustrate the degree of the wafer, and the acceleration response, And reference For the purpose of illustration, as an example, the diagrams in Figures 2A-2D use a plate 15 200524071 Electrostatic Loss Disk 105, which has a 150mm radius and a 02mm insulating dielectric layer 125 (for example, oxidation Aluminum layer), one of which has a gap of approximately 3m between the wafer 110 and the electrostatic chuck 105, which maintains a gas reverse pressure P of nearly 200 Taoer. A clamping voltage of approximately ± 2000 volts is applied Γ, which provides a static clamping force of approximately 250 Taoer. Capacitance c is close to 3.4nF, resistance is close to 20ω. Here, the time constant is defined as and C = 6.8 X 1 (Γ8 seconds. According to another exemplary aspect of the present invention, FIG. I— A mems-based electrostatic chuck 105 can also be used in accordance with the present invention. Figure 3 illustrates a plan view of an exemplary MEMS-based electrostatic chuck 15, where one surface 155 of the electrostatic chuck contains a plurality of micro Structure 16. The plurality of microstructures 160 ', for example, are operable to maintain a consistent gap between the wafer (not shown) and the surface 155 of the electrostatic chuck 15. Again, in During voltage conversion, by controlling parameters such as rise time, pulse width, and pulse repetition frequency of a single-phase square-wave AC clamped voltage signal, the wafer 110 can be secure due to (at least in part) the inertial mass of the wafer The second clamp, and the use of a MEMS-based electrostatic chuck 15 〇, usually "" PM powder voltage ^ is significantly smaller than the typical flat electrostatic 105 ○ χ shown in Figure 1 is shown in Figure 4-8_40 Graphs, for example, For an MEMS-based electrostatic chuck according to Figure 3 of this month, the waveforms of the exemplary clamping voltage κ 'wafer position χ, speed v, and acceleration' are individually described, 16 200524071, all of which are a function of time For example, using a MEMS-based electrostatic chuck 150, which has a radius of 150mm, where a gap of approximately 1 μm is located between the wafer (not shown) and the electrostatic chuck, which maintains a close to A 200 Taur reverse pressure body, and a clamping voltage plant close to U2 volts, which provides a static clamping force close to 400 Taur. Capacitor c, for example, is almost 78. 2nF, the resistance i? Is almost 20 Ω. Here, the AC time constant is defined as 1. 56 X 1 (Γ6 seconds. Referring again to Figures 2A and 4A, according to another exemplary aspect of the present invention, the voltage is clamped. The pulse wave width of F can have a considerable range. A lower limit of the pulse wave width, for example, is preferably greater than the wafer impact time as previously described. In addition, in another example, the pulse wave Better width is greater than 10 Times the wafer impact time to provide a higher reliability factor for electrostatic chucks. For example, the shortest pulse width is 1 compared to the conventional electrostatic chucks and MEMS-based electrostatic chucks described above. Disks are individually close to 1.3 pSec and llpSec. The higher upper limit of the pulse width, for example, is determined by a predetermined de-clamping time related to the electrostatic chuck productivity specification, because the de-clamping time is directly proportional For a clamping time at a specific clamping voltage. If a de-clamping time shorter than 0.5 seconds is desired, for example, for the above example of the pulse width range of the conventional electrostatic chuck, k must be approximately 1.3 psec to several Close to 0 5 | Llsec, corresponding to pulse repetition frequency of nearly 300kHz to 1Hz. According to the Mems-based electrostatic chuck example above, its pulse width must be between approximately UMec and 0.5 17 200524071 seconds', which corresponds to a pulse repetition frequency of approximately 1 Hz. According to another exemplary aspect of the present invention, there is no strict limitation regarding the second '. For example, the resistance of "two" will change within a small range. Chu: Electrostatic chuck 15 °, for example ...

" 〃 and ^ 曰 are determined by the gap between the circles (not shown), and the clamping system can be more directly determined by the gap. However, for the plate electrostatic chuck, the capacitance c and the system are determined by the combination of the gap in the figure 1 and the dielectric layer 125, and the number is determined by the section B of the circle of lightning. 'However, this time is usually limited by the door 2 and the surface condition of the chuck. In general, a shorter number of hoists of 1 will result in a smaller wafer movement X and impact time. Similarly, when the gate is moved by a longer π, the wafer movement x will result in a larger wafer.

The amount of movement X of the circle increases the impact time. The larger this time constant, the longer the crystal number '' and the longer the impact time of the yen and yen. If the time is constant (for example: 'wafer 110 can be moved from the electrostatic chuck 105-enough reason), the core is far enough so that it cannot: attract' then the electrostatic chuck system `` misses '' the crystal According to the rising S time constant, it will affect the single-phase square wave system. From the above example, it can be known that when the clamping voltage 'conventional flat electrostatic chuck system is easier to tolerate the error F conversion polarity and higher than 0 volts, 18 200524071 7x10 m (0.0007μιη) wafer movement i and} 2 × 10.6 second round impact time. When compared with the average 3, static gap, this distance can be considered ignored. U MEMS-based The electrostatic chuck example is less tolerant of errors because the capacitance c is a measurement order that is almost greater than a first order, and has a wafer movement X of 1 × 10 · 7 m (〇1μπι) and The impact time of a yen of X10 core. However, the advantage of MEMS-based electrostatic chucks over traditional electrostatic chucks is that 卩 mems-based electrostatic chucks and σ, the gap between the electrostatic chuck and the wafer can be Be good Control makes it possible to have a smaller gap and a lower clamping voltage or a larger clamping force at the same voltage). For example, a lower clamping voltage F 'will reduce the harmful The risk of discharge also reduces the risk of forming particulate matter that can contaminate the electrostatic chuck. According to another example, a higher upper limit of the time constant causes the wafer to move! ", One tenth of the initial gap, because Gap, for example, has a large effect on the force of gas cooling. However, because the pulse width varies within a large range, a longer pulse width (lower pulse repetition frequency) can be selected to minimize the effect of wafer movement. Preferably, the pulse width j is 0.1 seconds, and the rise time of the square wave clamping voltage is less than 2 μs, which is almost the same as the traditional electrostatic chuck and the MEMS-based electrostatic chuck. The maximum amount of movement χ at 0.5 μm and the maximum amount of movement% above _. When the pulse width is not so absolute, a pulse repetition frequency of 0.01 milliseconds to 0.01 seconds will provide a generally fast de-clamping time. 19 200524071 According to another exemplary aspect of the present invention, Fig. 丨 and the month of Fig. 3? The chuck may further include different forms of electrode patterns, including, for example, a simple unipolar structure for a plasma environment system or a simple D-shape bipolar structure for a vacuum environment system. In addition, the present invention requires complicated electrode patterns or a composite signal timing control electronic circuit. The wafer can be un-clamped almost immediately after the push voltage v is turned off, because (to> some degree of privacy) during the clamping the pulse width is short enough to significantly prevent charge migration and accumulation before the dielectric Surface and / or the rear surface of the wafer. Tian Jiyue demonstrated the exemplary method and a series of actions or events described herein. It will be understood that the present invention is not limited to the sequence of such actions or events described. According to the present invention, some steps can be This happens in a different order and / or together with other steps not shown and explained here. ^ Externally, not all the steps shown may need to be implemented according to the principles of the present invention-what is known is that this method can be implemented by related to the description and display here, this system, first, or it can also be achieved by Other system implementations shown. As shown in FIG. 5 of the multi-test, the method 2000 for manufacturing a semiconductor wafer to an electrostatic clip is described according to an exemplary aspect of the present invention. At the beginning of 205, it is determined based on (at least to a certain extent) the inertia time of the wafer-an off-phase square wave disassembly voltage. In action 21G, the wafer system is placed on two static clamping surfaces. The clamping surface, for example, may include a flat plate on the surface of an electrical chuck, or an electrostatic based on µεµ§ 20 200524071 Clamp & Surface 'which includes a plurality of microstructures extending from the surface of the chuck. In action 215, it is determined that a single-phase square-wave clamping voltage system is applied to the electrostatic chuck. COSCO wafer systems are usually clamped to the electrostatic chuck. The clamped electricity determined [for example, & 'is operable to sense the power between the electrostatic chuck and the wafer, where the wafer is attracted to the surface of the electrostatic chuck. In step 2, the M cube wave is stopped. The voltage system is stopped.

Manufacture the wafer. The de-clamping time, for example, can be minimized due to the clamping voltage achieved in action 205.

Although the present invention has been described with reference to a specific embodiment or embodiment, it is obvious that after reading and understanding this specification and the attached drawings, those skilled in the art will have equivalent variations and modifications. In particular related to the different functions implemented by the above-mentioned components (devices, devices, circuits, etc.), unless specified otherwise, the terms used to describe the components (including those referred to as "devices") are intended to correspond To any element that can achieve the specific function of the ㈣ (edge means 'equivalent to a functional equivalent'), even if there is no functional equivalent to the disclosed structure, which is now an exemplary implementation of the invention disclosed herein Example function. In addition to this, when a specific feature of the present invention can be directed to several embodiments, one such feature can be for-given or a specific claim and have a combination of i or other Embodiments have other features. [Brief Description of the Drawings] A system-level block diagram, FIG. 1 of which is an exemplary electrostatic chuck according to a certain aspect of the present invention. 21 200524071 Figures 2D are diagrams showing the exemplary typical electrostatic chuck according to another aspect of the present invention, its clamping voltage waveform, wafer position, speed, and acceleration, among which waveform, wafer position, speed, And acceleration is a function of time. Figure 3 shows a MEMS-based electrostatic chuck according to another exemplary aspect of the invention.

A: Figures to 4D are diagrams showing a typical electrostatic chuck according to another aspect of the present invention. The waveform of the voltage and the wafer position are: and the acceleration, 1 φ, For A Shiba waveform, Japanese yen position, speed, and acceleration, you are a function of the time between day and day. Figure 5 shows an exemplary method of disassembling another wafer according to the present invention. [Explanation of Symbols of Main Components] A non-standard level is used for clamping and solving 100 105 110 115 120 125 130 135 Demonstration clamping system Electrostatic chuck

Wafer Voltage Source Dielectric Surface Dielectric Gas Supply Controller Electrode 22 140

Claims (1)

200524071 10. Scope of Patent Application ·· 1 · A method for clamping a semiconductor wafer to an electrostatic chuck, comprising the following steps: determining a single-phase square-wave clamping voltage for the electrostatic chuck, wherein the decision Based on the inertia response time of the wafer at least to some extent; placing the wafer on the electrostatic chuck, one of which is defined between the wafer and the electrostatic chuck; providing a single phase side of the decision The clamping voltage is applied to the electrostatic chuck, and the wafer is electrostatically clamped to the electrostatic chuck; and the single-phase square wave clamping voltage determined by the spring stop is here, and the wafer is de-clamped from the electrostatic chuck. . 2: The method according to the scope of the patent application, wherein the determined single-phase square wave clamping voltage is applied to one or more electricity related to the electrostatic chuck. , Wherein the electrostatic chuck includes a flat electrostatic chuck surface, which includes a dielectric layer, and the step of placing a circle on #electric chuck includes placing the wafer on the dielectric layer. . (For example, the method of the patent application scope μ, wherein the electrostatic chuck includes a MEMS-based electrostatic chuck surface, which contains a plurality of microstructures, and wherein the step of placing the wafer on the electrostatic chuck includes disposing The wafer is placed on a plurality of microstructures. 5 · The method according to item 4 of the patent application scope, wherein the plurality of microstructures provide a substantially uniform surface on the surface on which the wafer is placed, and wherein the 23 200524071 The gap is significantly uniform for the entire electrostatic chuck. # 6. The method of claim 1 of the patent scope further includes providing a cooling gas reverse pressure on the wafer through the 1 lost disk, The determined single-phase square wave clamping voltage is further determined according to the reverse pressure of the cooling gas. 7. The method of claim 6 in the patent application range, wherein the determined single-phase square wave clamping voltage is a waveform with a rise time, a pulse, a width ', and a pulse repetition frequency, and wherein the waveform is K Shi Yue: ④ number of the number and its. The time constant is related to the electrostatic chuck, the inertia reaction time of the circle, and the reverse pressure of the cooling gas. • If the method of claim 1 is applied, the step of determining the single-phase square ^ clamping voltage M further includes determining a rise time of a predetermined single-phase square-wave clamping voltage, where the rise time is approximately shorter than the wafer Inertia response time. 9. If the scope of patent application is 帛! Item method, wherein the determined single-bit square wave sweetening voltage causes a movement of the wafer, when the square wave exceeds 00 volts away from the electrostatic chuck, and wherein the movement is less than that in the crystal One-tenth of the gap between the circle and the electrostatic chuck. 10. The method of claim 1 in which the pulse width of a predetermined single-phase square-wave clamping voltage is less than a required de-clamping time 'which satisfies the process productivity specifications. 1 h The method according to item 丨 in the scope of patent application, wherein the pulse width of the single-phase square-wave clamping voltage determined is longer than the wafer inertia response time. 12. The method according to item 11 of the scope of patent application, wherein the pulse width of the single-phase square-wave electric power repeatedly is approximately 10 times or more longer than the inertial response time of the wafer. 13.- A system for clamping a wafer, comprising:-an electrostatic chuck 'which contains-or more electrodes operable to provide-a surface on which an electrostatic clamping force is applied and the wafer Heng electrostatic chuck further has-this time constant and-repulsive force, its repulsion The force system is usually opposite to the related clamping force, and one of the predetermined escape distances is defined by # inertia of the wafer and Mara pq 6 be r response time, where the inertia reaction time is further related to the electrostatic chuck And a time constant of the power supply; and it is configured to provide a single-phase square-wave power supply to the one or more electrodes. \ 4 · If the system of patent application No.13, the rise time of a single-phase square wave orange voltage is almost less than the inertial reaction time of the wafer. '15. The system according to item 13 of the scope of patent application, wherein the single-phase square wave hanging voltage "a pulse width is less than a required de-registration time, which satisfies the process productivity specification. 16. The system according to item 13 of the scope of patent application, wherein a pulse width of the single-phase square-wave clamping voltage is longer than the inertial response time of the wafer. 17. The system according to item 13 of the patent application, wherein the pulse width of the single-phase square-wave clamping voltage is about 10 times or more longer than the wafer inertia response time. 25 200524071 18. The system of claim 13 wherein the surface includes a flat plate. 19. The system of claim 13 wherein the surface includes a plurality of MEMS microstructures. 20. The system of claim 13 further includes a cooling gas supplier, wherein the cooling gas supplier is operable to provide a cooling gas reverse pressure between the surface of the electrostatic chuck and the wafer, Here is the repulsive force. XI. Schematic: Like the next page. 26