TW200515419A - Method for creating link between check page and logic page in child bock under a parent and child architecture - Google Patents
Method for creating link between check page and logic page in child bock under a parent and child architectureInfo
- Publication number
- TW200515419A TW200515419A TW092130117A TW92130117A TW200515419A TW 200515419 A TW200515419 A TW 200515419A TW 092130117 A TW092130117 A TW 092130117A TW 92130117 A TW92130117 A TW 92130117A TW 200515419 A TW200515419 A TW 200515419A
- Authority
- TW
- Taiwan
- Prior art keywords
- block
- page
- child
- logic
- parent
- Prior art date
Links
Abstract
The present invention relates to a method for creating a link between a check page and a logic page in a child bock under a parent and child architecture, and more particularly to a method creating a link between a check page and a logic page in a child block of a flash memory. When a host system writes data in a logic address of a flash memory, a manager defines a physical block corresponding to the logic block as a parent block and acquires a new block from spare blocks and defines the acquired block as a child block. The parent block and the logic block pointed by the child block are the same logic block, and data is recorded in a page of the child block. Furthermore, the remaining page is used to generate a check page for recording to which page of the parent ock the page in the child block belongs. When the check page is used to form the logic page for reading the block in the next time, manager can ascertain if the data shall be accessed from the parent block or the child block.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW92130117A TWI236020B (en) | 2003-10-29 | 2003-10-29 | Linkage method for establishing sub-block checking page and logic page under parent and child structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW92130117A TWI236020B (en) | 2003-10-29 | 2003-10-29 | Linkage method for establishing sub-block checking page and logic page under parent and child structure |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200515419A true TW200515419A (en) | 2005-05-01 |
TWI236020B TWI236020B (en) | 2005-07-11 |
Family
ID=36648928
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW92130117A TWI236020B (en) | 2003-10-29 | 2003-10-29 | Linkage method for establishing sub-block checking page and logic page under parent and child structure |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI236020B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI381386B (en) * | 2008-08-04 | 2013-01-01 | Phison Electronics Corp | Method for managing data and storage apparatus thereof and controller thereof |
-
2003
- 2003-10-29 TW TW92130117A patent/TWI236020B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI381386B (en) * | 2008-08-04 | 2013-01-01 | Phison Electronics Corp | Method for managing data and storage apparatus thereof and controller thereof |
Also Published As
Publication number | Publication date |
---|---|
TWI236020B (en) | 2005-07-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |