200427235 玖、發明說明： 【發明所屬之技術領域】 本發明一般係關於構成數位—類比（d/a)轉換器（MC) 組件與電路，更詳細而言，係關於一種具有低功率半類比 限脈衝回應電路之數位—類比轉換器，可減小所需電阻值大 小’因而減少所佔用之晶片。 【先前技術】 其中一種傳統之數位—類比轉換器之結構具有一系列 電阻益觸排中之電阻器，由個別電壓驅動器予以充電。該 系列之電阻器具有增進之電阻值，而在對向端具有較大之 電阻值該電阻器組件佔有數位—類比轉換器中之大部份晶 片空間。在操作時，係在電阻器觸排接收數位信號值，並 根據該值而驅動電壓開關以將電流贫引通過電阻器而產生 類比波型。此係數位信號轉換成類比信號之情形。 ,電路设計師之一項動機係在於減小電路組件所需之晶 片佔用空間尺寸。在傳統DAC中，在DAC中所用之電阻值 很大而佔用大部份晶片空間。 一如果可應用較小電阻值以達至數位―類比轉換器之相 同轉換結果，則可減小晶片空間，由以下說明可知，本發 明在此項目的上取得卓越成果。 【發明内容】 本發明提供一種具有次級半類比FIR濾波器通過係數 連接至初級濾波器之電路，該係數係諸如具有預定值之電 阻器，亦可為除法係數，乘法係數或其他係數，用以減低 5 200427235 在初級濾波器中所用之電阻器之尺寸。該係數係連接於個 別電阻器/電壓驅動觸排之間之一或多個中間電阻器以構 成FIR濾波器。所產生之結果係佔用較少晶片空間用以容 納數位-類比轉換器（DAC)之電阻所需之電路。本發明之電 路可取得相同與傳統數位-類比轉換器相同之轉換結果，但 具有較小電阻值，節省晶片空間。本發明之電阻器結構可 產生與傳統電路相比之相同輸出結果，但具有較少電阻值 而佔用晶片上之較少表面積。其結果係可產生與傳統電路 相同輸出之較小電路。 【實施方式】 以下將參照實施具有較小電阻值之半類比FIR濾波器 之DAC之一實施例說明本發明。然而精於此藝者當可在未 脫離本發明之精神及範圍下應用有效之FIR電路以實施其 他有效用1 ’而本發明之範圍係界定於申請專利範圍中:、 在貫細*例中，DAC係由一半類比fir電路所構成。 該fir電路係由一系列個別電阻器觸排與相對電流驅動器 所構成。各個獨立之觸排係通過一或多個中間係數連接至 另-觸排，包括用以減小在FIR電路中之電阻 係數包括習知之乘法係數，除法係數 電::::=例:參照-種可用 T 阻值之大小之中間雷， 在一實施例中係Thevel in # n $。| 1 能採用1他心“ 本發明範圍内亦可 產生具有比傳統電路者較小電 值之因而佔用較少晶片空間。 200427235 在FIR DAC中，係數係在輸出中被累加，而該係數係 FIRDAC之脈衝回應。FIR DAC之操作取決於操作時間，其 中電壓供源與電阻器，或電流供源等習稱為，，源頭（tap)" 之加重組合係在不同（DIFFERENT)時間之信號之代表。與傳 統DAC相比之下，其加重源頭係由樣本組件在相同（same) 時間所驅動。因此，傳統DAC在一特定時間實施來信號之 樣品上操作，而FIR DAC係在不同時間所取之來信號之樣 品上操作。其結果係在FIR DAC中之任何電阻係一複合者。 相比之下，傳統DAC之各個源頭之電阻值可由遞歸方程式 所測定，其中各電阻值係其毗鄰源頭電阻值之固定比例。 本發明亦包括一種具有由非遞歸方程式所測定之中間 電阻值之電路之設計方法。FIR DAC需要-非遞歸性方程 式，其原因在於源頭值與毗鄰源頭者無簡單關係，而非fir 說係遞歸方程式。在正常道之場合，贼鄰源頭之間之 關係微不足道者，即源頭通常係其毗鄰者重量之一半。此 :習稱為R-2R梯形電路設計。從—源頭至下—源頭之關係 :固定者’於是應用於無限序列之數學方法可予採用。即， ::-操作可界定為由一源頭轉換為其毗鄰源頭，則該操 :應用於序列之所有元件將可產生相同序列。因此在無限 ，目之源頭之操作僅需考量"最終場合"，可由 式予以解答： J 土 ϊ =a〇+ai+a2+· 通夕ΓΐQ(an)=aft+1’因此G代表可將—源頭取至其田比_ 頭之固疋操作。因此： 200427235 0(Y)=0(a〇)+0(ai)+0(a2) + · · · +〇(an) 0(Y)=ai+a2+a3+. . . +a〇、n+i Y - 0(Y)=a〇 - a〇n+i 此項技術之變數可用以推衍一種電路，在就鄰源頭之 間之關係係固定時，僅需重覆從源頭至源頭以取得總和。 此係R-2R梯型之數學基礎，以此方式則各個源頭之 R-2R(或任何其他固定與重覆性電路）可操作之原因。 在本發明之FIR DAC之場合，即為本發明所揭述，從 一源頭至毗鄰源頭之關係未固定，故實際上簡單遞歸應用 母一源頭之類似解答有效。由於電路之特性而使解答複 雜。其差別在於被送至不同電路中之電阻網絡之不同數 據。在非FIR DAC中，數據僅為一樣本之多位元代表。在 FIR DAC中，數據代表在不同時間之信號樣本之持續。因 此，FIR DAC因比重係半類比濾波器之脈衝回應，故不可 應用簡單梯形，因此時常變異。任何已知解答為固定，即 不隨時間而改變’但從源頭至源頭之間有μ關係。結果 在各個源頭之間之電路一般係不相同之電路。 第1圖顯示本發明之具有一觸排之fir渡波器之半類 二匕FIR DAC電路。據波器剛包括由個別離菊鏈結觸發器 •至仏所構成之一觸排之〇_型觸發器1〇2。該觸發器係盥 二：:示：通用時鐘聯繫使觸發器之計時呈同步性：該電 入Din用以接收數位信號輸入。在操作時，觸發 二6 輸入接收數位輸入信號之個別脈衝，並在f 出點輸出-信號。在操作龙在其㈣ ’、寻田佗唬進入，各個雛菊鏈結 200427235 觸發器0!至m從其續後之觸發器之輸出接收一輸入。回應 任何已知觸發器之輸入信號，諸如從觸排^^-匕至C6之對 應電壓源係維持在諸如圖示之+ 1伏特至-1伏特之輸出範 圍之間，藉以驅動對應之電阻器，諸如從觸排106-1至Re, 以產生輸出。根據本發明，諸如Ci及Ce或C2及C5等一或 多對電壓驅動器係連接以驅動中間電且器，諸如從觸排 108-R7至Rs。如下將述，此電路及用以設計此電路之方法 可供電路設計師採用較小電阻值以設計出具有較低元素值 之動能範圍之電路。此舉可減小電路之尺寸。 參照第2A圖所示之傳統電路2〇〇,係具有一輸入觸排 用以接收輸入信號，及具有電壓源或驅動器^至Vq之觸排 ^電路204 ,其一端係連接至相對應之電阻值公歐姆 (k ) ’分別為ik，ik，4k，及l〇k。電壓源之規格相同， 並配合電阻器作為輸出信號之驅動器。該電壓源係可驅動 電阻器等諸如在FIR DAC中之電_。本發明係揭示配合 電壓源使用之電阻器。 該電阻器之另-端係連接以產生代表啟動相對應電壓 源之輸入信號之輸出。該輸入係呈數位輸入值之型^，諸 =數位輸入值清單206者，可啟動至少-個電壓源以 值之複=:部份類比波信號。該輸出係個別輸出 =複°體以系序方式輸出以產生類比波型208之型式 在序列時間下之電壓源與電阻器之間所產 5 } Λ R。+係由下式所定義:WRP Σ ( H) {。W 5}。其"n代表各個電阻器及I係所有並列連接之… 200427235 量電阻，如圖示所產生之波型。累加結果之輸出係呈現正 弦波形之型式，如圖示之理想型式21〇，及複合型式212。 棋座標係代表在特定時間下相對供源所產生之電壓值。 在FIR DAC之實際應用上，在端執之電阻值，例如v〇 及Vs等可達至較大值，諸如192k。根據本發明，該電阻值 可藉重組電阻器電路予以減低。參照第3A—3C圖係顯示一 種重組電阻值之方法。第3A圖顯示Theve 1 i η同等定理， 其中該電路結構302係同等者。第3Β圖顯示一對驅動器 及Vs成對連接，如同在電路2〇〇(第2圖）中相互連接。 精於此藝者可知，在線性網絡中，開放式電路輸出電壓與 輸出電路輸出阻抗特性形成任何二個接口網絡之特徵。因 此，一起取得之二個電阻器係無法與具有相同輸出阻抗及 相同開施電路電壓之任何其他網絡區分。結果—組三個電 阻器可用以取代該對電阻器，條㈣該開放式電路電壓及 輸出阻抗係相同。該二個連接於共同節點之二電阻器，其 等量電阻係96公歐姆。採用上述與第3A圖相關之轉換: 第3C圖所示之等量電路3〇6，顯示之等量輸出電阻， 但其電阻值分別為91k與l〇k。 將此定律應用於第2圖之電路200,第4圖顯示-種 ^有ΐ同節點之電路彻，或新節點_02,連接前述10k 電阻器之輸出，並將其連接古 八逆接至具有4k電阻值之中間電阻 器，係連接至輸出之另一端。由日 - 由此可見，電阻值之動態範 圍係從lk-10k減低為τ -為4k。而輸出電阻在前後之值相 同。如此將產生佔用较少S y 用孕乂夕日日片空間之縮小尺寸之電路。如 10 200427235 前戶斤述’電阻值佔用大部份晶片空間。減小電阻值，則在 電路晶片上由電路所佔用之空間將隨之減少。 參照第5圖’電路5 0 0具有第二共同節點或新節點， nn5〇2，用以將VI及V4之電阻值減低至2k。根據本發明， 該構造包括一 lk之中間電阻器504，其一端連接至相連之 電阻器506，508，而另一端則連接至輸出。所產生之電路 具有比第2圖所示之傳統電路200減少之動態範圍，並進 一步比第5圖所示之電路400減少電阻值。此項構造可用 以減少相同目的之類似電路，減少動態範圍及節省所產生 電路之晶片空間。 再參照第1圖係顯示一種用以實施本發明所產生之電 路。如圖所示，使用中間電阻器1〇8時電路1〇〇之動態範 圍已減少。由於中間電阻器，電阻器觸排1〇6之電阻器之 尺寸減低，因而該電路之動態範圍亦減少。 以上係參照具有低功率半類比有限脈衝回應電路說明 本發明。精於此藝者當知本發明具有更廣泛用途。在不脫 離本發明之精神及範圍下可根據本發明而作成其他實施 例，但該變更態樣應屬本發明申請專利範圍。 11 200427235 【圖式簡單說明】 第1圖係本發明之半類比FIR DAC之示意圖； 第2圖係先行技術之DAC之示意圖； 第3A，3B及3C圖係本發明之DAC之示意圖； 第4圖係本發明之DAC之示意圖；及 第5圖係本發明之DAC之示意圖。 【符號說明】 100 - 渡波器 102 -觸發器 104 - 觸排 200 -傳統電路 204 - 電路 206 -數位輸入值清單 208 - 類比波型 210 -理想形式 212 - 複合形式 400 -電路 404 - 中間電阻器 500 -電路 504 - 中間電阻器 506 ，508 -電阻器 12200427235 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates generally to components and circuits that form digital-to-analog (d / a) converters (MC), and more specifically, to a low-power semi-analog limit The digital-to-analog converter of the impulse response circuit can reduce the size of the required resistance value and thus reduce the occupied chip. [Previous Technology] One of the traditional digital-to-analog converters has a series of resistors in a resistor bank, which are charged by individual voltage drivers. The resistors in this series have an increased resistance value, and a larger resistance value at the opposite end. The resistor component occupies most of the chip space in the digital-analog converter. In operation, a digital signal value is received at the resistor bank, and a voltage switch is driven according to the value to draw a current through the resistor to generate an analog waveform. This coefficient bit signal is converted into an analog signal. One of the motivations of circuit designers is to reduce the size of the wafer footprint required for circuit components. In the conventional DAC, the resistance value used in the DAC is large and takes up most of the chip space. -If a smaller resistance value can be applied to achieve the same conversion result of a digital-to-analog converter, the chip space can be reduced. As can be seen from the following description, the present invention has achieved excellent results in this project. [Summary of the Invention] The present invention provides a circuit having a secondary semi-analog FIR filter connected to a primary filter by a coefficient, such as a resistor having a predetermined value, or a division coefficient, a multiplication coefficient, or other coefficients. To reduce the size of the resistor used in the primary filter. This coefficient is connected to one or more intermediate resistors between the individual resistors / voltage drive pads to form a FIR filter. The result is a circuit that takes up less chip space to accommodate the resistance of a digital-to-analog converter (DAC). The circuit of the present invention can obtain the same conversion result as a conventional digital-to-analog converter, but has a smaller resistance value and saves chip space. The resistor structure of the present invention can produce the same output result as that of the conventional circuit, but has less resistance value and occupies less surface area on the wafer. The result is a smaller circuit that produces the same output as a conventional circuit. [Embodiment] The present invention will be described below with reference to an embodiment of a DAC implementing a semi-analog FIR filter having a smaller resistance value. However, those skilled in this art can apply effective FIR circuits to implement other effective applications without departing from the spirit and scope of the present invention, and the scope of the present invention is defined in the scope of patent applications: , DAC system is composed of half analog fir circuit. The fir circuit consists of a series of individual resistor banks and relative current drivers. Each independent touch bank is connected to another touch bank through one or more intermediate coefficients, including to reduce the resistance coefficient in the FIR circuit, including the conventional multiplication coefficient, and the division coefficient is :::: = Example: Reference- An intermediate thunder with a size of available T resistance is, in one embodiment, Thevel in # n $. 1 Can be used in other ways. Within the scope of the present invention, it is also possible to produce a chip with a smaller electrical value than a traditional circuit and thus occupy less chip space. 200427235 In a FIR DAC, the coefficients are accumulated in the output, and the coefficients are The pulse response of FIRDAC. The operation of FIR DAC depends on the operating time. Among them, the voltage source and the resistor, or the current source are commonly known as, the weighting combination of tap " Compared with traditional DAC, its source of aggravation is driven by sample components at the same time. Therefore, traditional DAC operates on samples that implement signals at a specific time, while FIR DAC operates at different times. The obtained signal is operated on the sample. The result is that any resistance in the FIR DAC is a composite. In contrast, the resistance value of each source of the traditional DAC can be determined by a recursive equation, where each resistance value is its A fixed ratio of the resistance value adjacent to the source. The present invention also includes a design method for a circuit with an intermediate resistance value determined by a non-recursive equation. FIR DAC needs-non-recursive The reason for the equation is that the source value has no simple relationship with the neighbors, not fir. It is a recursive equation. In the normal way, the relationship between the neighbors of the thief is trivial, that is, the source is usually half of the weight of its neighbors. This: The habit is called R-2R ladder circuit design. The relationship from-source to bottom-source: The fixed method can then be applied to infinite sequences. That is, the ::-operation can be defined as a source conversion For its adjacent source, then this operation: all elements applied to the sequence will produce the same sequence. Therefore, in infinity, the operation of the source at the end only needs to consider " the final occasion ", which can be solved by the formula: J 土 ϊ = a 〇 + ai + a2 + · Tong Xi ΓΐQ (an) = aft + 1 'Therefore G represents the operation of taking -source to its field ratio_head. Therefore: 200427235 0 (Y) = 0 (a〇) +0 (ai) +0 (a2) + · · · + 〇 (an) 0 (Y) = ai + a2 + a3 +... + a〇, n + i Y-0 (Y) = a〇- a〇n + i The variables of this technology can be used to derive a circuit. When the relationship between neighboring sources is fixed, you only need to repeat from source to source to get the total. This is R- The mathematical basis of the 2R ladder type, in this way the reason why the R-2R (or any other fixed and repeatable circuit) of each source can be operated. In the case of the FIR DAC of the present invention, it is disclosed in the present invention, The relationship from one source to an adjacent source is not fixed, so in fact, simply recursively applying a similar solution of the mother-source is effective. The solution is complicated due to the characteristics of the circuit. The difference lies in the different data sent to the resistor network in different circuits. In a non-FIR DAC, the data is only a multi-bit representation of the sample. In FIR DAC, the data represents the duration of the signal samples at different times. Therefore, since the FIR DAC is a pulse response of a semi-analog filter, a simple trapezoid cannot be applied, so it often mutates. Any known solution is fixed, i.e. does not change over time 'but there is a μ relationship from source to source. As a result, the circuits between the sources are generally different. Fig. 1 shows a half-type two-knife FIR DAC circuit with a firing wave of the present invention. The wave wave device just includes a single-row flip-flop 〇_102 which is composed of individual daisy-chain flip-flops. The trigger is as follows: 2: Indication: The universal clock connection synchronizes the timing of the trigger: the input Din is used to receive digital signal input. In operation, trigger two 6-inputs to receive individual pulses of digital input signals and output a-signal at the f-out point. In operation, the dragon enters in its 寻 ′, hunting field, each daisy chain 200427235 triggers 0! To m receives an input from the output of the subsequent trigger. Respond to the input signal of any known trigger, such as the corresponding voltage source from the touch bar ^^-D to C6 is maintained between the output range such as +1 volt to -1 volt as shown in the figure to drive the corresponding resistor , Such as from touch bank 106-1 to Re, to produce output. According to the present invention, one or more pairs of voltage drivers, such as Ci and Ce or C2 and C5, are connected to drive the intermediate capacitors, such as from the contact bars 108-R7 to Rs. As will be described below, this circuit and the method for designing this circuit can be used by circuit designers to design a circuit with a lower element value in the kinetic energy range by using a smaller resistance value. This can reduce the size of the circuit. Referring to the traditional circuit 200 shown in FIG. 2A, it has an input bank for receiving input signals, and a bank 204 with a voltage source or driver ^ to Vq, one end of which is connected to the corresponding resistor The values of common ohms (k) 'are ik, ik, 4k, and 10k, respectively. The specifications of the voltage source are the same, and the resistor is used as the driver of the output signal. This voltage source can drive resistors such as those in a FIR DAC. The present invention discloses a resistor used with a voltage source. The other-terminal of the resistor is connected to generate an output which represents an input signal for activating a corresponding voltage source. This input is of the type of digital input value ^, where = = digital input value list 206, at least one voltage source can be started to have a value = = part of the analog wave signal. This output is an individual output = the complex body outputs in a sequential manner to produce an analog wave pattern 208. The voltage is generated between the voltage source and the resistor at sequence time. 5} Λ R. + Is defined by: WRP Σ (H) {. W 5}. The " n stands for each resistor and I are all connected in parallel ... 200427235 quantity resistance, as shown in the figure. The output of the accumulation result is a sine waveform, such as the ideal type 21 shown in the figure and the compound type 212. Chess coordinates represent the voltage value generated relative to the source at a specific time. In the practical application of FIR DAC, the resistance value at the end, such as v0 and Vs, can reach larger values, such as 192k. According to the present invention, the resistance value can be reduced by reorganizing the resistor circuit. Refer to Figures 3A-3C for a method of recombining resistance values. Figure 3A shows Theve 1 i η equivalence theorem, where the circuit structure 302 is the equivalent. Figure 3B shows a pair of drivers and Vs connected in pairs, as in the circuit 2000 (Figure 2). Those skilled in this art can know that in a linear network, the output voltage characteristics of the open circuit and the output circuit output impedance form the characteristics of any two interface networks. Therefore, the two resistors obtained together cannot be distinguished from any other network with the same output impedance and the same applied circuit voltage. Result—A group of three resistors can be used to replace the pair of resistors. The open circuit voltage and output impedance are the same. These two resistors are connected to a common node, and their equivalent resistances are 96 ohms. The above-mentioned conversion related to FIG. 3A is adopted: The equivalent circuit 3006 shown in FIG. 3C shows the equivalent output resistance, but the resistance values are 91k and 10k, respectively. Apply this law to the circuit 200 in Figure 2, and Figure 4 shows-a kind of circuit with different nodes, or new node _02, connect the output of the aforementioned 10k resistor, and connect it to The 4k resistance intermediate resistor is connected to the other end of the output. From this-it can be seen that the dynamic range of the resistance value is reduced from lk-10k to τ-to 4k. The output resistance is the same before and after. This will result in a circuit that takes up less S y and reduces the size of the day and night. Such as 10 200427235, the previous account of the resistor's value takes up most of the chip space. Decreasing the resistance value will reduce the space occupied by the circuit on the circuit chip. Referring to FIG. 5 ', the circuit 500 has a second common node or a new node, nn5002, for reducing the resistance values of VI and V4 to 2k. According to the present invention, the configuration includes a lk intermediate resistor 504 having one end connected to the connected resistors 506, 508 and the other end connected to the output. The resulting circuit has a reduced dynamic range than the conventional circuit 200 shown in Fig. 2 and further reduces the resistance value compared to the circuit 400 shown in Fig. 5. This construction can be used to reduce similar circuits for the same purpose, reduce dynamic range, and save chip space in the resulting circuit. Referring again to Figure 1, there is shown a circuit produced to implement the present invention. As shown in the figure, the dynamic range of the circuit 100 has been reduced when the intermediate resistor 108 is used. Due to the reduced size of the resistors in the resistor bank 106, the dynamic range of the circuit is also reduced. The invention has been described above with reference to a low-power semi-analog finite impulse response circuit. Those skilled in the art will know that the present invention has a wider range of uses. Other embodiments can be made according to the present invention without departing from the spirit and scope of the present invention, but the modification should be within the scope of the present invention patent application. 11 200427235 [Schematic description] Figure 1 is a schematic diagram of the semi-analog FIR DAC of the present invention; Figure 2 is a schematic diagram of the prior art DAC; Figures 3A, 3B and 3C are schematic diagrams of the DAC of the present invention; FIG. 5 is a schematic diagram of a DAC of the present invention; and FIG. 5 is a schematic diagram of a DAC of the present invention. [Symbol description] 100-wave wave 102-trigger 104-touch bar 200-traditional circuit 204-circuit 206-list of digital input values 208-analog wave 210-ideal form 212-composite form 400-circuit 404-intermediate resistor 500-circuit 504-intermediate resistor 506, 508-resistor 12