TW200412611A - Methods of nanotube films and articles - Google Patents

Abstract

Nanotube films and articles and methods of making the same are disclosed. A conductive article includes an aggregate of nanotube segments in which the nanotube segments contact other nanotube segments to define a plurality of conductive pathways along the article. The nanotube segments may be single walled carbon nanotubes, or multi-walled carbon nanotubes. The various segments may have different lengths and may include segments having a length shorter than the length of the article. The articles so formed may be disposed on substrates, and may form an electrical network of nanotubes within the article itself. Conductive articles may be made on a substrate by forming a nanotube fabric on the substrate, and defining a pattern within the fabric in which the pattern corresponds to the conductive article. The nanotube fabric may be formed by growing the nanotube fabric on the substrate using a catalyst, for example, in which the catalyst is a gas phase catalyst, or in which the catalyst is a metallic gas phase catalyst. The nanotube fabric may be formed by depositing a solution of suspended nanotubes on the substrate. The deposited solution may be spun to create a spin-coating of the solution. The solution may be deposited by dipping the substrate into the solution. The nanotube fabric is formed by spraying an aerosol having nanotubes onto a surface of the substrate.

Description

200412611 A7 B7 V. Description of the invention (/) Cross-reference information of related applications This application is related to the following applications. All cases are transferred to the assignee of this application, and all cases are included for reference: Electromechanical Memory Array Using Nanotube Ribbons and Method for Making Same 5 (U.S. Patent Application No. 09/915093, application dated July 25, 2001); Electromechanical Memory Having Cell Selection Circuitry Constructed with Nanotube Technology (U.S. Patent Application Serial No. 09/915173, application dated July 25, 2001); and, Hybrid Circuit Having Nanotube Electromechanical Memory (US Patent Application No. 15/09/915095, application date is July 25, 2001). [Field of the Invention] Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics The present invention generally relates to nanocarbon tube films, fabrics, layers, and objects, and more particularly to manufacturing conductive objects with nanocarbon tube films, fabrics, or layers to For various uses in circuits and so on. 20 [Background of the Invention]-There is a problem in making conductive, ultra-thin metal layers and electrodes in the sub-10 nm range, see, for example, S. Wolf, Silicon Processing for the VLSI era ); Volume 2-Integrated Processing (Lattice Press, Sunset Beach, 1990). The paper size of this size template applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 200412611 A7 B7 V. Description of the invention (2) The metal cymbals within the range usually show discontinuity and discontinuity over a wide distance. V 7 is born. Furthermore, these sub-10 nm thin films are susceptible to damage due to current flow, making them unsuitable for use in semiconductor devices such as electrical interconnections. Thermal damage of thin metal interconnects caused by their low thermal conductivity is one of the main factors that suppress the dramatic miniaturization and performance improvement of localized integrated semiconductor devices. ^ Conventional interconnect technology has a tendency to suffer damage due to thermal damage that impairs the performance of semiconductor devices and metal diffusion, especially due to the degradation of electrical characteristics = damage. For modern G.18 // II1 and G.13 // m structures downsized, some effects become even more significant, for example, due to metal diffusion through the ultra-thin gate oxide layer. Therefore, conventional techniques require conductive elements that can perform well with high current densities or in extreme heat conditions. This includes circuits with very small features printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, as well as other high-current, extremely hot environment conditions. There is also a need for conductive elements that are less likely to diffuse undesired amounts of contaminants into other circuit elements. [Summary of the Invention] The present invention provides a nanotube film and an article and a method for manufacturing the same. In one aspect of the present invention, the conductive object includes a collection of nano tube segments. "The nano tube segment will contact other nano tube segments to determine a plurality of electrical paths along the object. In other aspects of the invention, the 'nanotube segment' may be a single-walled nano & Each segment may have a different length and may include a segment that is shorter than the length of the object. / 、 4 200412611 V. Description of the invention (3) 15 Printed by the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs The thus formed object may be arranged on a substrate and an electric network of microtubules may be formed in the object itself. In other aspects of the present invention, it is possible to fabricate a conductive object on the substrate by forming a nanotube on the substrate-a pattern sub-defined in the fabric, wherein the above pattern corresponds to the conductive object. In other aspects of the invention, the nanotube fabric is formed by using a catalyst to grow the nanotube fabric on the substrate, wherein the catalyst system is: ', such as a gas phase catalyst, or a catalyst For example-a metal gas phase catalyst. In other aspects of the ancient invention, a nanofiber fabric is formed by depositing a cold liquid of a suspended pen micros on a substrate. The deposition solution can be rotated to establish a spin coating of the solution. In other aspects of the invention, the solution can be deposited by immersing the substrate in the solution. In other aspects of the present invention, the nanotube fabric is formed by spraying aerosols with nanotubes onto the surface of the substrate. The invention provides a method for manufacturing a thin film of conductive nanotubes. Under one aspect of the present invention, a substrate is provided, and a vapor-phase catalyst is introduced to promote the growth of house microtubules. A carbon source was also introduced to grow a layer of nanotubes substantially parallel to the main surface of the substrate. In another aspect of the present invention, the vapor phase catalyst is a metallocene. The invention provides a method for manufacturing a thin film of conductive nanotubes. In this gutter, the paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 200412611 V. Description of the invention (4) A7 B7 15 Ministry of Intellectual Property Staff Printed by the cooperative 20 A sample of invention τ, the growth of nanotubes: also guide the heart: the substrate and the introduction of a vapor phase catalyst to promote the formation of a layer of nanotubes on the surface, so that the main surface substantially parallel to the substrate belongs to another aspect of this month In the following, the vapor phase catalyst is a kind of gold. In another aspect of the present invention, + + forms a fine fabric; it is defined in: ', where the pattern corresponds to a conductive object; and In some cases, 俾 can make the patterned fabric leave several conductive objects. On the instrument, the following steps are formed: In another aspect of i! Ming, the conductive object is ancientized on the substrate by the following steps; the substrate is provided; the growth of the vapor phase catalytic tube is introduced 1 and the carbon source is introduced to A layer of nanotubes substantially parallel to the surface of the substrate is grown. In another aspect of the present invention, a conductive object is manufactured on a substrate by the following steps; providing a substrate; providing a material for a patterned layer, a catalyst for promoting nanotube growth; and providing a carbon source俾 can make the nanotubes substantially parallel to the main surface of the substrate grow in this area. In another aspect of the present invention, the patterned layer is a kind of insulator or semiconductor, and the nano tube is grown on the patterned material. In another aspect of the present invention, the patterned layer is a patterned metal layer, and the nanotubes are ordered in areas other than the patterned metal layer ___ 6 This paper size applies to the Chinese National Standard (CNS ) A4 specifications (21 () χ 297 public magic 丄 丄 5. Description of the invention ^ ---------- Growth in the field. [Simplified description of the figure] In the drawings, ^,, and the basis for the instructions Some embodiments of the present invention have a nano tube with a cross-type 5 $ memory device; Figure 2A_β shows two states of a memory unit according to some embodiments of the present invention; Figure 3 shows some of the memory unit according to the present invention Manufacturing operations of the memory device according to the embodiment; 1. Figure 11 shows several types of intermediate structures established to complete the memory device according to some embodiments of the present invention; and FIG. 12 shows the types used to complete the present invention. Non-woven microtube or matte nanotube layer of some embodiments; FIG. 13 shows the matte nanotube layer of 15 according to some embodiments of the present invention relative to the hidden lower layers; FIG. 14 shows the present invention. Addressing logic of some embodiments; employee consumption of the Intellectual Property Bureau of the Ministry of Economic Affairs Figure 15 printed by the company shows an embodiment of the hybrid technology of the present invention, in which the memory core uses the nano tube technology; Figure 16 shows the embodiment of the hybrid technology of the present invention, in which the memory core 20 core and the address line use the nano Tube ribbon technology; > ^ Figure 17 shows the manufacturing operations of conductive objects according to some embodiments of the present invention; Figure 18 shows how conductive objects according to some embodiments of the present invention can be used to connect electrical components; 7 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) V. Description of the invention (ό) Figure 19 shows the method according to the invention and the establishment of some intermediate examples of the structure Figure 20 Shown to complete the hair nanotubes or matte nanotube layers. Non-woven fabrics only 5 [Detailed description of the invention] The hair array and its manufacturing method, in which the structure: similar to that disclosed in wo _ 中 之nt is equipped with charter flight memory unit, wo 01/03208, all of which are included in this series. However, it is not like exposed in the touch_ 施 中 1〇ϊΐ :: The material is made of the nano-tube or the nano-tube. · 2 τ-shaped quilt made of non-woven fabric Used as a conductive element. In the disclosure, these ribbons are called wires or conductive objects. In some examples, these ribbons are suspended by spears, while in other examples, they are arranged on the substrate F. In some instances, 'they will be used to bias certain states under electrical control. In other instances, they will not move, but instead will only be used to transmit current or voltage. I believe that the new nanotube band structure is easier to construct at the integration and scale level (the number of devices manufactured), and its geometry is easier to control. I believe that I have not experienced the above-mentioned problems experienced or expected by the metal line 20 In this case, the new nanotube ribbon can more easily deliver high current density. Under certain embodiments of the invention, the conductive article may be fabricated from a nanotube fabric, layer, or film. A nanocarbon tube with a tube diameter as small as i nm is a conductor capable of transmitting a relatively high current density. For example, see Z · Yao, CL Kane, c. Dekker, Phys. Rev · Left · 84, this paper Standards apply to China National Standard (CNS) A4 specifications (210x297 cm) 200412611 A7 B7

2941 (chanting). They also have the highest known thermal conductivity (see, for example, s Berber, Υ · κ. Kwon, D. Tomanek, ^ μ, 4613 (2000)), and are thermally and chemically stable (for example, See PM · Ajayan, TW Ebbesen, Rep Pr0g phys 60, 1025 15 Printed by Employee Consumer Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs 20 (1997)). However, the use of individual nanotubes is problematic because it is difficult to grow them in a properly controlled direction, length, etc. Establishing the circuits from the micro-weave fabric allows these circuits to maintain a majority (if not all the benefits of individual nanotubes). In addition, circuits made from nanotube fabrics have benefits not found with individual nanotubes. For example, because the circuit is composed of multiple aggregated nanotubes, the circuit will be ineffective due to the failure or rupture of individual microtubes. Instead, there are multiple alternative paths through which electrons can travel through a given route. In fact, the circuits made of nanotube fabric establish their own electrical network of individual nanotubes within the defined circuit, each of which can conduct electrons. In addition, by using nanotube fabrics, layers, or films, current technology can be used to construct such circuits. Production_Microtube ribbon cross-type memory (NTRClVn Because the new nanotube band cross-type memory device is similar to NT WC1V [operation, so briefly explain their operating structure and principle. To understand more fully For description and background, please refer to WO 〇1 / Q3208. Figure 1 shows an exemplary motor memory array 1 〇 constructed according to the principle of the preferred embodiment of the present invention. This array has a plurality of "on" states. 1 05 or "0ff" non-volatile memory unit 10 in the state 106. The actual number of such units is in accordance with the Chinese National Standard (CNS) A4 specification ⑽χ 297 Chu) 200412611 A7 B7

It is not important to understand the invention, but this technology can support devices with information storage capacity equivalent to or greater than modern non-volatile circuit devices. Each memory cell 103 includes a nanotube ribbon 101 that is suspended on, for example, an electrical circuit: a Ge 5 wiring 104 via one or more support portions 102. Each intersection of the ribbon 101 and, for example, the wiring 104 forms an intersection surface 'and defines a memory cell. In some embodiments, cells may be read or written by applying current and / or voltage to electrodes 112, which are in electrical communication with ribbon 101 or via 2 electrodes (not (Shown) and communicates with the line or wiring 104. The support portion is made of a silicon nitride (ShN4) layer 108. Below the layer 108 is a gate oxide layer 10 separating the n-doped silicon circuit 104 from the lower silicon wafer 110. / Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy Kang shows the unit in the first physical and electrical state, in which the nanotube ribbon 1 () 1 is separated from the corresponding line ⑽ 15. Junction 05 shows the unit in the second physical and electrical state, in which the microtubule ribbon 101 is biased to the corresponding line 104. In the first state of departure, this interface is an open circuit. When it is so located, it may be sensed on the ribbon ^ or the line 104. In the second state, this interface is a rectifying interface (for example, Schottky or PN), and when it is addressed in this way, it may be sensed on the 20 tube 101 or the line 104. b In some embodiments, the nanotube ribbon 101 may be fixed in position on these supports by rubbing. In other embodiments, the band may be fixed by any other technique, such as by fastening the band to a branch, by other means, and the friction may be transmitted through the mound.

200412611 A7 B7 V. Description of the invention (?) The use of chemical interactions with valence bonds, and increased through the use of carbon compounds such as pyrenes or other chemically reactive substances. Evaporation or spin-coating materials such as metals, semiconductors, or especially insulators of silicon, titanium, silicon oxide or polyimide can also be added to increase anchoring strength. Nanotube strips or individual nanotubes can also be secured by the use of wafers bonded to the surface. See RJChen et al., "Noncovalent Sidewall Functionalization of Single-Walled Carbon Nanotubes for Protein Immobiliation", J. Am. Chem. Soc · , 123, 2001, 3838-39 and Dai et al., Appl. Phys. Lett " 77, 2000, 3015-17 for exemplary techniques for fixing and coating nanotubes by metal. See also about The technology of WO 01/03208. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs under certain preferred embodiments, as shown in Figures 2A-B, the nanotube ribbon 101 has a width of approximately 180 nm. It is fixed to the support portion 102, which is preferably made of 15 silicon nitride. A n-doped silicon electrode is formed in a local area of the wiring 104 under the ribbon 101, and is located near the support portion 102, and the most Fortunately, it is not wider than the band (for example, 180 nm). The relative distance 208 (see FIG. 2B) from the upper end of the support portion 102 to the deflected position where the band 101 is attached to the electrode 206 should be about 5-50 nm. Size 20 is designed to work with memory devices Electrical switching capability is compatible. For this embodiment, a spacing of 5-50 nm is better for some embodiments that use a ribbon 101 made of a carbon nanotube, but other spacings may be The material is better. The value is due to the interaction between the strain energy and the adhesion energy of the deflected nanotubes. These characteristic dimensions are based on the current Chinese paper standard (CNS) A4 specification (11 paper sizes) ( 210 X 297 mm) 200412611

V. Description of the invention Other embodiments may manufacture small (or large) sizes to reflect the capabilities of the manufacturing equipment. ^ The capillary tube ribbon 101 of some embodiments is formed of tangled or matte nano & non-, flat fabrics (described more below). Ribbon switching parameters 5 are similar to those of individual nanotubes. Therefore, the predicted switching times of the ribbon and the private number should be close to the same number and voltage of the nanotubes. Unlike the conventional techniques relying on the direct growth of a micro pen or chemical self-assembly, the preferred embodiment of the present invention utilizes manufacturing techniques including thin films and photolithography. This manufacturing method helps to create oversized surfaces, especially 10-inch crystals at least 6 inches (compared to the fact that individual nanotubes can grow as long as more than sub-millimeter distance is currently difficult to implement). By providing a redundant portion of the conductive path contained in the ribbon, the ribbon should show an improvement over individual nanotubes: fault tolerance. (If individual nanotubes are damaged, other tubes in the ribs provide a conductive path, and if single-nanotubes are used, the unit will fail.) In addition, the resistance of the ribbon should be significantly lower than the resistance of the individual microtubules, thereby reducing its resistance, because the ribbon may be made to have a larger cross-sectional area than the individual nanotubes. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Figure 3 shows the manufacturing method of the NTRCM device 100 in some embodiments. A first intermediate structure 3202 is constructed or provided here. In the shown 20 embodiment, the structure 302 includes a silicon substrate 110 having an insulating layer 109 (such as silicon dioxide), and defines a silicon nitride layer (SisN4) 108 of a plurality of support portions 102. In this case, although many other configurations (for example, plural rows) may be adopted, these support portions 102 are formed by patterned silicon nitride in plural rows. The conductive line 104 extends between the support portions 102. 12 200412611 V. Description of the invention (//) Under this condition, the displayed line 104 is in contact with the support portion ι2 in essence, but other geometric configurations may also be adopted; for example, between the line and the support portion 102, And the wiring may be made as a wiring or may have a non-rectangular cross section including a triangle or a trapezoid. The sacrificial layer 304 is disposed on the line 104, and can define a plane 306 together with the surface above the branch material 02. Cuttings; Such a thousand faces (as will be described below) can promote the growth of the matte nanotube layer in some embodiments. -Once such a structure 3G2 is constructed or provided, the upper surface editor receives the catalyst class. For example, in some embodiments, the catalyst metal is coated by spin coating or other application techniques (including iron (Fe), molybdenum (Mo), cobalt, or other metals) to construct The second intermediate structure is 3⑺. Then, the rough surface layer 312 of the nanotube grows into a non-woven fabric of a single-walled nanotube (SWNT) to form a third intermediate structure 3 14. For example, when a 15-20 employee consumer agency prints a Tianbaoa source, hydrogen and inert gas (such as argon or nitrogen) flows across the upper surface, 'the second intermediate structure 31 can be placed in an oven and Heat to high temperature (for example, about 8GG-12GG ° C). This environment promotes the production or growth of the matte layer or film 312 of the single-walled carbon nanotube. The layer si] is initially a nanotube thick, and the tube systems are adhered to each other via Van der Waals f0rce. Sometimes, one nanotube will grow on top of another (although this growth is quite rare due to the growth trend of the material). 2 In some embodiments (not shown), the catalyst 308 can be patterned. To help nanotubes with a particular density grow as denser or less dense as desired. When the conditions of catalyst composition and density, growth environment, and time are properly controlled, the nanotubes can be made uniformly distributed in mainly single-layered nanotubes. 13 This paper standard applies the Zhongguan Standard (CNS) A4 specifications ^ χ 297 public love) A7

15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 200412611, above the established standard 11. Proper growth requires controlling parameters including but not limited to catalyst composition and concentration, functionalization of the underlying surface, spin coating parameters (length and RPM), growth time, temperature, and gas concentration. First, a photoresist can be applied to the layer 312 and patterned to define the ribbon in the matte layer of the house microtube 312. The stripe pattern intersects the lower line 104, for example, vertically. The photoresist will be removed to leave a ribbon 101 of the non-woven nanotubes on the plane 306 to form a fourth intermediate structure 318. The fourth intermediate structure 318 has its lower sacrificial layer 304 The exposed portion 320 is shown. Then, this structure 3 i 8 is treated with, for example, an acid of HF to remove the sacrificial layer 30 of a portion contained under the ribbon 101, thereby forming an overhang on the line 104 and being supported by 102 An array 322 of supported ribbons 101.

Post-Ik metallization may be used to form, for example, the address electrode 112 shown in FIG.

One aspect of the above-mentioned technology is that various growth, patterning, and etching actions may use conventional techniques such as photolithography patterning. At present, this may require approximately 180 nm to 130 nm—like low profile dimensions (such as the width of the ribbon 101), but the physical characteristics of the component should withstand even smaller profile dimensions if manufacturing capabilities permit The test of I. As will be explained below, there are many possible ways to construct the above intermediate structures or similar structures. For example, FIG. 4 shows one method of constructing the first intermediate structure 302. The Shixi wafer 400 is provided with an oxide layer 402. The thickness of the oxide layer is best. 14 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm)

200412611 A7 ___ _ B7 5. The description of the invention (/ 3) is several nanometers, but it can be almost 1 # m. A silicon nitride (si3N4) layer 404 is deposited on the oxide surface 402. The silicon nitride layer is preferably at least 30 nm thick. Next, the silicon nitride layer 404 is patterned and etched to generate holes 406, 5 for forming a supporting structure 407. With regard to modern technology, the hole width may be approximately 180 nm wide or may be smaller. The remaining silicon nitride material defines support portions 102 (e.g., columns or possibly rows). An n-doped silicon cover 408 is then deposited to fill the holes 406. The cover 408 of the exemplary embodiment may be about 1 # m thick, but may be as thin as 30 nm. Next, the cover 408 is processed, for example, by self-levelling a thick silicon layer or by tempering to produce the planar 3q6 discussed above to form the structure 411. In the case of self-leveling, it is possible to use reactive ion etching (RIE) with endpoint detection (epd) until it reaches the upper surface 410 of the silicon nitride being etched. The structure 411 is then oxidized to form and define a sacrificial layer 304 of about 10-20 nm deep into the plane 306. The unaltered residue of Shi Xi printed by the Consumer Affairs Agency of the Intellectual Property Bureau of the Ministry of Economic Affairs formed a number of lines 104. FIG. 5 shows another method that may be used to construct some embodiments of the NTRCM device 10020. The present invention provides a platinum support structure 407 as described in conjunction with FIG. Next, an n-doped silicon layer 514 is added by using a CVD process, sputtering, or electroplating. Under certain embodiments, the layer 514 is increased to approximately one and a half heights of the SisN4 support portion 102. After adding layer 514, a tempering step is performed to produce a planarized surface

200412611 A7 B7 V. Description of Invention (丨 4) 15 Member of the Intellectual Property Bureau of the Ministry of Economic Affairs 306 'used to form the structure 411 as described above. The tempering step causes the silicon of layer 514 to flow into the cavity 406. Then, as explained in conjunction with FIG. 4, the structure 411 is oxidized to form and define a sacrifice layer 304 ° of Si02 approximately 10-20 nm deep into the plane 306. The figure shows another method of forming another first intermediate structure 302 '. In this embodiment, the silicon substrate 600 is covered by a silicon nitride layer 602 having a height 604 of at least 30 nm. Then, the silicon nitride layer 602 is patterned and etched to generate a pitch 606 and define the support portion 102. The etching process exposes the surface portion 608 of the silicon substrate 600. The exposed stone surface 608 is oxidized to produce a silicon oxide (SiO2) layer 610 having a thickness of several nm. These layers 610 finally isolate the wiring, similar to the method used by the insulating layer 109 for the construction 302 described above. Once the insulating layer 610 has been established, it is possible to establish the line 104 in any way. Figure 6 shows the processing steps used to establish such a circuit in Figure 4-5 to illustrate this point. Figure 7 shows another method of forming the first intermediate structure 302. A silicon substrate 700 having a silicon oxide layer 702 and a silicon nitride layer 704 receives a patterned photoresist layer 706. For example, the photoresist layer may be spin-coated on the layer, and subsequently exposed and subjected to a photolithography step. Binding and binding Next, a reactive ion surname (RIE) or the like may be used to engrave the layer 704 to form the hole 708 and define the support portion 102. Later, n-doped stone XI 710 may be deposited in the cavity 708. In some 16 paper sizes, the Chinese National Standard (CNS) A ^ · Grid (210 × 297) is applicable. V. Description of the invention (/ left) Degree of Sl3N4 branch # 102 high. Then, the photoresist 706 and the photoresist 706 forms the intermediate structure 411 as described above. Removal of the connection ’causes the structure 411 to be oxidized to produce a sacrificial layer 202. FIG. 8 shows another method of forming the first intermediate structure 302. A starting structure with the highest layer and the lowest layer above it is provided here. The second material _ is located at the level 'and the second silicon dioxide layer 808 is located above the second silicon layer 806 ° The upper layer of the silicon dioxide layer is patterned by photolithography and is structured with an R! E mask 810. This photomask is used to lower the exposure of the second Shixian layer 806 down to 812 down to the first dioxin layer. This constructs the cavity 814 and defines the line 104. 15 holes 814 are filled with silicon nitride (Yi # 4) 816 and covered by it.

The Sl3N4 cover 816 is made up by using coffee to the same height 818 as the rest of the layer 806 covering the n-doped electrode group (which forms the sacrificial layer 304). FIG. 9 shows a method of forming another first intermediate structure 302 ′. Under this method, a structure similar to 407 (shown in Fig. 4 instead of Fig. 9) is provided. In this situation, the Liao 4 branch office 102 has a height of about 30 coffee. A thin metal layer 902 is deposited on the top of the 81st branch office section ι02 and on the exposed portion SK) 2 located at the bottom of the hole 904 as described by the element 903. The metals 902 and 903 form a temporary electrode. Next, n. 200412611 V. Description of the invention (/ 句 Zaishixi layer 906 can be deposited or grown by electroplating through thunder, so as to cover the electrode 903 until the cut 9 0 6 reaches the main load Qiu Λl ° above the height 908 and The contact electrode 902, the long process may be controlled by the initiation of the current between the lower and upper metal electrodes 902, 903. The metal electrode 9 () 2 exposed after 5 ^ can be moved by wet chemical method or dry method This will form an intermediate structure 41Γ 'similar to the above-mentioned structure 411, but with a hidden electrode 903 for the cutting growth process. Then, the structure 4U is oxidized to form a sacrificial layer 304 at the exposed part of Shi Xi, as described above. For example, these layers can be grown to a thickness of about 10 nm. Figure 10 shows another method of forming the first intermediate structure 302. A silicon substrate 1002 is used as a raw material, and on the chopped substrate has: Layer 1002 of silicon dioxide, and a first layer 1006 of silicon (n-doped) on layer 1004. A photomask layer 1008 is patterned by photolithography to form layer 15 1006. By using nitride Technology 'n-doped stone The exposed part of the evening layer 1006 is printed by the consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, which will be chemically changed to the Si # 4 support portion 102. The unchanged portion of the layer 1006 forms the line 104. The photomask 1008 will be removed, Thereby, a structure 411 similar to that described above is formed. 20 Then, the exposed portion 1012 of the silicon surface is oxidized to form a si02 sacrificial layer 304. FIG. 11 shows the formation of another first intermediate structure 302. Under this method, the silicon substrate 1100 has a thin film 1104 of 8 ## as a starting structure. On the nitride layer 11104, η is added and 18 is added. The paper size is applicable to Chinese national standards ( CNS) A4 specification (210x297 mm) 200412611 May 15 Printed by Huicai Employee Consumer Corporation 20, description of invention (7) Zaishi Xi and lithography patterning by RIE to form circuit 104. / circuit 10 The surface is oxidized to form another SiO2 layer 1106 as a sacrificial layer 304. This structure is overgrown with ShA 1108 and etched back to form a flat surface 306 to form another first Intermediate structure 302 ,,, ... If the person skilled in this art will In other words, under this method, the line 104 will be separated from the support portion 102 when the sacrificial layer is subsequently removed. We may use other variations of this technique to create another cross section of the line m. For example The constructed line 104 may have a dome, or have a triangular or trapezoidal cross section. In addition, the cross section may have other forms, such as a triangle with a tapered side. As explained above, once the first intermediate structure 302 is formed, for example, The matte nanotube layer 312 will be placed on the structure 3G2 surface plane dove. In the preferred embodiment, the non-woven fabric layer 312 is grown on the structure through the use of the catalyst 308 and the control of the growth environment. Other embodiments may separately provide a matte nanotube layer 312 and apply it directly on the structure 302. Although the structure 302 in this method preferably contains a sacrificial layer to provide a plane to receive the independently growing fabric, in this method, a sacrificial layer is not required. Because the growth process brought the underside of such nanotubes into contact with the plane 306 of the intermediate structure 302, they appeared to be "self-assembling" to be colored as proposed by FIG. In particular, individual nanotubes easily adhere to the surface on which they grow (as long as it is very advantageous), so that they form substantially a "monolayer". Some nanotubes can grow on top of another, so a single layer is not considered perfect. Individual nanotubes are not woven with each other, but are roughly described in 19 papers in a timely manner in accordance with China National Standard (CNS) A4 specifications (210 x 297 ^ J ^ where Van der Waals does indeed stick to each other.) .Because the off-stage & is the actual nano tube non-editing small round hemp g scanning electron microscope scanning electron microscope or even Shoucun, so modern practical fabrics, nano tubes and silly without losing accuracy "Photographed" down) as small as the outline size. The accuracy depends on the type of SEM, but from the order. Figure 12 proposes the existence of the matte surface of the fabric = even: Γ to the fact that this fabric may have a tube diameter of 1-2 nm (thus the p region. Each tube generally has a straight nm and defines about 1β2 nm. Yuan Yuan, a few fabric layers with a thickness of less than $ y), and may have a length of 200 microns. These tubes can be bent. Even M this intersects. These piping systems are attached to each other via Van der Waals forces. In some embodiments, the growth of the nanotubes in the X and y directions is essentially unrestricted, but due to the self-assembly feature, it is oriented toward the z-axis (vertical to The growth of the page (Figure 12) direction will be substantially limited. Other embodiments may supplement the method described above to grow the matte surface 312 using a graph-oriented or stream-oriented growth technique. This supplement may be used to further adjust growth so as to retard any growth on a plane axis (such as the x-axis). This allows for a more uniform coverage of the desired area with a single layer of interwoven braids with a flat surface of a controlled density of nanotubes. The written view of the matte nanotube layer 312 and the underlying silicon circuit 104 is shown in FIG. As described above, once the matte nanotube layer 312 is disposed on the surface 306, the layer 312 is patterned and engraved to define the ribbon 101 of the nanotube fabric intersecting the support portion 102. Then, for example, use acid to shift 20 paper sizes to apply Chinese National Standard (CNS) A4 specifications (210x297 mm) 200412611 A7 Description of invention (/?) Except for the sacrificial layer, it is refined to form the above-mentioned array 322 related to FIG. 3 . Because the matte layer of the nanotube 312 forms a non-woven fabric of a discontinuous film, the extender or other chemical agent can diffuse between individual nanotube fibers, and more easily reach the elements below the sacrificial layer Subsequent metallization processes may be used to form patterns such as address electrodes 112, as described above. Other embodiments use nano-tube technology to replace the use of metalized ㈣112 and address lines (not shown *) to achieve the addressing of the memory cells. 'Specifically, in some of the embodiments described above, the nanotubes are used to form the NTRCM P train. Some embodiments use nano-tube technology (whether in individual wiring or in the form of bands) to implement addressing logic to select memory cells for read or write actions. This approach integrates the design of the nano-tube technology into a comprehensive system design and can provide functionalities that are conducive to higher-level system design. For example, ‘under this approach, the memory structure will not only store the recorded content in a non-volatile way printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, but also essentially store the final memory address. Nanotube memory cells have a bi-stable state characterized by a high ratio resistance between "0, 'and" i ,. Switching between these states is achieved by applying a specific voltage across the nanotube band or wiring and the underlying circuit, where at least one memory cell element is a nanotube or a nanotube leader. In one method Apply a "reading current" and, with the sense amplifier, determine the voltage across this junction. The read action is non-destructive, which means that the cell can maintain its state, and because it uses DRAM to complete, no write-back action is required. 21 200412611 A7 B7 V. Description of the Invention (2C) FIG. 14 illustrates a branch binary selection system or decoder 1400. As will be explained below, the decoder 1400 may be implemented using a nanotube or nanotube ribbon technology. In addition, the decoder may be built on the same circuit element 5 as an array of nanotube memory cells (such as NTRCM or NTWCM). The perpendicular intersection of two lines 1404 and 1406 (depicted as point 1402) represents the junction of two nanotubes or nanotube ribbons. In this regard, the interaction is similar to the '' pass transistor '' found in CMOS and other technologies, where the intersection may be turned on or off. ίο For example, the location of 1420 (where one microtube, microtube, or nanotube ribbon may intersect the other but is not intended to construct a cross-over interface) may be isolated from each other by lithographically patterned insulators between the components. For clarity, the decoder is shown as a 3-bit binary address transmitted on address line 1408. According to the coded value, the intersection 15 (point) will be switched to establish only a path for the sensing current I to flow through the selection line 1418. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. To use this technology, externally produce a π dual-implementation "characterization 1408" for each bit of a binary address, so that each address bit 1410 is true. With complementary forms. Therefore, line 1406 may be the logically true type of address line 1408a 20, and line 1407 may be the logical complement of address line 1,4081. The voltage value representing 1 0 8 corresponds to the voltage value required to switch the cross-connected surface to the "Γ" or "0 &" state as described above. In this way, the address 1408 may be used to change the sense current I Supplied to one bit or one column of an array (for example, to nanotubes or 22 sheets) Paper size applies to China National Standard (CNS) A4 (210x297 mm) 200412611 A7 B7 V. Description of invention (20 millimeters) Microtubule ribbons). Similarly, the same method may be used to sense a given line. For example, a column is selected jointly to select a specific array row to read the sense. Therefore, this method may be used as X And / or gamma decoding for both reading and writing. 5 Some embodiments of the present invention provide a hybrid technology circuit 1500, shown in Figure 15. The core memory cell array 1502 is implemented by It is built using NTWCM or NTRCM, and that core is surrounded by semiconductor circuits forming X and Y address decoders 1504 and 1506; X and Y buffers 1508 and 1510; control logic 1512 and output buffer 1514. ίο Around NTWCM Or NWBCM The circuit of the heart may be used for the conventional connection function, including providing a read current and sensing the output voltage. In other embodiments, another X and Y may be replaced with the nanotube wiring or the band addressing technology discussed above. Address decoders 1504 and 1506. In these embodiments, the core will include memory cells and addressing logic. 15 In some embodiments, the hybrid circuit 1500 may be printed by using the Intellectual Property Bureau staff of the Ministry of Nanoeconomics to print consumer cooperatives. Control cores (with memory cells only or with memory cells and addressing logic), and formed around the circuit by using a field programmable gate array. If desired, the core and gate array circuits may be contained in a single physical package Alternatively, they may be packaged separately. For example, a hermetically sealed nanotube circuit (with memory or gas memory and addressing logic) may be connected to a PLD / FPGA that contains I / O connection logic / ASIC combination. The resulting small chipset provides users of the product with the benefits of NT memory, while enabling `` off-the-shelf '' 'The use of technology is maximized, and this off-the-shelf technology may be used by the manufacturer on a required basis. 23 This paper size applies the Chinese National Standard (CNS) A4 specification (210x297 mm) 200412611 A7 B7 V. Description of the invention (22 Figure 16 illustrates a possible embodiment of the hybrid technology 160. The fpga chip 1602 containing buffering and control logic (described above) is connected via a (possibly multilayered) printed circuit board (PCB) l604 conductive line. To a nano tube (NT) chip 1606 containing a memory cell and addressing logic. 5 This particular embodiment proposes to follow the PCI bus specification and is representative of today's personal computers. Other passive circuits (such as capacitors, resistors, transformers, etc. (not shown)) will also need to comply with PCI specifications. The bus speeds before 200MHz-400MHz are noted, and it is proposed that various external clock speeds such as the chipset may operate. This speed is limited by PCB interconnects, FPGA / PLD / ASIC speeds, and chip packaging, not Nτ memory unit speed. Ministry of Economic Affairs, Intellectual Property Bureau, Employees' Cooperatives, Printed Cases, Carbon Tube Films, Layers, Fabrics, and Objects 15 lines or conductive objects. These layers may have a thickness of about 1 nm or less, that is, the thickness of a given nanotube. The nanotube matte surface 312 is grown or deposited on a surface (such as the surface of a silicon wafer) to form a continuous film of a predetermined density. Then, the two-dimensional thin film can be patterned to produce conductive wires or lines with a width ranging from 1 nm (the intrinsic minimum size of the nanotube) to several hundred microns or more, depending on the application and the situation. This pattern can be produced in multiple length to width ratios to allow interconnection of semiconductor devices of various sizes, such as transistors or memory elements, and finally expand into a fan shape to reach pads or other interconnecting materials or structures. Because nanotubes have the inherent characteristics of easy access to metal or semiconductor materials, if different materials must be connected, the nanotube interconnect gold paper size can be adapted to the Chinese National Standard (CNS) A4 (210 X 297 mm) 200412611 V. Description of Invention (23) Attribute. Wiring and conductive objects may be used in other forms of electrical circuits. By way of example, Lu and Wei ’s microtubule lines may be used to resist high current densities due to their moon force, and they have been found to hang in very small lines (such as the sub-10nm range). They are also used to reduce the possibility of fouling other circuit features: the example is shown in Fig. 17 and Fig. 17 shows an illustrative use of a nanotube ribbon, wire, or conductive object on the substrate. (By inspection, we can see that the figure is similar to Figure 3 ', but in this case, the' film 312 is grown on the substrate instead of growing on the intermediate structure 31G). In this example, the dream substrate has an oxide layer 1G9e similar to that shown in FIG. 3. In order to promote the growth or deposition of the thin film 312, a plane can be formed (shown as 306 in FIG. 3, but not shown in the figure). ). Then, for example, by using cvd: _ 312 with single-walled and / or multi-walled nanotubes grows on the composition: 15 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 or for example by spin coating Instead, it is deposited on the composition. If a single-walled nanotube is used, the membrane 312 is mainly as thick as a nanotube, but if a multi-walled nanotube is used, the film 312 can be substantially thicker (for example, up to 1000 nm). As described above, if a thin film is to be grown, a catalyst may be used. However, the catalyst (shown as 308 in FIG. 3 and not shown in FIG. 17) need not be deposited directly on the surface of the substrate; in addition, the catalyst may be provided in two gas forms as part of the CVD process. Serving. For example, a gas phase metal substance such as dicyclopentadiene iron can be used. Dimeric cyclopentadiene and other gaseous metal materials, like other types of metals containing iron, pins, cranes, and other transition metals, will make nano-carbon tubes grow. * * 8.2 · Wang 25 200412611 A7 B7 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The description of invention (¾) is suitable for the formation of gas phase catalysts. Metal gas-phase catalysts can be fully utilized or repaired together with appropriate temperature, pressure, surface preparation and growth time: to produce nano-tube matte surface 3 12. If you want to make thinners, you may use the nanotubes that Xiao Xian grew up with. For example, under certain embodiments of the present invention, nanotubes can be made in a soluble or dissolvable form to dissolve the domains, and the domains can be coated on this surface to produce a house micro-office film 312. In this configuration, according to the rotation profile and other process parameters, the film can have a thickness of one or more microtubes. Appropriate solvents include dimethylformamide, cardiac methyl pyrroldmone, η-methyl formamide 'o-dichlorobenzene p-dichlorobenzene, 1,2, dichloroethane, alcohols, with suitable surfactants ( For example, dodecyl sulfate (TRITON X or other) water. For example, surface functionalization, spin coating speed, temperature, pH, and time, the nanotube concentration and deposition parameters can be adjusted 'to control the deposition of single or multilayer nanotubes depending on f. The 'nanotube thin tube 312' can also be deposited by immersing a wafer or substrate in a solution that can dissolve or suspend the nanotubes. Films can also be formed by spraying nanotubes onto the surface in the form of suspended particles. When the conditions of the catalyst composition and density, growth environment, and time are properly controlled, the nanotubes can be made to be uniformly distributed over a predetermined range of the nanotubes that require the most monolayer. When the ancient / j forms the rough surface 312 of the microtube, the photoresist layer can be spin-coated on the nanofiber thin film 312, and patterned by exposure or the like to define the conductive circuit. In the example of item 17, the lines are shown as parallel straight m-sheet scales Sekisui® Secret Binding 26 200412611 A7 Invention Description (2¾ line lines, but the line definition can take other centroids depending on the type of device to be connected to each other ' A defined line can have a width that is at least as large as or larger than _ microns. Once so defined, it is possible to process the exposed photoresist to remove certain layers: but will leave the line 101. Subsequent metallization may It is used to form, for example, an address electrode or a sector interconnect structure shown in Figure η. 7006. 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 Refer to Figure 18, and then the nanotube ribbon pattern 1802 can be printed. Connect to other ribbons, metal wiring (not shown), or electronic features 1806. For example, a, referring to the intermediate structure 1800, the nanotube wiring i 〇 丨 may be connected to a different feature size (such as width) Nanotube line 1802. Line 101 can also be connected to component 112, which can be a metal contact or a pad (although not shown to scale in this figure). With reference to the intermediate structure 1804, line 101 can Connected to, for example, a memory element in 1804, which may be formed as an NTRCM unit or formed with semiconductor parts. With reference to the intermediate structure 1808, the line can be connected to an electronic processing part or logic 1806. Although it is not necessary to draw to scale, line 1 〇1 can also be connected to the pad indicated by the element 112. Although these interconnections can mainly consist of a single layer of nanotubes, they can also be imagined as multilayer ribbons and matte surfaces by using appropriate growth conditions. This requires Control includes but is not limited to catalyst composition and concentration, functionalization of the underlying surface, spin coating parameters (length and RPM, such as 40 seconds, 50-5000 rPm), growth time, temperature, and gas concentration parameters. One aspect is: various growth, deposition, patterning, and time-lapse actions, which may use known techniques such as photolithographic patterning. 27 This paper size is applicable to China National Standard (CNS) A4 (210 X 297) (Mm) 200412611 A7 15 20 V. Description of the invention (meaning). With current technology, these circuits may be made to have a size of about nm to as small as 130nm. However, if manufacturing capabilities allow, the physical characteristics of circuit 101 should stand the test of even smaller profile sizes. Conventional interconnect technology suffers from 埶 damage due to damage to the performance of semiconductor devices. 2 Metal diffusion The tendency to damage, especially due to the degradation of electrical properties. 2 Damage to modern size reductions of 18.18 / zm and 0.13 // 〇1, such as metal diffusion through ultra-thin gate oxide layers And it becomes even more significant. In contrast, the carbon nanotube ribbons are not plagued by some problems. They are substantially more robust with the highest known heat transfer and are less prone to thermal failure. Furthermore, since they are all constructed from covalently bonded carbon atoms, no metal or impurities will diffuse and diffuse. ', Fig. 19 shows another method of forming the first intermediate structure 302. A silicon substrate 1900 having a silicon oxide layer 1902 receives a patterned photoresist layer 1904. For example, a photoresist layer can be spin-coated on layer 192, and then exposed and photolithographically developed to create a cavity 1906 and a photomask 1908. /, Μ show that later, n-doped silicon or a metal such as molybdenum, tungsten, or button ι 9ι〇 and a sacrificial layer 1912, such as an oxide oxide, may be deposited on the holes 1 to 6 and also form corresponding features 1914 and 1916. Then, the photoresist 1912, the material 1914 "aluminum oxide (Al1 2 03) l916 above the photoresist 1912, is peeled off to form an intermediate structure with an electrode 104 and a sacrificial layer ⑼8. (F〇x) spin-coated Pei Ding 1 ____ 28 2 This paper is a national standard of the country (00 ^ 4 secret 200412611 A7 V. Description of the invention (27) Type glass (SOG) is spin-coated on the structure 1918 And was tempered by using standard technology at 600 C and using a sharp temperature agreement to form a Si02 layer 1920 at a height of 200-2000 nm above the sacrificial layer 1912. Then, reactive ion etching (PIE ) Etc. can be used to etch the S02 layer 1920 'to form a structure 302 with the support portion 102. The choice of electrode material is limited by the method of placing the nanotubes on the surface of the substrate. Spin-coated catalyst-type growth of microtubes, gas-phase catalyst-assisted CVD, and spin-coating or direct deposition. In the case of catalyst-type growth as described above, the catalyst is spin-coated or follows standard cleaning protocols. Immerse the substrate The catalyst material is distributed on the surface. In each case, the nanotube system is then grown through a CVD process at 800 m by using a combination of a hydrogen-containing and carbon precursor gas as described above. Therefore, strong enough to withstand these temperatures. 15 Electrode materials printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs will be better. These materials include molybdenum, tungsten, tantalum, gallium, copper and their alloys. , Tungsten, molybdenum, button, copper and other single or stacked construction materials. Stacked electrode construction may help or be sufficient to establish a Schottky barrier sufficient to adjust each memory bit. By growing using a gas-phase catalyst such as dimerized cyclocene and ferrocene, it is possible to envisage a substantially lower temperature required for growth, thereby allowing use at temperatures below 800 ° c and 40 ° (rc) Electrode materials that melt at substantially lower temperatures, as low as certain. Some important gas-phase catalysts can include cobalt, tungsten, molybdenum, or baht metallocenes containing five of six-membered rings.

200412611 A7 ------ B7 V. Description of the invention (2¾ The compound can use the correct knowledge of inorganic chemistry and use the foaming chamber to synthesize the daggers and create the gas phase as the nucleation site on the substrate. For nanotube growth. Of course 'these materials will actually be compatible with general CMOS processes known in the literature and used by standard industrial manufacturing equipment. 5 If the nanotubes are spin-coated with a solution of the nanotubes Or suspended and deposited on the surface at room temperature, the choice of electrode material will be substantially expanded. In this case, there is no high temperature step and any metal (especially aluminum that is generally compatible with standard CMOS metallization conditions) And its alloys) will be acceptable. 10 The sacrificial layer 304 may be constructed of metal oxides, salts, metals, and other materials. The intermediate structure 302 may be formed by using various materials to form Contains SOG, SiO2 and other supporting parts 102. If the low temperature spin coating of the nanotube agreement is selected, the material suitable as the sacrificial layer will expand substantially. This may include, for example, PMMA or other polymers, 15 metals (Such as tungsten, chromium, aluminum, bismuth) and other transition and main group metals, including other semiconductors such as Soviet and other insulators such as salts, oxides and other chalcogens ...., Consumer Cooperatives, Intellectual Property Bureau, Ministry of Economy The choice of materials for the printed support layer depends greatly on the method chosen for the growth of the nanotubes and other factors. If a low temperature process is chosen to place the nanotubes 20 on the surface, we can envisage the use of 203. Materials such as monoammonium silicon, semiconductors, insulators, and polymers such as polyimide. The material selection process is limited to those materials that are compatible with the above process. Those skilled in the art should understand that When selecting a specific electrode material, based on the general processing steps available in semiconductor manufacturing, the sacrificial layer and __ 30 paper standard (CNS) A4 specifications (210 X 297 public love) -------------___ 200412611 、 DESCRIPTION OF THE INVENTION (2¾) The support material is naturally limited. Similarly, if a specific sacrificial layer is selected, the choice of materials for the electrode and the sacrificial layer will be appropriately limited. When y choose a specific support material, the result is of course that the electrode and sacrificial layer = the choice is also limited. Once, Figure 20 shows an atomic force microscope (AFM image) of the illustrated nanotube fabric 3 12. In this figure, The diameter of each nanotube is about 15 and the blur is due to the inherent limitation of the microscope, not the actual texture of the tube (the actual texture of the tube). This type of image is limited by the horizontal resolution of the mine. Most of the disclosures are written as if the fabric is composed of phase nanotubes (for example, 'all single-walled'), but the fabric may be composed of; a wall structure or a combination of single-wall and multi-wall structures. Other Examples 15 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs To promote the growth of interconnects or electrode materials, a pattern is first formed by using a standard inscribed method to define the area where the nanotubes are intended to grow horizontally on the surface. Will become useful. Such a method is used for patterning with the SiO 2 structure to grow thick multi-wall vertical microtubes. Using a similar method ', for the purpose of growing a horizontal pen micro-manufacturer film having a thickness of 50 Å, the structure of the patterned s⑴2 in the form of, for example, ΗΠ may be used. Other materials that provide support for nanotube growth and nucleation, such as insulators and metal oxide supports, are used in conjunction with appropriately selected gas phase metallocenes and other vaporizable metal precursors to produce patterned nanotubes May be useful when ribboning. Such an underlying patterned layer can also be used as a sacrificial layer that will form suspended nanotubes when removed. This ____ 31 This paper size is subject to the Chinese National Standard (CNS) A4 Regulations " 7!] ^ 7 ^ 7 200412611 V. Description of the Invention (3〇) 2 The growth method indicates that it is a positive pattern of growth. The transformed surface is nucleated. In the present embodiment, we can envisage the use of the "" method, whereby the substrate subjected to photolithography patterning includes a metal or other material of the formula 5. When providing, for example, metallocene or similar growth In the case of phase precursors, the nanotubes will actually grow only in areas where there is no picture. When removing the patterned metal material, the removal of the bottom material can provide suspended nanotubes 101 or interconnect structures. Θ ; 'In another embodiment, instead of using the sacrificial layer to suspend the nanotubes on the specific ^ instead of using the sacrificial layer to replace the sacrificial layer with the 15nm engraving of the electrode (1018 18nm wide electrode); The speed of Yu Maoxi metal (such as copper) and semiconductor (such as Shixi) electrodes such as rice is engraved by the surname. $ Use the mother to shift the number of nanometers. In another embodiment, it is coated with a thin layer b ^ The tube is pressed on the support to prevent the nanotube from slipping during operation ^ This will open the window just above the memory unit itself. The Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs prints these layers and Electrical characteristics of conductive objects can be controlled by The cross-section of the microtube f-shaped object is adjusted. For example, the thickness of the ribbon may increase with a given width and the density of the nanotubes. The higher the cross-section, the more the number of conductive channels of b 2 0 electrical characteristics The method of preparing the microtubule ribbons allows continuous electrical conductivity even on the surface of the crude sugar. In contrast, the evaporation of general metal electrodes will suffer from structural defects and thus electrical defects. In addition to nano carbon tubes, other electricity suitable for electromechanical switching can be envisaged. _____ 32 paper size _ Towel Standard (CNS) A4 specification (2 ^ 7297 public 200412611 V. Description of the invention (3 |) ^ and mechanical characteristics Materials. These materials will have similar carbon nanotubes to two: have different and possibly reduced tensile strengths. The tensile strain of the material, the amount of adhesion, ⑥ must exist in the bistable state and electromechanical switching characteristics of the interface Within acceptable tolerances.

’In order to integrate the CMos logic for addressing, two approaches can be envisaged. ::: In the example, the 'nanotube array will be merged before metallization but after CMOS wide and planarization. The second method requires nanometers: arrays:! Cms growth in manufacturing including ion-implementation and high-temperature tempering steps. When these steps are completed, the final metallization of both the nanoribbon ribbon disk CMOS elements will continue through the use of the CMOS protocol. It can also be used as an electrode composed of n-doped silicon on some metal or semiconductor lines. This will still provide a rectifying junction in the ON state, so no multiple currents will exist. 15 In addition to rectifying junctions, there are other methods that are widely accepted and used to avoid the occurrence of electrical interference (ie, multiple current paths) in a cross array. Tunneling on electrodes made by static 'lithography prevents the formation of ohmic ON states. Under zero bias, current will be generated, but a small bias must be applied for the charge carriers to intersect the barrier layer and the trail between the lines. A method of increasing adhesion energy through the use of ions, covalent or other forces can be conceived to change the interaction with the electrode surface. The method can be used to extend the range of bistable states with these junctions. — Nanotubes can work by using planar conjugated hydrocarbons such as tritium. However, after 2004 200411 A7 B7 V. Description of the invention (32), it can help improve the internal adhesion between the nanotubes in the ribbon. Some of the above aspects (such as hybrid circuits and nano-tube technology for addressing) are suitable for individual nano-tubes (such as using direct growth technology, etc.) or nano-tube ribbons. 5 I will further understand that the scope of the present invention is not limited to the above-mentioned embodiments, but is defined by the scope of the following patent applications, and these patent applications will include any improvements that have been described. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs of the Consumer Cooperatives. The paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 200412611 A7 B7 15 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs of the Consumer Cooperatives. [Description of the code of the drawing] 100 ~ NTRCM device 102 ~ Support 10 4 ~ Lower line 10 6 ~ Junction 109 ~ Gate oxide 112 ~ Electrode 208 ~ Interval 302 '~ Intermediate structure 302 ... ~ Intermediate structure 304' ~ Sacrificial layer 3 08 ~ catalyst 312 ~ nanotube layer

3 18 to intermediate structure 322 to array 歹 丨 J 402 to oxide layer 406 to 孑 L cavity 4 0 8 to cover 411 to intermediate structure 514 to n doped stone layer 602 to silicon nitride layer 606 to pitch 610 to insulation Layer 702 to Silicon dioxide layer 101 to Nanotube ribbon 103 to Memory cell 105 to Junction 108 to Silicon nitride layer 110 to Broken substrate 206 to Electrode 302 to Intermediate structure 302 '' to Intermediate structure 304 to Sacrificial Layer 306 to upper surface 310 to middle, structure 314 to intermediate structure 3 2 0 to part 400 to silicon wafer 404 to silicon nitride layer 407 to support structure 410 to upper surface 41 Γ to intermediate structure 600 to silicon substrate Equipment 604 ~ height 608 ~ exposed stone table g 700 ~ substrate substrate 704 ~ silicon nitride layer 35 This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 200412611 Α7 Β7 Intellectual property of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperatives. 5. Description of the invention (^ 0 706 ~ patterned photoresist layer 710 ~ η doped silicon 8 0 0 ~ starting structure 804 ~ silicon dioxide fragment layer 5 808 ~ silicon dioxide layer 812 ~ exposed part 816 ~ Silicon nitride 902 ~ Metal electrode 904 ~ Cavity ίο 908 ~ Height 10 04 ~ Silicon dioxide 1008 ~ Photomask layer 1012 ~ Exposed part 1104 ~ Silicon nitride layer 15 1108 ~ Stone nitride 1402 ~ Dot 14 0 6 ~ Line 1408a ~ Address line 1410 ~ Address bit 201500 ~ Mixed Circuit 1504 ~ Address decoder 1508 ~ Buffer 1512 ~ Control logic 1600 ~ Embodiment 708 ~ Hole 712 ~ Height 802 ~ Minimum silicon layer 806 ~ Second silicon layer 810 ~ RIE mask 814 ~ Cavity 818 ~ Nando 903 ~ Metal electrode 906 to n-doped silicon layer 1002 to silicon substrate 1006 to n-doped silicon layer 1010 to exposed portion 1100 to silicon substrate 1106 to silicon dioxide layer 1400 to decoder 14 0 4 to line 1407 to line 1408 to address line 1418 ~ selection line 1502 ~ core memory ν body unit array 1506 ~ address decoder 1510 ~ buffer 1514 ~ output buffer 1602 ~ FPGA chip This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 200412611

V. Description of the invention (¾) 1604 ~ printed circuit board 1706 ~ fan interconnect structure 1802 ~ nanotube circuit 1806 ~ electronic feature 1900 ~ silicon substrate 1904 ~ patterned photoresist layer 1908 ~ mask pattern 1912 ~ sacrifice layer 1916 ~ Characteristic oxide layer 1606 ~ Nanotube wafer 1800 ~ Intermediate structure 1804 ~ Intermediate structure 1808 ~ Intermediate structure 1902 ~ Dioxide layer 1906 ~ Cavity 1910 ~ Metal 1914 ~ Feature 1918 ~ Intermediate structure Ministry of Economic Affairs Intellectual Property Office Printed by Consumer Cooperatives 7 3 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

1. A method for manufacturing a conductive object on a substrate, comprising: forming a nanotube fabric on the substrate; a pattern bounded in money, wherein the pattern corresponds to the conductive object; In some cases, the patterned fabric can be left on the substrate to form a plurality of conductive objects. ... 2. The manufacturing method as described in item 1 of the patent scope, wherein the nano & fabric is formed by using a catalyst to grow the nano-tube fabric on the substrate. 10 3 The manufacturing method as described in item 2 of the declared patent scope, wherein the catalyst is a gas phase catalyst. 4. The manufacturing method as described in item 3 of the scope of patent application, wherein the catalyst is a metal gas phase catalyst. 5. The manufacturing method as described in item 1 of the scope of patent application, wherein the nano official fabric is formed by depositing a solution of suspended nano tubes on the substrate. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. The manufacturing method described in item 5 of the scope of patent application, wherein the deposition solution is rotated to establish a spin coating of the solution. 7. The manufacturing method according to item 5 of the scope of patent application, wherein the solution is deposited by immersing the substrate in the solution. Preparation_ 8. The manufacturing method as described in item 1 of the scope of patent application, wherein the nano-office fabric is formed by spraying suspended particles with nanotubes on the surface of the substrate. 9. · A method for manufacturing a conductive nanotube film, comprising: 38 paper sizes that comply with the Chinese National Standard (CNS) A4 (21 × 297 mm) 200412611 Α8 A substrate is provided; a vapor phase catalyst is introduced to promote the growth of the nanotubes; and a carbon source is introduced to grow a layer of nanotubes substantially parallel to the main surface of the substrate. 5 1 10. The manufacturing method as described in item 9 of the scope of the patent application, wherein the vapor phase catalyst is a metallocene. 11. The manufacturing method according to item 9 of the scope of patent application, wherein the nanotubes include single-walled carbon nanotubes. 12. The manufacturing method as described in item 9 of the scope of patent application, wherein the 10th-class nano tube includes a multi-walled nano carbon tube. 13 · —A method for manufacturing a conductive object, including: providing a substrate; providing a material for a patterned layer; providing a catalyst to promote the growth of a nanotube; and ... providing a carbon source that can be substantially parallel to the substrate of the host The surface nanotubes grow in the area defined by the pattern. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 14. The manufacturing method described in item 13 of the scope of patent application, wherein the carbon source and the catalyst are introduced in a single action. 15. The manufacturing method according to item 13 in the scope of the patent application, wherein the carbon source and the catalyst are introduced in accordance with the action of separation, so that 16. The manufacturing method according to item 13 in the scope of patent application, wherein the pattern The material of the patterned layer is an insulator or a semiconductor, and the nanotubes are grown on the patterned material. 〃 17. The manufacturing method described in item 13 of the scope of patent application, where ______ 39 This _ standard is applicable to China National Standard (CNS) A4 specification (2ig χ 297 public love) ------ 200412611 A8 B8 C8 _D8 6. Patent application scope The patterned layer is a patterned metal layer, and the nanotubes are grown in a region other than the patterned metal layer. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs ο 4 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)