TW200411694A - Electrostatic-driving micro relay and manufacturing method thereof - Google Patents
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200411694 發明說明α) 【發明所屬之技術領域】 本發,是關於一種靜電式驅動之微繼電器及其製造方 法、,特別是關於一種利用互補式金氧半導體製程及微加工 方法製作的靜電式驅動之微繼電器及其製造方法。 【先前技術】 〜 近年來’由於微細加工技術,配合上半導體製程技術 的進步’使得微機電系統 (Micro-Electro-Mechanical-System; MEMS)技術日趨成 熟。而由於利用微機電技術製作出的元件,具有(丨)微小 =(2)低消耗功率(3)高頻響應(4)低成本的優點,因此, 这項技術目丽被廣泛地運用在不同領域中不同元件的製作 上,例如:微加速器、微光閘、微鉗、微飛行器、生醫晶 片等。 土酉日日 %例如:目前大量應用於半導體電路測試中,自動化測 二式,又備(^tomated Test Equipment; ATE)内之微繼電器 (Micro Relay),由於需具備有高絕緣(high isolation)、低漏電流(i〇w ieakage current)、高頻率 切換(high switching time)以及低輸出電容(low 〇utput CHaPTC i tance )的特性,因此目前研發出的微繼電器大部份 疋單純利用微機電技術製造出來的。 目幻 以4機電製程為基礎而研發出的微繼電器已有 不且大部份的驅動方式以靜電力驅動為多。在美國專 利第6, 3 96, 3 72號所揭露的靜電式驅動之微繼電器,首 先,是先在一個基材上製作電極,再至另一個基材上製作 第6頁 200411694200411694 Description of the invention α) [Technical field to which the invention belongs] The present invention relates to an electrostatically driven micro-relay and a method for manufacturing the same, and more particularly to an electrostatically driven device manufactured using a complementary metal-oxide semiconductor process and micromachining method. Micro relay and its manufacturing method. [Previous technology] ~ In recent years, 'micro-electro-mechanical-system (MEMS) technology has become increasingly mature due to the advancement of microfabrication technology and the advancement of semiconductor process technology'. And because the components produced by MEMS technology have the advantages of (丨) tiny = (2) low power consumption (3) high-frequency response (4) low cost, this technology is widely used in different In the production of different components in the field, such as: micro accelerators, micro shutters, micro forceps, micro aircraft, biomedical wafers, etc. For example, at present, a large number of Micro Relays are used in semiconductor circuit testing, and are automatically tested in the second type, and the Micro Relays in ^ tomated Test Equipment (ATE) have high isolation. , Low leakage current (i〇w ieakage current), high frequency switching (high switching time) and low output capacitance (low 〇utput CHaPTC i tance) characteristics, so most of the micro-relays currently developed 疋 purely use micro-electromechanical Made by technology. Mimio Micro-relays based on 4-electromechanical processes have been developed, and most of the driving methods are driven by electrostatic forces. Electrostatically driven micro-relays disclosed in U.S. Patent Nos. 6, 3 96, 3 72. First, electrodes are made on one substrate and then made on another substrate. Page 6 200411694
個可動的接點,接著,利用晶片接合(B〇nding)的方 ^ 2 一個基材接合,以形成一個可動的結構。 从碰然而’利用微加工的製程在基材上製作出微繼電器的 ^ ,在整體製作上較為複雜,且難以與積體電路 nntegFate(i Circuit; IC)製程祖容,因此無法進行大量 π 。,其另一項缺點,即是利用此方式作出來的微繼電 =,僅疋一個結構,因此,在結構製作完成之後,還需另 :把驅動微繼電器作動之驅動㈣,或是其他與其搭配的 =子包路與此結構結合在一起,才能產生微繼電器之功 能,如此一來,便增加了整體結構的複雜性。 【發明内容】 《鑒於以上習知技術的問題,本發明之目的在於提供一 種靜電式驅動之微繼電器及其製造方法,應用現有之互補 式金氧半導體製程(Complementarr Metal OxideEach movable contact is then bonded to a substrate using a wafer bonding method to form a movable structure. However, the use of a micro-processing process to produce a micro-relay on a substrate is complicated in overall production and difficult to integrate with the integrated circuit nntegFate (i Circuit; IC) process, so a large number of π cannot be performed. Another disadvantage is that the micro-relay made using this method = only one structure, so after the structure is manufactured, you need another: the drive to drive the micro-relay, or other The matching = sub-package circuit can be combined with this structure to produce the function of a micro-relay. In this way, the complexity of the overall structure is increased. [Summary of the Invention] "In view of the problems of the conventional technology, the object of the present invention is to provide an electrostatically driven micro-relay and a manufacturing method thereof. The existing complementary metal oxide semiconductor process (Complementarr Metal Oxide
Semlconductor; CMOS)製作出微繼電器的結構,·再結合微 加工(Micromachining)技術。此方法可完全與積體電路互 相整^,以進行量產,且在後加工製程(p〇st_pr〇cess) 中,完全不需用到光罩對準的動作,只需進行濕式蝕刻及 無迅極包鍍(E 1 e c t r ο 1 e s s p 1 a t i n g)的技術,可有效簡化 製程,並幫助降低製造的成本。 ,發明所研發之靜電式驅動之微繼電器及其製造方 法,是以矽晶片為底材,利用互補式金氧半導體製程製作 出所需之結構。接著,將原本失置於二層金屬層中間的插 銷層(plug)作為犧牲層,利用濕式化學蝕刻的方法蝕刻掉(Semlconductor; CMOS) to produce a micro-relay structure, combined with micromachining technology. This method can completely integrate with the integrated circuit for mass production, and in the post-processing process (p0st_pr〇cess), it does not need to use the mask alignment action, only wet etching and E1 ectr ο 1 essp 1 ating technology can effectively simplify the process and help reduce manufacturing costs. The electrostatically driven micro-relay developed by the invention and its manufacturing method use silicon wafers as a substrate and use complementary metal-oxide semiconductor manufacturing processes to produce the required structure. Next, the plug layer originally lost in the middle of the two metal layers is used as a sacrificial layer, and is etched away by a wet chemical etching method.
200411694 五、發明說明(3) 這層插鎖層,使其上方的結構釋放(release),而形成/ 懸浮結構。 線(output line)上的金屬層鍍上 金屬對金屬的接觸 、一衣作凡极繼電斋的結構之後,再利用無電極電鑛的技 術1么浮結構、輸人訊號線(input 1 i ne)以及輸出訊號 金(gold) 以形成 最後,再藉由施加直流電壓於矽晶片上金屬層及懸 f結^之金屬層,使二者之間產生靜電力,將懸淨結構 ^ ΐ二,使輸入訊號娘藉由懸浮結構上的金屬層和輸出訊 ΪΪί 形成一個迴路;藉由控制直流電壓開啟或關閉 是八i,Γ ί制懸洋結構和其下方之結構’是互相接觸戒 刀為栋i完成微繼電器中電流導通或是不導通之控制° 了解ΐ ί::,、構造特徵及其功能有進4的 【.實施“广"細說明如下: 根據本發明所揭霞 —、 皮 方法,*應用互補電式驅動之微繼電器及其 微繼電器之元件。至氣半導體製程及微加工技術製作出 本發明之第一實絲〃 1 結構剖面圖,如「第丨作完成互補式金氧半導體製程後的 首先,在一片2圖」所示,其製造流程如下所述: 金屬層(Metal 1)10^ ^ί層的矽晶片10〇上長一層第一 是鋁合金。接著,在μ此昂一金屬層1 0 1的材料可為鋁或 102,此第一絕緣層工=二金屬層101上長一層第一絕緣層 的材料可為二氧化矽(Si〇2),或是200411694 V. Description of the invention (3) This interlocking layer releases the structure above it to form / suspend the structure. After the metal layer on the output line is plated with metal-to-metal contact, and the structure is made of the electric pole, the electrodeless mining technology is used. 1 The floating structure and the input signal line (input 1 i ne) and output signal gold (gold) to form the final, and then by applying a DC voltage to the metal layer on the silicon wafer and the metal layer suspended f junction ^, electrostatic force is generated between the two, the suspension structure ^ ΐ two The input signal is formed into a loop by the metal layer on the suspended structure and the output signal; by controlling the DC voltage to open or close it is eight i, Γ The suspended ocean structure and the structure below it are contact with each other or the knife is Building i completes the control of current conduction or non-conduction in the micro relay. Understanding ΐ :: ,, the structural features and their functions have been advanced [.Implementation "Wide " The detailed description is as follows: According to the invention disclosed by Xia—, The skin method, * The micro-relays and components of the micro-relays with complementary electric drive are applied. The first solid wire of the present invention is manufactured by the semiconductor process and micro-processing technology. Metal Oxygen First, as shown in "FIG. 2 in a post-process system, which follows the manufacturing process: a metal layer (Metal 1) 10 ^ ^ long first layer is an aluminum alloy layer on the silicon chip 10〇 ί. Next, the material of the metal layer 101 may be aluminum or 102. The first insulating layer is equal to the length of the first insulating layer on the two metal layer 101. The material may be silicon dioxide (Si02). , Or
第8頁 200411694 五、發明說明(4) 其他可絕緣的材料,而此具有絕緣層的矽晶片1 0 0、第一 金屬層1 0 1及第一絕緣層1 〇 2即為構成此微繼電器之基板部 份。 :、、後、在弟、纟巴線層1 〇 2上長一層第二金屬層(μ e t a 1 /、材料了為銘或疋铭合金,並定義出輸入端(input !ne) l〇3a及輸出端(〇ι1ΐρι1ΐ Une) i〇3b的區域,使其分 ,仏ί輸入端1〇3a及輸出端1〇3b是用以作為外界訊號輸入 及輸出的管道。 接著,在第二金屬層上長一層插銷層(piug 】y4er) 1 04,此插銷層104的材料可為鎢及鈦的夾層,而這 層插銷層104在此結構中’是作為犧牲層 盆:所有結構都製作完成後,%用濕式化學钱 ^法將其钱刻掉,即可形成微繼電器中所需之懸浮結 直材:ΐ Ϊ鎖層1 〇4上長一層第三金屬層(M❿")1 〇5, 具材料可马銘或是|呂合, > 懸浮結構包括有接觸面105&及:匕=結構的形狀。此 面l〇5a是進行完濕式化;,:5二;::份J觸 及輪出端103b接觸的部份,因此,:ΤΓ、α構與輸入端1〇3a 到輸入端购及輸出義其形狀時,需含蓋 而懸臂樑105b的部份是與下方 接,以支撐此懸浮結構。除定義弟一盈屬層相連 還需定義出接腳(Pad)的位置,以作予,構的形狀之外, 出的位置。此外,還需裸露出的插夕加電路輸入及輪 切的插銷層1 〇 4,以便於Page 8 200411694 V. Description of the invention (4) Other insulating materials, and this silicon wafer with an insulating layer 100, the first metal layer 101, and the first insulating layer 102 constitute the micro-relay. The substrate portion. : ,, after, a second metal layer (μ eta 1 /, material is ming or ming alloy, and the input terminal (input! Ne) l〇3a is defined on the brother and the 纟 ba line layer 〇2 And the output terminal (〇ι1ΐρι1ΐ Une) i〇3b, which is divided into two input terminals 103a and output terminal 103b are used as external signal input and output channels. Next, in the second metal layer The upper layer of pin layer (piug) y4er 1 04. The material of this pin layer 104 can be an interlayer of tungsten and titanium, and this layer of pin layer 104 is used in this structure as a sacrificial layer basin: after all the structures are completed The% can be engraved with wet chemical money method to form the suspended junction straight material required in the micro-relay: Ϊ lock layer 1 〇4 a third metal layer (M❿ ") 1 〇5 The material can be Ma Ming or | Lu He, > The suspension structure includes the contact surface 105 & and: the shape of the structure. This surface 105a is wet-typed; J touches the contact part of the wheel output end 103b. Therefore, when: TΓ, α structure and input terminal 103a The part of the cantilever beam 105b is connected to the lower part to support the suspension structure. In addition to defining the connection between the first layer and the second layer, the position of the pad (Pad) must be defined in order to give the shape of the structure. Position. In addition, you need to add the exposed pin and circuit cut pin layer 104 to make it easier
第9頁 200411694Page 9 200411694
進行之後的濕式化學蝕刻。 最後,當下面的每一層金屬層及絕緣層都製作好之後,在 懸浮結構的上面長上一層保護層(P a s S i v a t i 〇 n layer)106,此保護層l〇6是由氧化矽及氮化矽所組成,其 功能是用以保護下方之結構,使其免於受損或氧化,如^匕 一來,便完成互補式金氧半導體製程的部份。 接著,如「第2圖」所示,利用濕式化學蝕刻的方法 將插銷層104蝕刻掉,使其上方的懸浮結構及保護層1〇^懸 浮於輸入端103a及輸出端1 〇3b之上,即完成初步的微繼電 器之結構製作。由於上述之插銷層丨04是以鎢及鈦為"其材 料’因此,採用雙氧水作為化學蝕刻的蝕刻液,以將插銷 層1 04完全蝕刻掉,且不傷害到其他的金屬層及絕 結構。 %曰心 而微繼電器之控制電流導通或是斷路的方法,是藉由 施加直流電壓於矽晶片上之第一金屬層1〇1及懸浮結構曰中 之第三金屬層1〇5,使二者之間產生靜電力,將懸浮=構 吸引下來,且與第二金屬層103中之輸入端1〇3&及輸出端 1 0 3 b互相接觸,形成金屬對金屬的接觸。The subsequent wet chemical etching is performed. Finally, after each metal layer and insulation layer below are made, a protective layer (P as S ivati on) layer 106 is grown on the top of the suspension structure. This protective layer 106 is made of silicon oxide and nitrogen. It is composed of silicon and its function is to protect the underlying structure from damage or oxidation. For example, the complementary metal-oxide semiconductor process is completed. Next, as shown in "Figure 2", the plug layer 104 is etched away by a wet chemical etching method, so that the floating structure and the protective layer 10 above it are suspended above the input terminal 103a and the output terminal 103b. , That is, to complete the preliminary fabrication of the micro-relay structure. Since the above-mentioned pin layer 丨 04 is made of tungsten and titanium " its materials', therefore, hydrogen peroxide is used as an etching solution for chemical etching to completely etch the pin layer 104 without damaging other metal layers and insulation structures. . The method of controlling the current on or off of the micro-relay is to apply a DC voltage to the first metal layer 101 on the silicon wafer and the third metal layer 105 in the floating structure, so that An electrostatic force is generated between the two, which attracts the suspension structure, and comes into contact with the input terminal 103 and the output terminal 103b of the second metal layer 103 to form metal-to-metal contact.
輸入輪入端103a的訊號線,藉由懸浮結構上的接觸面 5 a而輸出端1 q 3 b之輸出訊號線接觸,形成一個電流迴 路;藉由控制直流電壓開啟或關閉的狀態,以控制懸浮結 ί與,入端1〇3&和輸出端1〇3b,是互相接觸或是分離,即 完成微繼電器中電流導通或是不導通之控制。 然而,由於外界電流通過微繼電器時,所會經過的金The signal line at the input end 103a is contacted by the contact surface 5 a on the suspension structure and the output signal line at the output end 1 q 3 b is contacted to form a current loop; by controlling the state of the DC voltage on or off, Suspended junctions, the input terminal 103 and the output terminal 103b are in contact or separated from each other, that is, the control of current conduction or non-conduction in the micro-relay is completed. However, as external current passes through the micro-relay,
第10頁 200411694 五、發明說明(6) 屬部份(輸入端103a、第三金屬層105及輸出端l〇3b)為鋁 或疋鋁合金,其電阻值較大,外界訊號輸入此微繼電器後 損失的能量較多,較不理想。因此,為降低懸浮結構丨l Q 與第一金屬層103接觸部份金屬之電阻值,在濕式化學蝕 刻的步驟之後,再利用無電極電鍍的方法,如「第3圖」 所不,在第二金屬層1〇3的輸入端1〇3&及輸出端1〇3匕的上 表面’與第三金屬層1〇5的下表面,電鍍上一層鎳,接 著,再電鍍上一層金,以分別形成第一接觸層丨丨i及第二 接觸層11 2,即完成整個微繼電器之製作,而完成後之立 體圖請參考「第4圖」所示。利用金作為電流經過的金屬 部份,可有效降低電阻值,同時具有不易氧化的優點,是 良好的接觸層材料之選擇。 本發明之第二實施例與第一實施例相似,請參考「第 5圖」所示,為弟一貫施例完成互補式金氧半導體警程後 之剖面圖,於上述互補式金氧半導體製程中的最後衣一個步 驟-在懸浮結構的上面長一層保護層1 〇 6,第一實施例是在 整個懸浮結構上長一層保護層丨06,而第二實施@例&是在懸 浮結構上電鐘一層鎳及金。 在第一實施例中,由於第三金屬層1 〇 5的上方為保護 層1〇6(由氧化矽及氮化矽組成),此層為互補式金氧半導 體製程中的保護層1 〇 6。而在第二實施例中,第1 =屬層 105的上方沒有這層保護層1〇6,整個懸浮結構釋+放$後只剩 第三金屬層1 0 5,然而,在電鍍第一接觸層丨丨}及第二接觸 層112時,在第三金屬層丨05的上表面及下袅面皆會^鍍上Page 10 200411694 V. Description of the invention (6) The part (the input terminal 103a, the third metal layer 105 and the output terminal 103b) is aluminum or aluminum alloy, which has a large resistance value, and external signals are input to this micro-relay. After the loss of energy is more, less desirable. Therefore, in order to reduce the resistance value of the part of the metal in contact with the first metal layer 103 in the floating structure, after the wet chemical etching step, the electrodeless plating method is used, as shown in "Figure 3". The upper surface of the input terminal 103 and the output terminal 103 of the second metal layer 103 and the lower surface of the third metal layer 105 are plated with a layer of nickel, and then a layer of gold is plated, With the formation of the first contact layer 丨 i and the second contact layer 112 respectively, the fabrication of the entire micro-relay is completed. For the completed perspective view, please refer to "Figure 4". The use of gold as the metal part through which the current passes can effectively reduce the resistance and has the advantage of not being easily oxidized. It is a good choice of contact layer material. The second embodiment of the present invention is similar to the first embodiment. Please refer to "Figure 5" for a cross-sectional view of the complementary metal-oxide-semiconductor process after the completion of the conventional example. The last step in the process is to grow a protective layer 106 on the suspension structure. The first embodiment is to extend a protective layer on the entire suspension structure. 06, and the second embodiment is to the suspension structure. The clock has a layer of nickel and gold. In the first embodiment, the protective layer 10 (composed of silicon oxide and silicon nitride) is above the third metal layer 105, and this layer is the protective layer 106 in the complementary metal-oxide semiconductor process. . In the second embodiment, there is no such protective layer 10 above the first layer 105. After the entire suspension structure is released, only the third metal layer 105 remains. However, in the first contact of plating, Layer 丨 丨} and the second contact layer 112, the upper and lower surfaces of the third metal layer 丨 05 will be plated.
第11頁 200411694Page 11 200411694
鎳及金。 弟ΰ圖」所示 - 利用濕式化學巍约丨Μ 士* 層104钱刻掉,使其上方由第三 H刻的方法將插銷 構,縣浮於於入# ] Λ <3 “ = _ 1 0 5形成的懸浮結 稱心子於輸入端103a和輸出端1〇31}上, 微繼電器之結構製作。 上 即元成初步的 由於上述之插銷層104是以鎢 採用雙氧水作為化學蝕刻的斜^、广大為其材枓,因此, 蝕刻掉,而又不俨宝5丨1χ彳液,以將插銷層1 04完全 然後,再金屬層及絕緣層的結構。 與第的輸入端103a及出端觀的表面, 著;方及下方的表面,電鍍上-層鎳,接 表面开彡成= 曰至’以分別於輸入端l〇3a及出端l〇3b的Nickel and gold. "Picture"-use wet chemical method to cut off the layer 104 money, make the top pin structure by the third H method, the county floats in the entrance #] Λ < 3 "= The suspended junction formed by _ 105 is weighed on the input terminal 103a and the output terminal 1031}, and the structure of the micro-relay is made. The above is preliminary because the above-mentioned pin layer 104 is chemically etched with hydrogen peroxide using tungsten. It is oblique, and the majority is its material, so it is etched away without using the liquid 5 to complete the pin layer 104, and then the structure of the metal layer and the insulating layer. The first input end 103a and the first The surface of the end view is facing; the upper and lower surfaces are plated with nickel on the top and bottom, and then the surface is cut into = to 'respectively the input terminal 103a and the outlet 103b.
衣曲形成弟一接觸厣ηι 、楚— J 第二接觸層112,及曰第一入厘二至屬層105下方的表面形成 屬層113,阼含击% 至屬層105上方的表面形成保護金 所示。利用全";繼電器之製作,其立體圖如「第8圖」 值,同時具二為電流經過的金屬部份,可有效降低電阻 擇。、一不易氧化的優點,是良好的接觸層村料之選 以上所述者 非用來限定本發 圍所作的均等變 僅為本發明其中的較佳實施例而已,並 明的實施範圍;即凡依本發明申請專利範 化與修飾,皆為本發明專利範圍所涵蓋。The first contact layer of the clothing song formation, Chu — J, the second contact layer 112, and the surface of the metal layer 105 below the metal layer 105 forms the metal layer 113, and the surface of the metal layer 105 above the metal layer 105 forms a protection. As shown in gold. The use of full " relays, the three-dimensional diagram is like the "Figure 8" value, and the second is the metal part through which the current passes, which can effectively reduce the resistance selection. 1. The advantage of not being easy to oxidize is a good choice of contact layer. The above-mentioned ones are not used to limit the equal changes made by the hairpin, which are only the preferred embodiments of the present invention, and the scope of implementation is clear; Any patent application and modification according to the present invention shall be covered by the scope of the invention patent.
200411694 圖式簡單說明 第1圖為本發明之第一實施例在完成互補式金氧半導體製 程後的結構剖面圖; 第2圖為本發明之第一實施例在完成濕式化學蝕刻後的結 構剖面圖; 第3圖為本發明之第一實施例在完成無電極電鍍後的結構 剖面圖; 第4圖為本發明第一實施例的結構立體圖; 第5圖為本發明之第二實施例在完成互補式金氧半導體製 程後的結構剖面圖; 第6圖為本發明之第二實施例在完成濕式化學蝕刻後的結 構剖面圖; 第7圖為本發明之第二實施例在完成無電極電鍍後的結構 剖面圖;及 第8圖為本發明第二實施例的結構立體圖。 【圖式符號說明】 100 矽晶片 101 第一金屬層 102 第一絕緣層 103 第二金屬層 103a 輸入端 103b 輸出端 104 插銷層 105 第三金屬層 105a 接觸面200411694 Brief Description of Drawings Figure 1 is a cross-sectional view of the structure of the first embodiment of the present invention after the completion of the complementary metal-oxide semiconductor process; Figure 2 is a structure of the first embodiment of the present invention after the wet chemical etching is completed Sectional view; FIG. 3 is a structural sectional view of the first embodiment of the present invention after electrodeless plating is completed; FIG. 4 is a structural perspective view of the first embodiment of the present invention; and FIG. 5 is a second embodiment of the present invention Cross-sectional view of the structure after the complementary metal-oxide semiconductor process is completed; FIG. 6 is a cross-sectional view of the structure of the second embodiment of the present invention after wet chemical etching is completed; FIG. 7 is a completed view of the second embodiment of the present invention A sectional view of the structure after electrodeless plating; and FIG. 8 is a perspective view of the structure of the second embodiment of the present invention. [Symbol description] 100 silicon wafer 101 first metal layer 102 first insulating layer 103 second metal layer 103a input terminal 103b output terminal 104 pin layer 105 third metal layer 105a contact surface
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