TW200407951A - Thin film transistor panel for transflective liquid crystal display and manufacturing method thereof - Google Patents
Thin film transistor panel for transflective liquid crystal display and manufacturing method thereof Download PDFInfo
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200407951 五、發明說明(1) 【發明領域】 本發明係有關於一種薄膜電晶體(t h i n f i 1 m transistor,TFT )面板及其製造方法,其特別有關於一 種用於半穿透半反射(transflective)式液晶顯示器之薄 膜電晶體面板及其製造方法。 【先前技術】 液晶顯示器可以根據其照明(illuminati〇n)光源加以分 類。反射式液晶顯示器係利用由其正面(靠近觀察者側)進 入的外界光源(環境光)來照明顯示器。該反射式顯示器裝 置内或其背面一般設有一反射表面(例如一鋁或銀反射器 (ref lector)),其會將光線反射而照明該反射式顯示器 裝置。雖然反射式顯示器符合低電力消耗之需求,然而其 影像往往偏暗而不易觀看。此外,有許多時候外界光源並 不足夠,因此純粹的反射式顯示器在使用上有許多限制。 當外界光源的強度不足以用來觀看影像時,輔助的光源 (例如一背光模組)常被用來點亮該顯示器。雖然不_卜 界的光源如何,輔助的光源皆可照亮顯示哭,缺而其電力 消耗报大,-般…可攜式電腦的電池在連續使用背光 :原2至4嫩就需要充電。而在外界環境光源過強時(例 如在户外的烈曰下亦會使單靠背光源所點亮之穿透式 (transmlssive)影像因對比不足而難以辨 古::克服前?反射式顯示器以及穿透式i示器的缺點, 有些電子顯示器已經被設計成當 Φ^ α + y成田外界的光源充足時即不使 用月先源’而以源只在外界光源不足時啟用。該同時具200407951 V. Description of the Invention (1) [Field of the Invention] The present invention relates to a thin film transistor (TFT) panel and a method for manufacturing the same, and particularly relates to a transflective panel for transflective use. Thin film transistor panel of liquid crystal display and manufacturing method thereof. [Prior art] Liquid crystal displays can be classified according to their illumination light sources. A reflective liquid crystal display illuminates the display with an external light source (ambient light) coming in from its front side (near the observer side). A reflective surface (such as an aluminum or silver reflector) is generally provided in or on the back of the reflective display device, which reflects light to illuminate the reflective display device. Although reflective displays meet the demand for low power consumption, their images are often dark and difficult to view. In addition, there are many times when the external light source is not enough, so pure reflective displays have many limitations in use. When the intensity of the external light source is not sufficient to view the image, an auxiliary light source (such as a backlight module) is often used to light the display. Although it does n’t matter how the light source of the world is, the auxiliary light source can illuminate the display crying, but its power consumption is reported to be large,-generally ... The battery of the portable computer is continuously used for backlighting: the original 2 to 4 tenders need to be charged. And when the external environment light source is too strong (for example, outdoors, it will make the transmlssive image lit by the backlight alone difficult to distinguish because of insufficient contrast :: overcome the front? Reflective display and wear Disadvantages of the transmissive i indicator, some electronic displays have been designed so that when Φ ^ α + y Narita's external light source is sufficient, the moon first source is not used, and the source is activated only when the external light source is insufficient.
第5頁 200407951Page 5 200407951
有反射以及穿透雙重功能的設計即稱之 「 (transf iective)」。半穿$ jji & + 、半牙透半反射 作,而在穿透模式時則利用内建的背光源運,“、 目前製造液晶顯示裝置以及面板之主要方、曰 薄膜電晶體技術為基礎。如熟知該技藝著所知糸:=T 顯示裝置一般包含一薄膜電晶體面板、一:/曰曰 及-液晶層夾於其間。 H慮光面板以 習知 之製造 首先將 到具有 影製程 及電容 沈積於 部表面 序沈積 影製程 用於半穿透半反射式液晶顯示器之薄臈電晶體面板 方法將蒼照第1圖至第7圖描述於下。參見第1圖, 一第一金屬層係濺鍍於一透明玻璃基板100上:直 一預先設定厚度,並且將該第一金屬層利用第一微 蝕刻而形成閘電極11 〇、閘線路(未示於圖中)以 電極120於基板1〇〇上。參見第2圖,將一絕緣層13〇 具有閘電極110、閘線路及電容電極12〇之基板\ 上。然後’將一非晶矽層140以及一麵刻阻絕層^_ 於絕緣層1 3 0上,並且將該餘刻阻絕層利用第二微 蝕刻而形成一蝕刻阻絕1 50正對一通道區(channel r eg i 〇n )。一不純物摻雜之非晶矽層(例如n+摻雜非晶石夕 層)以及一第二金屬層依序沈積於基板的全部表面上。利 用第三微影製程蝕刻該非晶矽層1 4 〇、n+摻雜非晶石夕層以 及第二金屬層而形成,參見第3圖,非晶矽圖案i4〇a、n + 摻雜非晶石夕圖案1 6 0以及金屬圖案包含資料線(未示於圖 中)、以一通道1 6 5隔開之源極1 7 0 a以及没極1 7 0 b以及電A design with dual functions of reflection and penetration is called "(transf iective)". Semi-transparent $ jji & semi-transparent and semi-reflective operation, while using the built-in backlight in transmissive mode, ", currently the main method of manufacturing liquid crystal display devices and panels, based on thin film transistor technology As you are familiar with this technology, you know: = T display devices generally include a thin-film transistor panel, a: / / and-a liquid crystal layer sandwiched between them. The conventional manufacturing of light-sensitive panels will firstly have a film process and A method for depositing a capacitor on a surface by a sequential deposition process for a thin transmissive transmissive liquid crystal display panel of a transflective liquid crystal display is described below in FIGS. 1 to 7. Referring to FIG. 1, a first metal layer Sputtered on a transparent glass substrate 100: a predetermined thickness, and the first metal layer is formed by the first micro-etching to form a gate electrode 110, a gate line (not shown), and an electrode 120 on the substrate 〇〇〇。 Refer to Figure 2, an insulating layer 130 has a gate electrode 110, a gate line and a capacitor electrode 120 on the substrate. Then 'an amorphous silicon layer 140 and a resist layer etched on one side ^ _ On the insulating layer 1 3 0, and The etch stop layer uses a second micro-etch to form an etch stop 150 facing a channel region (channel r eg i ON). An impurity-doped amorphous silicon layer (such as an n + doped amorphous stone layer) and A second metal layer is sequentially deposited on the entire surface of the substrate. The amorphous silicon layer 1 40, an n + doped amorphous stone layer, and a second metal layer are etched using a third lithography process, as shown in FIG. 3 , The amorphous silicon pattern i4〇a, the n + doped amorphous stone pattern 160 and the metal pattern include a data line (not shown in the figure), and a source 1 7 0 a separated by a channel 1 65 And pole 1 7 0 b and electricity
200407951 五、發明說明(3) 容電極1 7 0 c。 然後將一保護層1 8 0形成於第3圖所示構造之全部表面 直到具有一預先設定厚度。利用一第四微影製程將保護j 圖案化而使汲極170b以及電容電極17〇c之部分裸露出來曰 (芩見第4圖)。再於具有保護層圖案之整個表面上形 一作,透明導電層之銦錫氧化層(IT〇 layer ) 19〇, 用第五微影製程圖案化丨了〇層(參見第5圖)。 入f 一有機層例如一正光阻層1 92形成於第6圖所示構造 ::ί Γ上ΐ到具有一預先設定厚度。制-第六微影製 篦R FI、先層192圖案化並使其具有一波浪狀表® (參見、 之全部表面上利用成:反射金屬層194於第6圖所示構造 亡利用一弟七微影製程將反射金屬層194圖 条化(芩見第7圖)。 u :前所ic ’由力該習去口薄膜電晶#面 s ^ f罩衣耘而元成,其製程複雜且增加製造時間。 因此,其產率低且製造成本高。 盆ΐ Ϊ:: 3此提供一種改良方法用以製造薄膜液晶面板” =克服或至少改善前述先前技術之問題。 【發明概要】 器ί -種用於半穿透半反射式液晶顯示 簡化製程且^加產=造方法’其可藉由減少光罩製程而 反^广及其他目的,本發明提供一種用於半穿透半 、"次3曰顯示器之薄膜電晶體面板,其特徵在於具有— 200407951 五、發明說明(4) , 蝕刻阻絕圖案包含一第一部份正對一薄膜電晶體之通道區 以及一第二部分正對一第一電容電極。該蝕刻阻絕圖案之 第二部分具有一波浪狀表面使得設於其上之第二電容電極 表面呈波浪狀用以作為一反射表面。200407951 V. Description of the invention (3) Capacitive electrode 17 0 c. A protective layer 180 is then formed on the entire surface of the structure shown in Fig. 3 until it has a predetermined thickness. A fourth lithography process is used to pattern the protection j to expose portions of the drain electrode 170b and the capacitor electrode 17oc (see FIG. 4). Then, an indium tin oxide layer (ITO layer) 19 of a transparent conductive layer was formed on the entire surface with a protective layer pattern, and the layer 0 was patterned using a fifth lithography process (see FIG. 5). An organic layer such as a positive photoresist layer 192 is formed on the structure shown in FIG. 6 :: Γ to have a predetermined thickness. -Sixth lithography R FI, patterning the first layer 192 and making it have a wavy sheet ® (see, the entire surface is used as: reflective metal layer 194 in the structure shown in Figure 6) The seven lithography process strips the reflective metal layer 194 (芩 see Figure 7). U: The former ic 'is formed by the power film film crystal # 面 s ^ f gown, the process is complicated and Increase the manufacturing time. Therefore, its yield is low and the manufacturing cost is high. Basin ΐ ::: 3 This provides an improved method for manufacturing a thin film liquid crystal panel "= to overcome or at least improve the problems of the foregoing prior art. [Summary of the Invention] Device ί -A method for simplifying the semi-transparent and semi-reflective liquid crystal display and increasing the production = manufacturing method, which can be used for reducing the mask process and other purposes. The third thin film transistor panel of the display is characterized by having-200407951 V. Description of the Invention (4), the etching stop pattern includes a first portion facing a channel region of a thin film transistor and a second portion facing A first capacitor electrode, the etch stop pattern A second portion having a wavy upper surface such that the second capacitor electrode a reflective surface configured as a wavy surface provided thereon.
本發明另提供一種製造該薄膜電晶體面板之方法,其主 要包含下列步驟:首先,將一閘電極以及一第一電容電極 形成於一絕緣基板(例如一透明玻璃基板)上。之後,沈 積一閘絕緣層覆蓋閘線路。於閘絕緣層上,沈積一半導體 層(例如一非晶6夕層)以及一敍刻阻絕層(例如一氮化石夕 層),並且圖案化該蝕刻阻絕層而形成該蝕刻阻絕圖案。 然後,連續形成一歐姆接觸層以及一導電層覆蓋於該半導 體層以及蝕刻阻絕圖案上,並且圖案化該半導體層、歐姆 接觸層以及導電層而形成一半導體圖案、一歐姆接觸圖案 以及一導電圖案。該導電圖案包含被該通道隔開之源極以 及汲極以及一第二電容電極形成在該蝕刻阻絕圖案第二部 分之波浪狀表面正上方使得該第二電容電極之表面呈波浪 狀。最後,形成一保護層圖案以及一透明導電圖案於 電圖案上而形成透明像素電極。The present invention further provides a method for manufacturing the thin film transistor panel, which mainly includes the following steps: First, a gate electrode and a first capacitor electrode are formed on an insulating substrate (for example, a transparent glass substrate). After that, a gate insulation layer is deposited to cover the gate line. On the gate insulating layer, a semiconductor layer (such as an amorphous layer) and a etch stop layer (such as a nitride layer) are deposited, and the etch stop layer is patterned to form the etch stop pattern. Then, an ohmic contact layer and a conductive layer are continuously formed to cover the semiconductor layer and the etch stop pattern, and the semiconductor layer, the ohmic contact layer, and the conductive layer are patterned to form a semiconductor pattern, an ohmic contact pattern, and a conductive pattern. . The conductive pattern includes a source electrode and a drain electrode separated by the channel, and a second capacitor electrode formed directly above the wavy surface of the second portion of the etch stop pattern so that the surface of the second capacitor electrode is wavy. Finally, a protective layer pattern and a transparent conductive pattern are formed on the electrical pattern to form a transparent pixel electrode.
在根據上述方法製得之薄膜電晶體面板中,該第二電容 電極係與第一電容電極形成一個儲存電容單元。此外,該 第二電容電極大致係裸露於該透明導電圖案用以作為一反 射表面。因此利用本發明薄膜電晶體面板製成之液晶顯示 器係具有反射以及穿透雙重功能的設計。值得注意的是本 發明作為反射電極之弟二,電容電極係設計與該源極/沒極 m 1In the thin film transistor panel manufactured according to the above method, the second capacitor electrode system and the first capacitor electrode form a storage capacitor unit. In addition, the second capacitor electrode is barely exposed on the transparent conductive pattern as a reflective surface. Therefore, the liquid crystal display made of the thin film transistor panel of the present invention has a design with dual functions of reflection and transmission. It is worth noting that the present invention is the second of the reflective electrode. The design of the capacitor electrode is similar to the source / impulse m 1.
II m 第8頁 200407951 五、發明說明(5) · 於同一微影製程中形成;此外,該第二電容電極之波浪狀 表面係利用蝕刻阻絕圖案第二部分之波浪狀表面而形成, 並且該具有波浪狀表面之第二部分係與在TFT通道區之第 一部分在同一微影製程中形成。因此,根據本發明之薄膜 電晶體面板製造方法只需五道光罩製程即可完成,因此使 製程簡化而提高產率。 本發明之其它目的、優點、和新穎之特徵,從下文與圖 示關聯的詳細說明中將更為明確: 【發明說明】II m page 8 2004007951 V. Description of the invention (5) · Formed in the same lithography process; in addition, the wavy surface of the second capacitor electrode is formed by etching the wavy surface of the second part of the pattern, and the The second portion having a wavy surface is formed in the same lithography process as the first portion in the TFT channel region. Therefore, the method for manufacturing a thin film transistor panel according to the present invention can be completed with only five photomask processes, thereby simplifying the process and improving yield. Other objects, advantages, and novel features of the present invention will be made clearer from the following detailed description associated with the drawings: [Explanation of the Invention]
雖然本發明可表現為不同形式之實施例,但附圖所示者 及於下文中說明者係為本發明可之較佳實施例,並請了解 本文所揭示者係考量為本發明之一範例,且並非意圖用以 將本發明限制於圖示及/或所描述之特定實施例中。Although the present invention may be embodied in different forms of embodiments, those shown in the accompanying drawings and those described below are preferred embodiments of the present invention. Please understand that those disclosed herein are examples of the present invention. And is not intended to limit the invention to the specific embodiments illustrated and / or described.
根據本發明一實施例之薄膜電晶體面板製造方法將參照 第8圖至第1 3圖描述於下。首先,將一金屬層濺鍍於一透 明基板2 0 0上(例如一透明玻璃基板)直到具有一預先設 定厚度,然後將第一金屬層係利用第一微影製程圖案彳 閘電極210以及電容電極22 0於基板2 0 0上(參見第8圖)。 雖然未示於圖中,在形成閘電極21 0以及電容電極2 2 0時, 與閘電極相連接之閘線路亦同時形成。 參見第9圖,將一絕緣層(例如氮化矽(S i Nx )層)沈積 於第8圖所示結構之全部表面上,以形成一閘絕緣層2 3 0。 然後,將一半導體層例如一非晶石夕層2 4 0以及一 1虫刻阻絕 層2 5 0 (例如氮化矽(S i Nx )層)依序沈積於閘絕緣層2 3 0A method for manufacturing a thin film transistor panel according to an embodiment of the present invention will be described below with reference to FIGS. 8 to 13. First, a metal layer is sputtered on a transparent substrate 200 (such as a transparent glass substrate) until it has a predetermined thickness, and then the first metal layer is patterned with the gate electrode 210 and the capacitor using a first lithography process pattern. The electrode 22 0 is on the substrate 2000 (see FIG. 8). Although not shown in the figure, when the gate electrode 21 0 and the capacitor electrode 220 are formed, a gate line connected to the gate electrode is also formed at the same time. Referring to FIG. 9, an insulating layer (such as a silicon nitride (SiNx) layer) is deposited on the entire surface of the structure shown in FIG. 8 to form a gate insulating layer 230. Then, a semiconductor layer such as an amorphous stone layer 2 40 and a 1 etch-resistant layer 2 50 (such as a silicon nitride (Si Nx) layer) are sequentially deposited on the gate insulating layer 2 3 0
第9頁 200407951 五、發明說明(幻 . 上,並且將該钱刻阻絕層2 5 0利用第二微影製程蝕刻而形 成一 I虫刻阻絕圖案(參見第1 〇圖),其包含一第一部份 2 5 0 a正對一薄膜電晶體結構之通道區(c h a n n e 1 r e g i ο η ) 以及一第二部分2 5 〇 b正對該電容電極2 2 0,其中該第二部 分250b 具有一波浪狀表面(COrrUgated surface)。 該飯刻阻絕圖案可以利用如第9圖所示之光阻圖案2 5 4將 該I虫刻阻絕層2 5 0圖案化。此處使用之光阻圖案2 5 4係包含 一第一部份254a正對該通道區、一具有波浪狀表面之第二 部分2 54b正對該電容電極2 2 0以及一大致不具有光阻之第 三部分。詳細言之,.在該第二微影製程中,係以光阻圖案 2 5 4為姓刻遮蔽’對該蝕刻阻絕層2 5 〇蝕刻而裸露出在光阻 圖案2 5 4第三部分下之非晶矽層2 4 〇。根據本發明一實施 例,光阻圖案2 54係經由下列步驟而得。首先,參照第9 圖’形成一光阻層2 5 2於該姓刻阻絕層2 5 0之上。然後,將 一具有預先設定圖案之光罩256置放於光阻層25 2之上方, 光罩2 5 6具有複數個狹縫2 5 6 a (只有兩個狹縫示於第9 圖)’並使光阻層2 5 2曝露在光源下。最後,使曝光彳 光阻層2 5 2顯影以得到光阻圖案2 5 4,其中光阻圖案2 5 4第 二部分254b係具有至少一凹陷部對應於光罩256之狹 2 56a。此外,該敍刻阻絕圖案第二部分25〇b之波浪狀表面 亦可以利用一半曝光的步驟而形成。該蝕刻阻絕圖案第二 部分2 5 0 b之波浪狀表面可以有效增進將要形成在其上的反 射電極之反射效率。 接著,將一歐姆接觸層(ohanc c〇ntact iayer),例如Page 9200407951 V. Description of the invention (above, and the money engraved barrier layer 2 50 is etched using a second lithographic process to form an I-etched barrier pattern (see Figure 10), which includes a first A part 2 5 0 a is opposite to a channel region (channe 1 regi ο η) of a thin film transistor structure and a second part 2 5 0 b is opposite to the capacitor electrode 2 2 0, wherein the second part 250 b has a COrrUgated surface. The photoresist pattern can be patterned with the photoresist pattern 2 5 4 as shown in FIG. 9. The photoresist pattern 2 5 0 is used here. The photoresist pattern 2 5 used here Series 4 includes a first portion 254a facing the channel region, a second portion 2 54b with a wavy surface facing the capacitor electrode 2 2 0, and a third portion having substantially no photoresistance. In detail, In the second lithography process, the photoresist pattern 2 5 4 is used as the mask to mask the etch stop layer 2 5 0 and the amorphous silicon exposed under the third part of the photoresist pattern 2 5 4 is exposed. Layer 2 4 0. According to an embodiment of the present invention, the photoresist pattern 2 54 is obtained through the following steps. First, referring to FIG. 9, a photoresist layer 2 5 2 is formed on the last engraved resist layer 2 50. Then, a photomask 256 having a preset pattern is placed over the photoresist layer 25 2. The photomask 2 5 6 has a plurality of slits 2 5 6 a (only two slits are shown in FIG. 9) 'and the photoresist layer 2 5 2 is exposed to the light source. Finally, the photoresist layer 2 5 is exposed. 2 develop to obtain a photoresist pattern 2 5 4, wherein the photoresist pattern 2 5 4 second portion 254b has at least one recessed portion corresponding to the narrow portion 2 56a of the photomask 256. In addition, the second portion 25 of the engraved resist pattern The wavy surface of b can also be formed by a half-exposure step. The etched wavy surface of the second part 2 5 0 b can effectively improve the reflection efficiency of the reflective electrode to be formed thereon. Next, one ohm Contact layer (ohanc c〇ntact iayer), for example
200407951 五、發明說明(7) 不純物摻雜層(例如η +摻雜非晶矽層)以 依序沈積於第1 0圖所示結構的全部表面及一第二金屬層 製程蝕刻該非晶矽層240、η+摻雜非晶矽爲。、利用—第三微影 層而形成非晶矽圖案240a、η+摻雜非晶分'以及第二金屬 通道2 6 5隔開之源極270a/汲極27〇b以I ♦圖案2 6 0、被一 見第η圖)。雖然未示於圖令,在上述步电容電極27^'參 連接之資料線路亦同時形成。 ’、中’與源極相 值得注意的是,該電容電極2 7 〇 c係形& 幸第-邱八? RHh夕、士、白也电 ’、 成在該敍刻阻絕圖 :; 正上方使得該電容電極_ <衣面呈波浪狀。砰細g之,在第二旦 一預务兮宏夕氺阳闰安炎红,米一 U办製程中,係利用 預先α又疋之先阻圖案為蝕刻遮蔽,對該非曰 η + #雜非晶石夕層以及第二金屬厣 日日 曰 9 q π 、,口…丄 續無刻而踩露出在閘絕緣厣 230,亚且形成一通道265隔開 曰 中通道265下的非晶矽;俜在兮钟;3以及汲極2 70 b,其 y增保在δ玄蝕刻阻絕圖笨s 一却八 2 5 0 a的保護下而大致保持完整。 ’、 71 將一保護層280 (例如I化石夕層,未示 上述構造之全部之表面上,直到一預先設)形 第四微影製程將保護層圖案化以形成一裸露::極::: 通孔28 0a以及一裸露該電容電極2 ^ ” 28〇b (參見第12圖)。參見第132J〇C,皮:】^ ,义禾,在弟12圖所+夕4士视 ;二表面上形成—作為透明導電層29〇之銦錫氧化;層 興此妒二’二且利用—第五微影製程圖案化ίτ。層, ,此形成一处明導電圖案經由該通孔28〇 極並且經由該通孔難電性連接至該電容 200407951 五、、發明說明(8) 〜〜〜—一— ______ 如圖所示,該電容電極27〇c係具有波浪狀表面,、 非鏡面反射角度方向的反射率。可以理解的是斗=増加 極2 7 0c之波浪狀表面並不限於第丨3圖所示 =a兒容電 有凹或凸狀部之表面)。 *廊(亦即具 在根據上述方法製得之薄膜電晶體面板(參 ^ 中,該電容電極270c係與電容電極2 20形成—個赌弟产t圖) 單元,用以在薄膜電晶體(TFT)關閉之後—預先# :,容 内,將由透明導電層形成之像素電極的電壓堆,在" 圍内。此外,該電容電極2 70c大致係裸露於# :扣特定範 、 你通明導兩同 案用以作為一反射表面。因此利用本發明薄 曰祕=㈣ 电曰日匀立 f^n in 製成之液晶顯示器,在穿透狀態時,該透明+ ^ 像素電極可以讓背光源所產生的光線穿透;而在反射狀能 時,該電容電極270c則可反射外界光源的入射光線。"恕 值得注意的是本發明作為反射電極之電容電極2 7 〇 c係< 計與該源極2 7 0 a /沒極2 7 0 b於同一微影製裎中形成:此 外,遠電谷電極2 7 0 c之波浪狀表面係利用|虫刻阻絕圖擦^ ^ 二部分250b之波浪狀表面而形成,並且該具有波浪狀 之第二部分2 5 Ob係與在TFT通道區之第一部分25 〇a在同— 微影製程中形成。因此,根據本發明之薄膜電晶體面板製 造方法只需五道光罩製程即可完成,因此使製程簡化而提 高產率。 雖然本發明已以前述較佳具體實施例揭示,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作各種之更動與修改。,因此本發明之保200407951 V. Description of the invention (7) Impurity-doped layer (such as η + doped amorphous silicon layer) is sequentially deposited on the entire surface of the structure shown in FIG. 10 and a second metal layer is used to etch the amorphous silicon layer. 240, η + doped amorphous silicon is. Using the third lithography layer to form an amorphous silicon pattern 240a, n + doped amorphous element, and a second metal channel 2 6 5 separated by a source 270a / drain electrode 27〇b with an I pattern 2 6 0, be seen at first η). Although not shown in the figure, a data line connected to the capacitor electrode 27 ^ 'at the above step is also formed at the same time. ’、 中’ is in phase with the source. It is worth noting that the capacitor electrode 2 7 〇c system & RHh Xi, Shi and Bai are also electric ’, formed in the narrative block diagram: directly above the capacitor electrode _ & the surface of the capacitor is wavy. In the second stage, in the preparation process of Hongxi Xiyang Yang Anyan Red and Miyi U, the process of using the pre-α and pre-resistance patterns for etching was used to mask the non-negative η + # 杂The amorphous stone layer and the second metal are said to be 9 q π on the next day, and the mouth is exposed to the gate insulation 厣 230 without a moment, and a channel 265 is formed to separate the amorphous silicon under the middle channel 265. ; 俜 在 西 钟; 3 and the drain electrode 2 70 b, its y increase protection under the protection of δ xuan etching resistance figure stupid s but 8 2 5 0 a and remained substantially intact. ', 71 A protective layer 280 (for example, a fossil evening layer, not shown on all the surfaces of the above structure, until a pre-set) is shaped. The fourth lithography process patterns the protective layer to form a bare :: pole :: : Through hole 28 0a and one exposed capacitor electrode 2 ^ ”28〇b (see FIG. 12). Refer to No. 132J ° C, skin:] ^, Yihe, in the 12th figure + + 4 Shishi; 2 Formed on the surface—the indium tin oxide as a transparent conductive layer 29 °; the layer is jealous and used—the fifth lithography process is used to pattern τ. The layer, which forms a bright conductive pattern through the through hole 28. It is difficult to be electrically connected to the capacitor through the through hole. 200407951 V. Description of the invention (8) ~~~ — 一 — ______ As shown in the figure, the capacitor electrode 27〇c has a wavy surface, and is not mirror-reflective The reflectivity in the angular direction. It can be understood that the wavy surface of the bucket = 増 plus pole 2 7 0c is not limited to the surface shown in Figure 3 = a surface of the capacitor with concave or convex portions). * Gallery (ie In the thin-film transistor panel (referred to as above, the capacitor electrode 270c is The electrodes 2 and 20 are formed as a unit of a gambler, which is used after the thin film transistor (TFT) is turned off—in advance, the voltage stack of the pixel electrode formed by the transparent conductive layer is enclosed within " In addition, the capacitor electrode 2 70c is roughly exposed in #: buckle a specific pattern, and you can use it as a reflective surface. Therefore, using the thin film of the present invention = ㈣ 曰 日立 立 f ^ n in system Chengzhi LCD display, the transparent + ^ pixel electrode can allow the light generated by the backlight to penetrate in the penetrating state; while in reflective energy, the capacitor electrode 270c can reflect the incident light from an external light source. &Quot; It is worth noting that the capacitor electrode 2 7 0c of the present invention as a reflective electrode is formed in the same lithography system as the source electrode 2 7 0 a / not electrode 2 7 0 b: In addition, the far electric valley The wavy surface of the electrode 2 7 0 c is formed by using the worm-cutting pattern ^ ^ wavy surface of the second part 250b, and the second part 2 5 Ob having a wavy shape is connected to the first part in the TFT channel region. 25 〇a is formed in the same lithography process. Therefore, according to the present invention Mingzhi's thin-film transistor panel manufacturing method can be completed with only five photomask processes, thus simplifying the process and increasing yield. Although the present invention has been disclosed in the foregoing preferred embodiments, it is not intended to limit the present invention, any familiarity Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention
200407951 五、發明說明(9) . 護範圍當視後附之申請專利範圍所界定者為準。200407951 V. Description of Invention (9). The scope of protection shall be determined by the scope of the attached patent application.
第13頁 200407951 圖式簡單說明 ‘ * 【圖示說明】 第1 - 7圖··係以剖示圖圖示一習知薄膜電晶體面板之製 造步驟;及 第8 - 1 3圖:係以剖示圖圖示根據本發明一實施例之薄膜 電晶體面板之製造步驟。 【圖號說明】Page 13 200407951 Brief description of the drawings' * [Illustration] Figures 1-7 are sectional views showing the manufacturing steps of a conventional thin-film transistor panel; and Figures 8-13: The cross-sectional view illustrates the manufacturing steps of a thin film transistor panel according to an embodiment of the present invention. [Illustration of drawing number]
100 基 板 110 閘 電 極 120 電 容 電 極 130 絕 緣 層 140 非 晶 矽 層 140a 非 晶 矽 圖 案 150 刻 阻 絕 160 n + 摻 雜 非 晶 165 通 道 170a 源 極 170b 汲 極 170c 電 容 電 極 180 保 護 層 190 銦 錫 氧 化 層 192 正 光 阻 層 194 反 射 金 屬 層 200 透 明 基 板 210 閘 電 極 220 電 容 電 極 230 閘 絕 緣 層 24 0 非 晶 矽 層 240a 非 晶 矽 圖 案 250 1虫 刻 阻 絕層 2 50a 第 一 部 份 2 5 0 b 第 二 部 分 252 光 阻 層 254 光 阻 圖 案 2 54a 第 一 部 份 2 54b 第 二 部 分 256 光 罩 2 5 6a 狹 縫 260 n + 摻 雜 非 晶 265 通 道 2 70a 源 極 第14頁 200407951100 Substrate 110 Gate electrode 120 Capacitance electrode 130 Insulating layer 140 Amorphous silicon layer 140a Amorphous silicon pattern 150 Etched 160 n + doped amorphous 165 Channel 170a Source 170b Drain 170c Capacitance electrode 180 Protective layer 190 Indium tin oxide layer 192 Positive photoresist layer 194 Reflective metal layer 200 Transparent substrate 210 Gate electrode 220 Capacitor electrode 230 Gate insulating layer 24 0 Amorphous silicon layer 240a Amorphous silicon pattern 250 1 Insect resist layer 2 50a First part 2 5 0 b Second Part 252 photoresist layer 254 photoresist pattern 2 54a first part 2 54b second part 256 photomask 2 5 6a slit 260 n + doped amorphous 265 channel 2 70a source page 14200407951
第15頁Page 15
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CN105301833A (en) * | 2015-12-02 | 2016-02-03 | 上海天马微电子有限公司 | Array substrate, manufacturing method for array substrate and liquid crystal display panel |
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US9348171B2 (en) | 2005-03-31 | 2016-05-24 | Lg Display Co., Ltd. | Liquid crystal display device and method of fabricating the same |
TWI816520B (en) * | 2022-08-19 | 2023-09-21 | 友達光電股份有限公司 | Pixel array substrate and electrowetting display panel |
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