TW198782B - - Google Patents

Description

i9i3 Partial A6 B6 b_I Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (1) The present invention relates to a fast charging control circuit and control method for calling a receiver, and in particular relates to a fast The charge control circuit and its method, in response to a transmission or reception state of the data, control the operation of the fast charge control circuit in different ways in order to minimize the error of the received data. Normally, since the call receiver is operated by the voltage of a battery, it has an electric circuit that saves energy, and periodically and not continuously supplies power to a radio frequency (RF) receiving circuit in order to reduce the consumption of the source · To the lowest. Fig. 1 is a block diagram of a conventional call receiver having such a battery power saving circuit. An RF receiving circuit 110 converts the signal received by the antenna 190 into a baseband signal, and a waveform shaping circuit 120 waveform-shapes the baseband signal generated by the RF receiving circuit 110 into a logic signal having a predetermined size. A data processing circuit 130 responds to a transmission code format, generates a battery saving signal BS, and analyzes the data generated by the waveform shaping circuit 120 to provide a buzzer sound and display data. Yu Ying signal BS, the switching circuit 140 supplies the power of a battery 150 to the RF receiving circuit m, and the waveform shaping circuit 120, that is, the signal received by the antenna 100 is converted into a baseband signal in the RF receiving circuit 110, And waveform shaping by the waveform shaping circuit 120 is a logic input signal of the data processing circuit 130. The data processing circuit 130 processes the received data to generate a buzzer sound and display the data. Fig. 2 shows the waveform shaping circuit 12 «—the typical example circuit is not intended. Ran Zhe, the data processing circuit 130 has a battery saving function that generates a BS number. By providing a POCSAG (post office code standardized display country) code format, the smallest source is provided, so as to save the switching circuit 140 «, POCSAfflR format It is the current letter-4 commonly used for calling receivers all over the world-: This Ling Zhang applies from the Zhonger Yujia Dart Standard (CNS) A 4 secret (210 X 297 mm) 81.9.20,000 ------- ---------------- Install II ----. 玎 ------ ^ (Please read the precautions on the back before writing this page) A6 B6 Ϊ98782 V. Description of the invention (2) (Please read the urgent matters on the back before writing this page). No. form. The operation of the above battery power saving circuit is disclosed in U.S. Patent No. 4,479,261. As shown in the waveform shaping circuit 120 of circle 2, the call receiver of U1 requires a large-capacity capacitor C1 for waveform shaping, and the capacitor C1 is i connected in series or parallel to a round input end that receives the RF signal . Therefore, the charging and discharging image lobes of the capacitor C1 respond to the BS signal, and the required data cannot be obtained during a charging time constant determined by the resistor R2 and the capacitor C1. As a result, most of the waveform shaping circuits use a fast charging circuit to charge the capacitor C1 at a faster time than the time constant of the resistor R2 and capacitor C1. Furthermore, since the waveform shaping circuit 120 has a low-pass filter (LPF> 120a) for generating a reference voltage, it takes time to charge the reference voltage corresponding to the LPF 120a—the intermediate voltage. Therefore, the call is received In the device, before a self data frame is received, that is, before at least the same time as the time constant of the filter, the battery saves 15 channels of the image cycle is operated periodically. However, if the entire circuit is It is operated before the printed frame from the Central Standards Bureau of the Ministry of Information Economy and Industry Cooperative Consumer Cooperative is received, then unnecessary power will be supplied to the waveform shaping circuit 120 other than the circuit used to generate the reference voltage, so Reduce the power consumption efficiency. In order to improve this inefficient power consumption, the separate voltage 20 supplied to the RF receiving circuit UI0 and the waveform shaping circuit 120 is used to first supply the reference voltage of the waveform shaping circuit 120. . An example of pseudo-disclosure is disclosed in US Patent No. 4,479,261. However, in traditional call receivers, if data is transmitted If the code length is very long, then it is difficult to maintain the charging voltage fixedly, and there may be a «poor in the data. In addition, if the main power of the call receiver is turned off, this paper standard applies to the B family Standard (CNS) A 4 specifications (210 X 297 mm) 81.9.20,000 A6 B6 198782 V. Description of the invention (3) Closed, causing the capacitor to be completely discharged, then when the main power of the receiver is called, it will be needed. It will work normally after a long period of time. That is to say, there may be errors in the data transmitted immediately after the main power supply is turned on and off. Therefore, one purpose of the present invention is to provide a circuit and control method According to the data transmission state, the power supply and fast charging are controlled in the first and second operating states, so as to minimize the error of the received data. 0._SS_ Printed the present invention by the Consumer Labor Cooperative of the Central Bureau of Standards Another purpose is to provide a circuit and a control method for supplying power only when a serial number, a synchronization code, and a self frame are detected. Another object of the invention is to provide a circuit and a control method for maintaining a charging reference voltage even when receiving a long string of data when using a fast charging circuit, so as to prevent errors in the data. Another object is to provide a circuit and a control method for improving the accuracy of detecting self-data and reducing unnecessary power consumption. According to one aspect of the present invention, in order to minimize power consumption, a receiving unit It is turned on and off in the cycle of the first operating state. When the receiving unit is turned off, if the first predetermined code (sequence number) is received, the call receiver responds to the scheduled call receiver in the second operating state Ma Shitong, only receives the necessary information. That is to say, the data received through the waveform shaping circuit is analyzed to see if the first predetermined number (sequence number) or the second predetermined code (synchronization code) can be detected, and the receiving unit understands the corresponding code. Kaifeng and Ben · Paper only applies to the National Standards (CNS) A4 specifications (210 X 297 mm) 81.9.20,000 A6 B6 0 0 > "--- ——The Ministry of Economic Affairs Central Standards Bureau 1S8V62 printed by the cooperative. V. Description of invention (4) Closed, thus minimizing power consumption. Since the receiving unit is opened and closed according to the first operation state, a capacitor in the waveform shaping circuit is charged and discharged. As a result, if the receiving unit is turned on and off after the full container is completely discharged, the waveform shaping cannot be formed until a reference voltage required for waveform shaping is obtained. If the data transmission speed is fast, the larger the capacitance of the capacitor, the more bits the data will lose. Therefore, after the first or second predetermined code is detected in the first operating state, the capacitor in the waveform shaping circuit is charged in the second operating state, and its time is faster than a predetermined charging mold, thereby reducing data errors. According to another aspect of the present invention | When shaping the waveform of an RF received signal, if there is self data after detecting a serial number signal, fast charging is not performed, so that the intermediate voltage of PF, and The reference voltage of a voltage comparator will be equal. In order to make the present invention easier to understand, and to show that it can be implemented, the following will refer to the attached ring type examples for details. Brief description of the diagram: Figure 1 is-the block circle of the traditional call receiver. Fig. 2 is a circuit diagram of the waveform shaping circuit of Fig. 1; Figure 3 is a block diagram of a call receiver of the present invention. Figure 4 is a schematic diagram showing a POCSAG code format applied to the present invention; Figures 5A to 5D are operation waveforms in a first operating state according to the first embodiment of the present invention. No. 6Αϋ to 6D · According to the first embodiment of the present invention, a second operating paper scale is applicable to the Chinese National Standard (CNS> A 4 specifications (210 X 297 mm) ----------- ------------- ^ 1 —---- • 玎 ------ marry (please read the notes on the back before filling this page) 81,9 · 20,000 A6 B6 10 ._2S_ Printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy. I98V82 V. Description of the invention (5) Operating waveforms in working state. FIG. 7 is a flowchart showing the first implementation of the fast charging control step according to the invention Example 8A to 8D are the operation waveforms according to the second embodiment of the present invention. The 9th circle is a process circle showing the second embodiment of the fast charging control procedure according to the present invention. Know the 3rd circle of reference circle A battery 270 generates a voltage at a predetermined level, and an RF receiving road 210a responds to a BS signal and demodulates the signal received by a wireless 200 into a baseband signal. A waveform shaping circuit 210b has a charging circuit, Used to charge a predetermined input signal to generate a -reference voltage Vo, and compare the baseband signal with the reference voltage Vo according to the BS signal To generate a waveform shaping signal.-The fast charging circuit 210C quickly charges the reference voltage Vo of the waveform shaping circuit 210b in response to a fast charging control signal QC. A serial number detector 240a operated by the battery 270's battery, and A synchronization code (CS) detector 240b, in the data generated by the waveform shaping circuit 210b, respectively detects a serial number signal, and a synchronization code ... a data processor 240C is operated by the pressure of the pond 270, and Process the entire batch of data generated by the waveform shaping circuit 210a. A switching controller 240d switches the voltage of the battery 270 at the time of the --operation state, and supplies the BS signal to the RF receiving circuit 210a and the waveform shaping circuit 210b, and the QC signal is supplied to the fast charging circuit 210C, so as to detect a first or second predetermined code. Furthermore, the switching controller 240d responds to the output of the serial number detector 240a and the SC detector 240h, with the second suspect The operating state controls the output cycle of the YC and QC signals in order to detect a -8-This paper is suitable for the national standard of China (CNS> A4 ΛΙ grid (210 X 297 mm) ---------- -------------- installed丨 ----, 玎 ------ ^ (Please read the precautions on the back before writing this page) 81.9.20,000 i9bV8 ^ Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs «A6 B6 V. Description of invention ( 6) The third predetermined code. A receiving unit 210 includes an RF receiving road 210a, a waveform shaping road 210b, and a fast charging circuit 210c, and a control unit 248 includes a serial number detector 240a, an SC detector 240b, and data processing 240c, and switching controller 240d. In this example, the control unit 240 can be constructed as a 4-bit, single-crystal H microprocessor. At the same time, a driving unit 258 can selectively drive a lamp 250a, a hoist 250b, or an S actuator 250c in response to the rotation of the data processor 240C. A record 260, such as a ROM (read-only record), stores a CAP (customer management board) code data.

In the fourth circle, the P0CSAG code is the signal format of 0 currently used for calling receivers all over the world, and is specified in CCIR recommendation 584. Furthermore, the POCSAG-code includes a serial number signal, and a complex value batch signal, each value of the entire batch signal has a SC code, and "frame". The serial number signal detects a received signal and is used to synchronize a clock to the received signal. The serial number signal will be called a "first predetermined signal". The SC code is used to synchronize the character L5 of a symbol signal, which includes the address, information, or empty symbol to be transmitted next. Signal, etc., the SC code is called-the second predetermined code. "The first predetermined code is an inverted signal of 101010, and in the POCSAG standard (CCIR 584) contains at least 576 bits, from the transmission part The rate is 512 bits per second, which is used to operate a power-saving circuit. Although a predetermined period (for example, 64 20-bit on, 512-bit off, or 32-bit on and off, 544-bit Yuan closed) multiple times, is supplied to the percussion frost road 210a, and the waveform shaping circuit 21Hb, but the RF receiver 210 can still receive the first predetermined code 0 P0CSAG code is arranged in a whole batch structure, including 32 膣The bit synchronization code (second pre-set), and 8 frames, each frame has a 32-bit address book »The standard applies to the Chinese National Standard (CNS) A 4 specifications (210 X 297mm) 81.9.20,000-installed ------- 玎 ------. ^. (Please read the notes on the back before writing this page) A6 B6 printed by the R Industry and Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of invention (7) Code characters and an information code character of 32 bits. That is, the whole batch structure includes 17 of 32 bits Code character. Assume that a self frame with an identification address is a "third predetermined code". Figures 5A to 5D show operation waveforms used to describe a first operation. ; Operating status, and shows a charging level of the reference voltage Vo of the BS, QC signal, and the BS, QC signal when the main power supply of the call receiver is turned on and off, and no signal is transmitted.

FIGS. 6A to 6D illustrate the operation waveforms used to describe the second operation state, and show that the receiving unit 210 of the call receiver is periodically turned on or off by the BS and QC signals of the first operation state 0, In order to detect the serial number signal, or SC-code, Yu Yingyi transmits the operating state of the signal. Figure 7 is a flow stalk diagram, Yan shows the first :? The first embodiment of the call receiver fast charging control procedure shown in the figure. Figure 8A shows the P0CSAG system with a self-data frame, and Figures 8B 15 to 8D show the operation waveforms of the BS, QC signals, and the reference of the capacitor C1 in the waveform shaping circuit 210b when there is a self-data frame. A charging level of the voltage Vo. 9th_Yes-Flowchart, showing a second embodiment of the call receiver fast charging control procedure of FIG. 20. The operation of the fast charging control according to the first embodiment of the present invention will be described in detail with reference to FIGS. 2 to 7. If the main power of the call receiver is turned on as shown in 5A ·, the switching controller 240d in the control unit 248 accesses the data stored in the betting account 260 (step 272 in the seventh garden). In step 280, the switching controller 240d is based on -10-the standard of the national standard (CNS) Grade 4 (210 X 297 mm) of this paper (210 X 297 mm) 81.9.20 000 ------------ ------------ installed ------, 玎 ------ line (please read the precautions on the back before writing this page) ί Α6 Β6 0 0 Central Ministry of Economic Affairs Printed by the Bureau of Standards, Industry and Consumer Cooperatives * V. Description of the invention (8) Once accessing the data, switch the power of the battery 270, and supply the BS and QC signals with the TO and T2 periods of 5B and 5C respectively. To RF The receiving circuit 210a and the fast charging circuit 210c. In this example, the period T2 is determined based on the second predetermined code (SC code) used to detect 32 bits or at least 32 tilt bits in the first predetermined code (sequence number) of 576 bits ΟΝ / OFF ratio. The period TO of the BS signal shown in circle 5B, when the power supply is turned on and off, is sufficient to charge the voltage of the capacitor C1 in the waveform shaping circuit 210b from 0V to the reference voltage Vo as shown in FIG. 5D. If in step 280, the switching controller 240d generates the BS and QC signals of the periods TO and T2 shown in FIGS. 5B and 5C, the RF receiving circuit 2a 0a, and the waveform shaping circuit 210b are 8 $, and 0 (: In the input period of the signal, the code format is provided as shown in FIG. 4-the received signal is given to the control generation 240. The serial number detector and the SC detector 240b respectively detect the first predetermined code in the received signal shown in FIG. (Serial number signal), and the second predetermined code (SC code) to supply the detected code to the switching controller 240d. In this example, the switching controller 240d in step 282, checks whether the serial number, or SC code is Detected. If the serial number and SC code are not detected in step 282, the BS and QC signals with periods T1 and T2 are supplied to the RF receiving circuit 210a and the waveform shaping circuit 210b in step 284. This At the time, during the period T1, the BS and QC signals are maintained at a low state, and during the period T2, they are maintained at the-high state. Then, in step 286, check whether the serial number is detected, if not detected At this point, step 286 returns to step "284, in order to operate in« Chi Province « , The serial number is generated. In other words, the m source is supplied to rf -11 only during the period when the first and second predetermined codes are detected in the transmission code shown in FIG. 4-This paper size applies to China National Standards (CNS) A4 specifications (210 X 297 mm> 81.9.20,000 (please read the notes on the back before filling out this page) i9bi62 Α6 Β6 Printed by the Central Bureau of Standards of the Ministry of Economic Affairs and Industry and Consumer Cooperatives V. Invention Instructions ( 9) The receiving circuit 210a and the waveform shaping circuit 210b start the first operating state. Therefore, if the main power supply is initially turned off, the charging circuit in the waveform shaping circuit 210b is charged between V2 and VI, And in response to the operation of the BS and QC signals, it is charged and discharged as shown in FIG. 5D. In FIG. 5D, the period of ΟΜΠ OFF is usually selected as follows: TO ^ T2, ΤΙ »T2 If in FIG. 5B During the period T2 shown in FIG. 5C, the sequence number detector 240a detects the sequence number, and the switching controller 240d generates BS and QC signals having the period T3 shown in FIGS. 6B and 6C in step 288, and the receiving unit 210 is turned on. From Θ to SC code is detected. Then, in step 300, The switching controller 240d checks-depending on whether the SC code is detected by the SC detector 240b. If the SC code is detected in step 3, the BS, and QC signals follow the periods T4, T5, TC shown in FIGS. 6B and 6C, respectively , And T7, as well as Ήβ and T7, repeat the low and high states, thus minimizing power consumption and only receiving necessary data. Then, in step 304, check whether the SC code is detected. Periods T4, T5, T6, and T7 are determined by the CAP code in the memory 260 of FIG. In this example, in the 8-tilt frame of each partial batch of signals, the self-frame (the third predetermined code) with an identification address is in the period T4 of the CAP code in the 260 in the body Checked in T5 and T6. If the SC code is not detected in the period T7, the receiving unit 210 is defeated during the period M8 to detect the received code, and if the sequence number or SC code is detected during the period T8 In this case, the BS and QC signals are maintained at the high and low states as shown in circle 5B or 5C. Therefore, when the serial number or SC code is detected, an output operation status of the QC signal is displayed in _6C. That is to say, during the period T5 after the SC code is detected, -12-This paper scale is applicable to the Chinese Noodle Standard (CNS) A 4 specification (210 X 297 mm> 81.9.20,000 ------- ---------------- Install ------. 玎 ------. ^. (Please read the precautions on the back before writing this page) Α6 Β6 0 2 Printed by Beigong Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs * V. Description of the invention (10) When the BS signal is enabled, the QC signal is disabled, but the QC multiple is only operated during the period T7. Results , "Γ or" 0 "the error generated by continuous ore data can be reduced, and when a long series of data is connected to a serial number, the rate of change of the reference voltage Vo will become smaller. Figure 6D shows the reference voltage Vo Yu responds to one of the operations of the BS and QC signals changing state, and we will easily understand that the reference voltage Vo that changes during the period T5 is recovered during the period T7. That is, the receiving unit is switched periodically In the operation to detect the serial number, (3C signal and BS signal are the same, and if the serial number is detected, the QC multiple number will be invalid in the self-information frame, to The error that will occur when the data of " Γ or "0" is received consecutively is reduced. Moreover, when each Si: code opens and fails the QC multiple, it will make the reference voltage when receiving a long series of data Variations of the are reduced, so that the error generation rate is also reduced. As mentioned above, since the change of the reference voltage used for waveform shaping can be minimized by a fast charge control system, if a long string of data is received The error can be reduced, thereby improving the reliability of the call receiver. The operation of the fast charging control according to the second embodiment of the present invention will be described in detail with reference to FIGS. 3 and 8A to 9. Please refer to FIG. 9, Step 400 to step 408 are generally the same as step 272 to step 28Γ in FIG. 7. If in step 408, during the time period T2 shown in _5 丨 丨 and 5C, a sequence number exceeding 12 _ bits is detected, Then the BS signal stays in a high state during the period T3 shown in 8B * until the SC code is detected, and during the period Π shown in circle 8C, the QC signal also holds -13-(please first (Read the notes on the back Ran Ran wrote this page). Binding-Order. This paper scale is applicable to the Chinese National Standard (CNS) A 4 specifications (210 · Χ 297 g) 81.9, 20,000 198V82 A6 B6 0,, _2_S Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs * V. Description of invention ( 11) In a high state (step 410). Next, in step 412, it is determined whether the SC code is detected. If the SC code is detected, the BS signal is in the periods T4, T5, T6, and T7, repeat low and high state. In other words, the BS signal is 32 bits before the data frame (the third predetermined code) and becomes a high state, and the data is processed during the period of T5, so the data display, buzzer, Or vibrator operation. At this time, the QC multiplier maintains a low state during the period T9 shown in FIG. 8C. In other words, since the QC signal pseudo maintains a low state after the serial number signal is detected, the reference voltage Vo of the waveform shaping circuit 210b The value will be the same as an intermediate voltage value of the LPF output signal in the waveform shaping circuit 210b, thus preventing data loss and reducing power consumption. In step 416, it is checked whether the SC code is detected. If it is not detected, the receiving unit 21Ό is turned on during the period T8 to detect the received code, and if the serial number or SC code is not detected during the period T8. BS, and QC signal is maintained In the high and low states shown in FIGS. 5B and 5C, in this case, the reference voltage Vo of the waveform shaping circuit 210b is charged to the power V3 during the period T3, and is discharged. After the serial number is detected, the BS signal of the capacitor C1 is charged and discharged until all information is received, so the reference voltage V is pseudo equal to the output voltage of the LPF. Therefore, after the serial number is detected, fast charging is not performed, and the entire batch of data is processed. If only the serial number is detected and there is no self data, then the QC signal is synchronized with the BS signal. As mentioned above, since the fast charge is only performed when the serial number is detected, the reference voltage used for waveform shaping is the same as the output voltage of the LPF, ---------------- -------- installed ------- ordered ----- line (please read the precautions on the back before writing this page) This paper size is applicable to China National Standard (CNS) A 4 Specifications (210 X 297 mm) 81.9.20,000 Ι9ϋϊΒ2 Α6 Β6 V. Description of the invention (12) ^ _g_ The Central Bureau of Standards of the Ministry of Economic Affairs 8 Industrial and Consumer Cooperatives has less printed land. However, it is easy to get low, the content is that the top line is very eye-catching, such as the number of stats and the energy consumption of the gods, and the resources of the concentrate resources show that this will not be issued in this or special edition. ,, has been out of the _ material rate difference of 15 cases off the speed misuse. · The delivery and the realization of the Fu Fujia-change the special theory of the loss of the unpredictable unexpected gains, the wise should be connected and the type of stop is more preventive. Therefore, even if you are familiar with the inspection, you can still be accepted. (Please read the precautions on the back before writing this page.) This paper size is applicable to China National Standard (CNS) A4 specifications ( 210 X 297 mm) 81.9.20,000

Claims (1)

A7 iSbV82 B7 C7 ---- D7 '' Six 'patent application Fan Gu 1 1 ◆ A fast charging control circuit for calling the receiver, the call is received (¾ read the precautions on the back and then fill in this page to have a use A power supply device for supplying a predetermined level voltage, a radio frequency receiver device for responding to a battery power saving signal, demodulating a received signal into a baseband signal, and a battery power saving signal , The baseband signal is compared with a predetermined reference battery to generate a waveform shaping device that is shaped by the waveform, and a fast charging signal to respond to a fast charging signal, a fast charging of the reference voltage A fast charging device, the fast charging control circuit includes: a first predetermined code detector device, and a second predetermined code detector device 10 connected to a battery voltage for use in the data generated by the waveform shaping device, A first predetermined code and a second predetermined code are detected respectively; the data processing device is connected to the battery voltage and used to process a third predetermined data in the data generated by the waveform shaping device Ma; and a switching controller device for switching between the battery power saving signal and the fast charging signal in a cycle of a first operating state, in order to detect the consumption of the industrial and commercial power of the Ministry of Economic Affairs Printed by the cooperative—the predetermined code, the second predetermined code, and the output of the first and second predetermined code detector devices to switch the battery power saving signal in one cycle of a second operating state, and The fast charging signal in order to detect the third predetermined code. 20 2. The fast charging control circuit as described in item 1 of the patent application range, wherein the weekly survey of the first operating state generated by the switching controller device, Enable and disable the battery power saving signal and the fast charging signal to detect the predetermined position in the area in front of the first and second predetermined codes. The standard of clothing and paper uses the Chinese National Standard (CNS ) A 4 specifications (210x297 mm) Six A7 Β7 C7 D7 15 In the printing process of the Beigong Consortium Bureau Beigong Consumer Cooperative Co., Ltd. Please apply for a patent court ffl 3. The fast charging control as described in item 2 of the patent application country Control circuit, wherein the period of the second operating state generated by the switching controller device enables and disables the battery power saving signal and the fast charging signal to detect the position of the second predetermined code, and a The bit data of the self-frame is a predetermined bit in the front area. 4. The fast charging control circuit as described in item 3 of the patent application, where the first, second, and third predetermined codes are the sequence Number, synchronization code, and batch data. 5. A fast charging control method for calling receiver, which has a power supply device for dipping a predetermined level of electric A battery saving signal, a fast charging signal, a receiver signal demodulation, waveform shaping, a receiver device, and a switching controller device are used for a cycle in a first operating state, The battery saving signal and the fast charging signal are switched to detect the first predetermined code and the second predetermined code, and are used to match the first predetermined code detector device and the second predetermined code to perform a second operation Stateful Cycle, switch the battery saving signal and fast charging signal to detect a third predetermined code, the method includes the following steps: When-until the power supply, the battery is generated during the first and second cycles, respectively Power saving signal and fast charging signal for detection-the first predetermined code and a second predetermined code, a% depends on whether the first or second predetermined code is detected; when in the first or second flash In the fixed code detection step, the first and second predetermined code are not detected, and the battery is used during the third and second cycles, respectively-(-Please read the precautions on the back before filling in this page. Order. • Line · This paper is used in the middle of ΒΒ 家 #Bi (CNS) A 4 specifications (2 丨 0x297mm) AT B7 C7 ----_ Six 'patent application Fan 1 power saving signal and fast charging signal Valid and invalid, and check whether a third predetermined code is detected; when the first predetermined code is not detected in the first predetermined code detection step, repeat the valid and invalid steps when the first The predetermined code is checked 5 _ when, during a fourth cycle, the The battery saving signal and the fast charging signal are valid to detect the second predetermined code, and check whether the second predetermined code is detected; when the second predetermined code is detected in the second predetermined code detection step, a In the second predetermined code detection period, the fast charging signal is switched to switch a battery saving signal in a third predetermined code tide detection period within the second predetermined code detection period, and it is checked whether a second predetermined is detected Code; and "when the second predetermined code is detected, repeat the second predetermined code detection cycle and the third predetermined code detection cycle switching step, when the second predetermined code is not detected, a first During five cycles, the battery power saving signal is valid, and π switches the fast charging signal during a predetermined period of the second predetermined code period, and returns to the first predetermined code or the second predetermined code detection step a 6. A fast charging control method for a call receiver, the call receiver has a power supply device for supplying a predetermined level voltage, and responds to a battery-saving telecommunication with 20 , And a fast charging signal, a received signal is demodulated and shaped into a waveform-receiver device> and a switching controller device, which is used to switch the The electrical signal and the fast charging signal are used to detect the first and second predetermined codes, and are used to detect the first predetermined code detector device and the second predetermined code. -_____ This paper "scale is applicable to the BB home sample standard (CNS) A 4 specifications (210x297 mm) (¾ read the notes on the back of the moraine before filling out this page A7 B7 C7i_z____ D7__ printed by the cooperative. Sixth, apply for a patent court® 1 code, switch the battery power saving signal and fast charging signal in a cycle of a second operating state, so as to detect a third predetermined code, the method includes The following steps: When one to the power supply is available, during the first and second cycles, respectively, 5 generates the battery power saving signal and fast charging signal to detect a first predetermined code, and a second predetermined code, and View the first or second reservation Whether the code is detected; when the first or second predetermined code is not detected in the first or second predetermined code detection step, the battery 10 power saving signal is made during the third and second cycles, respectively , And fast charging signals are valid and invalid, and check whether a third predetermined code is detected; when the first predetermined code is not detected in the first predetermined code detection step, repeat the valid and invalid Step, when the first predetermined code is detected, validate the battery power saving signal and the fast 15 charging signal during a fourth period to detect a second predetermined code and detect whether the second predetermined code is detected Reservation code; (-Read the precautions on the back and then fill in this page. 0 2 When printing at the Consumer Cooperative of the Ministry of Economic Affairs, the Consumer Cooperative is out of date and code. Electric five pre-second test to fill the first test-the first one to the code is fast in the determination and the pre-test is ready, back-the third step in the third step back to the second step Step and measure and cut in time There are 0 codes missing in the fixed week, and the code prediction number is the fixed number. The \ detection step, the pre-signal, the first code, the electrical test, the second telecommunication, the second provincial inspection, the first charging, the pre-pool code, the speed, the first test, the third power, and the fast pool The inspection shall be conducted in advance, the electrical measurement shall be conducted, and the inspection shall be carried out, or the validity of the paper shall be in accordance with the specifications of the Chinese Standard (CNS) Grade 4 (210x297 mm).