TH40491A - A large-scale synthesizer control system for personal mobile phone systems and methods for controlling large-scale synthesizers for such systems. - Google Patents

Abstract

DC60 (30/07/42) The modem IC controls the terminal devices open via latches LE1 and LE2. The PLL synthesizer IC1 and IC2 control the frequency setting write. This causes different write times between the PLL synthesizer ICs, allowing PLL frequency setting data to be written to two PLL synthesizer ICs via the same control line. This generates a control signal for the terminal device open via latch LE2, which controls the frequency setting write to the PLL synthesizer IC2 from other control signals using an inverter and NAND circuit. The modem IC controls the terminal devices open via latches LE1 and LE2. The PLL synthesizer IC1 and IC2 control the frequency setting write. This causes different write times between the PLL synthesizer ICs, allowing PLL frequency setting data to be written to two PLL synthesizer ICs. A frequency synthesizer using two PLLs will be acted upon by a single control line, generating control signals for terminal devices via a latch. LE2 controls the writing of frequency setting data to the PLL IC2 frequency synthesizer using other control signals via an inverter and NAND circuit.

Claims (6)

1. A multi-stage synthesizer control system for personal mobile phone systems consists of an antenna unit, receiver, transmitter, unit-based unit, modem IC, and CPU for processing data fed to the CPU from the receiver via the modem IC, and transmitting/receiving signals at a 1 frame 2 track rate. The modem IC contains pathways for setting the data frequency to be used for transmitting/receiving signals to the unit-based unit. The unit-based unit comprises VCO unit one, VCO unit two, VCO unit two, unit-based switch one for outputting unit inputs from VCO unit one and VCO unit two for each track. A PLL frequency synthesizer IC one controls VCO unit one and VCO unit two using frequency setting data from the modem IC. A PLL frequency synthesizer IC two controls the VCO unit two. The first and second unit, as mentioned, are equipped with frequency setting data from the modem IC. An inverter is used to invert the output of the modem IC's switch, and the inverted signal is input to the switch control of the first unit. A NAND circuit is used to perform NAND operation on the inverter output and the modem IC output to switch the power supply to the first PLL frequency synthesizer on, and the NAND signal is input to the terminal device opened by the second latch, which the second PLL frequency synthesizer IC controls the writing of frequency setting data. 2. A multi-stage synthesizer control system for personal mobile phone systems compliant with claim 1, whereby such modem IC also includes pathways connected to the first PLL synthesizer IC and the second PLL synthesizer IC for control of the first latch-opened terminal, which the first PLL synthesizer IC controls the write of the scheduling data, and the second latch-opened terminal, which the second PLL synthesizer IC controls the write of the scheduling data, thus making write timings different between the first PLL synthesizer IC and the second PLL synthesizer IC to enable write of scheduling data to the first PLL synthesizer IC and the second PLL synthesizer IC. The use of the second PLL allows for action to be received through the same control line, generating control signals to the terminal device opened by the second latch from other control signals using the said inverter and NAND circuit. 3. A multi-stage synthesizer control system for personal mobile phone systems compliant with claim 2, which also includes a path for writing calibration data, which is timed for writing calibration data to the first PLL synthesizer IC as previously mentioned, the signal for switching the power supply to the first PLL synthesizer IC is turned on and is controlled at a high level, and writing calibration data to the second PLL synthesizer IC as previously mentioned, the signal for switching the power supply to the second PLL synthesizer IC is turned on and is controlled at a high level. 4. A method for controlling multiple synthesizers for a multi-synthesizer control system for personal mobile phone systems compliant with Representation 1, consisting of the following steps: inversion of the switch output of the said modem IC by such inverter and input of the inverted signal to the switch control section of the first control unit; NAND operation of the output of such inverter and the output of such modem IC for switching the power supply to the first PLL frequency synthesizer open by such NAND circuit and input of the NAND signal to the terminal open by the second latch, where the second PLL frequency synthesizer IC controls the writing of frequency setting data; setting the frequency data to be used for signal transmission/reception to the said unit by such modem IC; control of the first and second VCO units by the frequency setting data from such modem IC by such first PLL frequency synthesizer IC. The first and second VCOs are controlled using frequency setting data from the modem IC, which acts as the second PLL frequency synthesizer IC. The main input outputs are alternately set from the first and second VCOs for each track via the first main switch. 5. A method for controlling multiple synthesizers for a multi-stage synthesizer control system for personal mobile phone systems that conforms to claim 4, which also includes the following steps performed by the modem IC: control of the first latch-opened terminal, in which the first PLL-based frequency synthesizer IC controls the write of the tuning data; control of the second latch-opened terminal, in which the second PLL-based frequency synthesizer IC controls the write of the tuning data; setting the write timing of the tuning data differential between the first PLL-based frequency synthesizer IC and the second PLL-based frequency synthesizer IC so that tuning data can be written to the first PLL-based frequency synthesizer IC and the second PLL-based frequency synthesizer IC via the same control line; and generating a control signal to the second latch-opened terminal from the modem IC. Other control signals are generated using the aforementioned inverter and NAND circuit. 6. The method for controlling multiple synthesizers for a multi-synthesizer control system for personal mobile phone systems compliant with claim 5 consists of the following steps: writing the timing frequency setting data to the first PLL-based frequency synthesizer IC as previously stated, with the signal for switching the power supply to the first PLL-based frequency synthesizer IC turned on and controlled at a high level; and writing the frequency setting data to the second PLL-based frequency synthesizer IC as previously stated, with the signal for switching the power supply to the second PLL-based frequency synthesizer IC turned on and controlled at a high level.