TH20750B - Video decoder with interchangeable paste data processing - Google Patents

Abstract

DC60 (24/11/41) MPEG decoder (14,18, 22) in high definition television sets will Decodes and decompress MPEG encoded data to create extracted image pixel clusters. And it will include a motion compensation network (90 ....) connected to the memory frame (60) to generate data. The final decoded image pixels for displaying the decompressed MPEG data will be re-compressed by the machine. Repress many parallel signals (40, 42) before saving them in frame memory. Each new compressor receives a stream of interlaced pixel data (24,27 Fig. 5) and is projected. And will compress the interpolated pixel values (a, c) during each respective clock cycle (Fig. 20,27). One of the new compressor (42) is degraded in the data processing mode that Decreased when pixel data is sub-sampled (36, 38) before reprogramming. The data was sampled. The sub will be reordered (43) before re-recording. Multiple parallel decompressors (80, 82, 84) attached to frame memory provide pixel information to the control unit motion processing network circuit (356, 360, 364, Fig. 23. ) Will ensure that uninterrupted interrupted information flows To the decompression machine by duplicating the last usable data repeatedly when the data source is interrupted. Decoder MPEG (14,18,22) in a TV set with high picture resolution Decode and decompress MPEG encoded data to create extracted pixel clusters. And it will include a motion compensation network (90 ...) connected to the frame memory (60) to generate data. The final decoded image pixels for the decompressed MPGE data display are re-compressed by the machine. Repress many parallel signals (40,42) before saving in frame memory. Each new compressor receives a stream of interlaced pixel data (24,27; Fig. 5) and will be anticipated and compressing the interlaced pixel values (a, c) during each respective clock cycle (Fig. 20,27). In the data processing module that Decreased when pixel data is sub-sampled (36,38) before reprogramming. Sampled data The sub will be reordered (43) before re-recording. Many parallel decomposers (80,82, 84) attached to frame memory provide pixel information to the motion processing network circuit. Ensure that uninterrupted information flows To the decompressor by duplicating the last usable data over and over when the data source is interrupted:

Claims (6)

1. a method for processing the data of a group of sequences containing the data group. The pixels of information that represent the image pixel information to bring out the macroscopic portions between Continuous pixels in the pixel group And create only different information It consists of the process of processing the pixel values of the first pixel group with a value prediction function. Pixels, using the previously encoded pixel value known during the first delay given to Related to scanning pixels Processing the pixel values of the second pixel group with a different second function. In parallel with the interpolation function processing, the first pixel value results in the delay. The first is assigned thereof and the transmission of the stream of pixel values being processed to the image signal processing device 2. Method of claim 1 where such second function consists of compression. Pixels and such a conveying process transport the compressed pixel values to the processing device. Such video signal 3. Method according to claim 2, where the first pixel group And the second one contains a macro group that is appropriate for MPEG 4. Method for claim 1 also includes the procedure for Arrangement of input pixel data as a sequence of interlaced pixel data elements 5. Method 2, where during the humid delay the first pixel value is expected. And the second pixel value will be compressed and during the second delay the first pixel value will be compressed. And the second pixel value It was expected 6. Method of claim 5 where the delay of one And the second is the clock time, respectively. 7. Method according to claim 4, where the said organizing process includes the steps of Splitting the input stream into multiple streams with inserted pixel data. One switch of the said stream will contain pixel data that is interlaced in the said arrangement. 8. Method according to claim 7, where the separation process creates the first stream of the data element. The first and second interlaced pixels And the second stream of the third and fourth interlaced pixel data elements. The first, second, third, and fourth data elements contain a group of information. Sector suitable for MPEG 9. Predictive system optimized for processing group streams. The sequence contains the pixel clusters of data that represent the image pixel information and to delimit the reciprocal hyperpigmentation between the consecutive pixels in the pixel clusters and generate only different information. Which consists of Signal input network for receiving a stream of image pixel data. A predictor logic for predicting pixel values in a certain pixel group using values. Known previous encoded pixels A signal compressor for paralleling the pixel value of the second pixel group. With the anticipation of such values in the aforementioned pixel clusters and a signal exit network for providing a stream of pixel values that are compressed to Image Signal Processing Device 1 0. System according to claim 9 where such pixel clusters contain macroscopic clusters suitable for MPEG 1. 1. System according to claim 9, where the signal processing network is integrated in the MPEG 1-appropriate decoder DPCM motion compensation processing circuit. 2. System according to claim 9, where the signal input receives information in the form of a sequence of interlaced data values 1. 3. System according to claim 9 where the pixel value of the said first pixel group is expected during the delay time. One involves scanning pixels. And will be compressed during the next two delay, and the pixel value of that second pixel group of data will be expected during that second delay and will be compressed during the delay. One such 1 4. System according to claim 13, where the first delay And the second, the above, is a continuous clock cycle whereby the pixel values being acted upon for the expectation And recording over two clock cycles 1 5. The system according to claim 12 also includes a splitter for splitting the input stream into a large number of valuable streams. The interleaved information received by the above signal input 1. 6. System according to claim 15, where the splitter produces the first stream of the first and second interlaced pixel value and the second stream of the third pixel value. And the fourth that was interlaced The first, second, third and fourth pixel values contain the appropriate macros for MPEG.