TH171546A - Power converter - Google Patents

Abstract

------ 17/05/2018 ------ (OCR) page 1 of number 1 page invention summary. A technique for reducing the required power capacitance for a power buffer circuit is provided. A converter (3) rectifies the full wave of the single phase voltage (Vin) and then feeds the voltage. The rectified power (Vrec) crosses the DC power lines (LL and LH), the inverse (5) receives the rectified voltage (Vrec) and supplies the three-phase AC (Iu, Iv and Iw). To the inductive load (6), the power buffer circuit (4) is connected between the DC supply lines (LL and LH) .The power buffer circuit (4) includes a discharge circuit (4a) and a capacitor discharge circuit (4b). ) The discharge circuit (4a) will include a capacitor (C4) and a switch (Sc) connected to each other.The discharge circuit (4b) is shaped, for example, by a commutated circuit and is combined. To the switch (S1), the reactant (L4), and the diode (D40), the power buffer circuit (4) prepares and receives the portion of the power pulse that is fed into the converter ( 3) To and from DC power lines (LL and LH) ------------ Revised 06/06/2016 Techniques for reducing the required power capacitance for power buffer circuits are given. Prepare The converter (3) rectifies the full wave of the single-phase voltage (Vin) and feeds the rectified voltage (Vrec) across the DC power lines (LL and LH). 5) It receives the rectified voltage (Vrec) and will supply three phase alternating current (Iu, Iv and Iw) to the inductive load (6). Power buffer circuit (4) will be connected between the DC supply lines. (LL and LH), the power buffer circuit (4) includes a discharge circuit (4a) and a capacitor discharge circuit (4b) .The discharge circuit (4a) will include a capacitor (C4) and a switch (Sc. ) Connected to each other, the discharge circuit (4b) is shaped, for example, by a level interrupted circuit and will include a switch (SI), a reactor (L4), and a diode (D40). The power buffer circuit (4) prepares and receives the portion of the power pulse being Feed into the converter (3) to and from the DC power supply lines (LL and LH) ---------------------------- ----------------------------------------------- Techniques for Reducing the required power capacitance for a power buffer circuit will be provided.The converter (3) rectifies the full wave of the single phase voltage (Vin) and will feed the rectified voltage (Vrec). At the crossover of the DC power line (LL and LH), the converter (5) receives the rectified voltage (Vrec) and supplies three-phase AC current (Iu, Iv and Iw) to the inductive load. (6) Power buffer circuits (4) are connected between the DC distribution lines (LL and LH) .The power buffer circuits (4) include a discharge circuit (4a) and a capacitor discharge circuit (4b). A discharge (4a) will include a capacitor (C4) and a switch (Sc) connected to each other.The discharge circuit (4b) is shaped, for example, by a level chopping circuit and will include a The switch (Sl, reactor (L4), and diode (D40), the power buffer circuit (4) prepares and receives a portion of the pulses of power that are fed into the converter. (3) To and from the DC power distribution lines (LL and LH).

Claims (1)

: ------ 17/05/2018 ------ (OCR) page 1 of number 1 page invention summary A technique for reducing the required power capacitance for a power buffer circuit is provided. A converter (3) rectifies the full wave of the single phase voltage (Vin) and then feeds the voltage. The rectified power (Vrec) crosses the DC power lines (LL and LH), the inverse (5) receives the rectified voltage (Vrec) and supplies the three-phase AC (Iu, Iv and Iw). To the inductive load (6), the power buffer circuit (4) is connected between the DC supply lines (LL and LH) .The power buffer circuit (4) includes a discharge circuit (4a) and a capacitor discharge circuit (4b). ) The discharge circuit (4a) will include a capacitor (C4) and a switch (Sc) connected to each other.The discharge circuit (4b) is shaped, for example, by a commutated circuit and is combined. To the switch (S1), the reactant (L4), and the diode (D40), the power buffer circuit (4) prepares and receives the portion of the power pulse that is fed into the converter ( 3) To and from DC power lines (LL and LH) ------------ Revised 06/06/2016 Techniques for reducing the required power capacitance for power buffer circuits are given. Prepare The converter (3) rectifies the full wave of the single-phase voltage (Vin) and feeds the rectified voltage (Vrec) across the DC power lines (LL and LH). 5) It receives the rectified voltage (Vrec) and will supply three phase alternating current (Iu, Iv and Iw) to the inductive load (6). Power buffer circuit (4) will be connected between the DC supply lines. (LL and LH), the power buffer circuit (4) includes a discharge circuit (4a) and a capacitor discharge circuit (4b) .The discharge circuit (4a) will include a capacitor (C4) and a switch (Sc. ) Connected to each other, the discharge circuit (4b) is shaped, for example, by a level interrupted circuit and will include a switch (SI), a reactor (L4), and a diode (D40). The power buffer circuit (4) prepares and receives the portion of the power pulse being Feed into the converter (3) to and from the DC power supply lines (LL and LH) ---------------------------- ----------------------------------------------- Techniques for Reducing the required power capacitance for a power buffer circuit will be provided.The converter (3) rectifies the full wave of the single phase voltage (Vin) and will feed the rectified voltage (Vrec). At the crossover of the DC power line (LL and LH), the converter (5) receives the rectified voltage (Vrec) and supplies three-phase AC current (Iu, Iv and Iw) to the inductive load. (6) Power buffer circuits (4) are connected between the DC distribution lines (LL and LH) .The power buffer circuits (4) include a discharge circuit (4a) and a capacitor discharge circuit (4b). A discharge (4a) will include a capacitor (C4) and a switch (Sc) connected to each other.The discharge circuit (4b) is shaped, for example, by a level chopping circuit and will include a The switch (Sl, reactor (L4), and diode (D40), the power buffer circuit (4) prepares and receives the portion of the pulses of power that is fed into the converter ( 3) to And from the DC power distribution lines (LL and LH). (Section one) which will appear on the advertisement page: ------ 17/05/2018 ------ (OCR) Page 1 of 3 pages. 1. A power converter that includes A direct current link (7) that includes the first power line (LH) and the second power line (LL), a converter (3) that accepts a single-phase AC load (Vin) and feeds a pulsed current. Pin to the DC link, the inverse (5) powered by the DC link. And feed out alternating current (Iu, Iv and Iw) and buffer circuit: