SU997247A1 - Switching apparatus for monitoring parameters of electric circuits - Google Patents

Description

The invention relates to electrical measuring equipment, in particular, automatic devices for monitoring the insulation resistance of electrical circuits. .

The known switch for the device for monitoring the parameters of electrical circuits, containing controlled diodes and thyratrons, controlling the activation of actuating electromagnets.

However, such a device does not have high speed.

The closest to the proposed is a switch for devices for monitoring parameters of electrical circuits, containing a n-bit first and n + 1-bit second shift registers, whose discharge outputs, besides the last bit of the second shift register, are connected to the control inputs of their respective electromagnetic keys of the first and second switches, the first conclusions of each of which are connected with. the first and second tires of the meter, and the second - with the corresponding tires of measuring circuits t

However, the known device does not have a high speed due to re-switching by step finders of previously tested depot. The aim of the invention is to increase (std.

In order to achieve the set circuit in the switch for devices for monitoring the parmeters of electrical circuits, containing n bit of the first and n + 1 bit of the second shift register, the outputs of the bits, except the last bit of the second shift register, are connected to the control inputs of the corresponding electromagnetic keys the first and second commuters of mutators, the first conclusions of each of which are connected to the first and second tires of the meter, and the second to the corresponding tires of the measuring circuits, n-1 elements And were entered, and the shift shift register 20 was executed Yen on I-K triggers, and a single output I-K of a trigger of the last bit of the first shift register and a count of the I-K of the flip-flops of the second shift register, whose single outputs, except for the first and last bits, are connected, are connected to the first inputs of the AND elements. with the second inputs of the elements And, the outputs of which are connected to

30 setup inputs 1-K triggers

the corresponding bits, except the first bit, the first shift register.

The drawing shows a functional diagram of the device

The device consists of a fast 1.shift register, including triggers 2, a slow shift register 3, including triggers 4, AND 5 elements, a fast switch 6 assembled on a relay 7, a slow switch 8 assembled on a relay 9, a terminal block for connecting measured circuits -.

I The clock generator is connected to the counting input, 11 fast shift register.1. The installation bus 12 is connected to the installation input S of the first trigger 2 of the fast shift register 1 and to the installation input S of the first trigger 4 of the slow shift register 3. Tire. The 13 settings O are connected to the inputs R of flip-flops 2 and 4, respectively, fast 1 and slow 3 shift registers. The outputs 14 of the flip-flops 2 are connected to the relay 7 of the fast switch b. The outputs of the 15 elements And 5 are connected to the single input S of all the triggers of the rapid register 1 shift g, except for the first.

The outputs 16 of the flip-flops 4 of the slow shift register, except the first and last, are connected to the first input of the element 5 and to the relay 9 of the slow switch 8. The output 17 of the last fling-off trigger of the fast shift register is connected to the counting inputs of the slow triggers 4 (the shift register and to the second input element 5. The contacts 18 of the relay 7 of the fast switch 6 and the contacts 19 of the relay 9 of the slow switch 8 connect the tested circuits connected to the terminal, to the measuring device in the initial state all triggers, snaps 2 and 4 of the fast 1 and slow 3 registers Wig pulse on bus 13, the installation O is set to zero. By pulse on bus 12, installation 1, the first triggers of the fast and slow registers are set to the single position, the first relay 7 of the fast switch b and the first relay 9 of the slow switch 8, which have their contacts 18 and 19, respectively, are connected to a circuit measuring instrument for monitoring. When clock pulses arrive on bus 11 to the counting input of the fast shift register 1, the unit is pushed from the first trigger 2 of the fast shift register 1 to the last trigger 2 of the same register, for example, nth, alternately switching on relay 7 in the fast switch, the number of which is equal to n, contacts

18 of which are connected, in turn, through the terminal block to the measuring device from the second measuring circuit to the latter, thus providing a set of commutations with the other buses. After tripping in the quick register 1 of the shift of the last trigger 2, for example, from its output 17, a unit arrives at the counting inputs of the triggers 4

slow register 3 and pushes the unit in the slow shift register 3 from the first trigger 4 to the output 16 of the second trigger 4, which includes in the slow switch 8 a second relay 9 connecting, in its

queue, using their contacts 19 to the measuring device through the terminal block. Simultaneously, the unit with the release of 16 second trigger

4 slow register arrives on

the input of the first element And 5 and, adding to the unit received at exit 17 from the last n-th trigger 2 of register 1, through element 5, the number of which is n-1, translates the second trigger of the fast shift register to the single position. The second trigger is a quick register; ra includes fast switch

6 second relay 7, contacts 18 of which are connected to the measuring

block through the terminal block circuit, thus providing a commutation of the circuits with the measuring device. With the subsequent clock

the impulse unit from the last nth output of the fast register trigger disappears and the unit in the fast shift register starts to push, starting from the second trigger on

the last, i.e. on the n-th trigger, providing alternate operation in the fast switch b relay 7, contacts 18 of which will provide a set of switching circuits from to alternately.

Next, test cycles, i.e. the set of commutations, as the clock pulse generator operates, will be repeated, eliminating the possibility of repeated combinations.

Those. in the third cycle, a set of circuit commutations from to alternately will be provided.

In the n-1 cycle, there will be a single commutation of the c circuits, i.e.

This is the latest switching test.

Last trigger 2, i.e. The n-th trigger of the fast shift register 1, with this combination, will push the unit from output 17 with the n-th trigger

4 slow shift register on (n + 1) trigger, translation to a single position of which gives a signal End of check. .

In case of deviation of parameters

Claims (2)

from HopN "J stop the operation of the clock generator, the test is stopped and the second contacts 18 and 19 of relay 7 and 9 (not shown, you can determine the numbers of the faulty circuits. Thus, the proposed device provides high speed control. Claims of the invention. Switch for device control parameters electrical circuits containing n bit first and n + 1 bit second shift registers, the bit outputs of which, except the last bit of the second shift register, are connected to the control inputs of the corresponding electro magnetic switches of the first and second commutators, the first outputs of each of which are connected to the first and second tires of the meter, and the second with the corresponding buses of the measuring circuits, characterized in that, in order to improve speed, p-1 elements are introduced into it And, and the shift registers are made on the I-K triggers, and the first inputs of the elements And are connected to the single output I-K of the trigger of the last bit of the first shift register and the counting inputs of the I-K triggers of the second shift register, the unit outputs of which, except the first and n The last bit is connected to the second inputs of the elements I, the outputs of which are connected to the installation inputs I-K of the flip-flops of the corresponding sections; except for the first bit, the first shift register, k Sources of information taken into account during the examination 1. Author's testimony of the USSR No. 275185, Cl, H 01 H 9/00, 08.22.68 2. Authors certificate of the USSR 363936, cl. G 01 R 27/00, 17.04.71 (prototype).