SU995341A1 - Device for automatic searching of radio communication channels - Google Patents

Description

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The invention relates to radio and can be used in radio stations and at receiving centers for selecting communication channels that are free from interference.

A device for automatic search of radio communication channels is known, comprising a series-connected frequency tuning unit, a receiver, a demodulator, a signal evaluation unit, the first OR element and a registration unit, the AND series sequentially connected, an analysis time generator and a comparison unit, the outputs of which through the series-connected second element OR and the first delay unit are connected to the first input of the frequency tuning unit, while one of the outputs of the comparison unit is connected to the second input of the first OR element, Exit receiver connected respectively to the input member Inc. control input measurement unit having an information input coupled to an output of intermediate frequency, and an output connected to the data input of the recording unit and the comparison data input unit (1.

However, this device does not provide the necessary accuracy of channel selection.

communication, since the threshold level, in relation to which the quality of the analyzed communication channel is determined, is preliminarily set without taking into account the level of the actual useful signal in this channel.

5 The purpose of the invention is to improve the search accuracy.

In order to achieve this goal, in the device for automatic search of radio channels, sequentially connected, Q RAM blocks, a register and a code converter connected to a switch of type of work, a switch connected in series, an adder, a register block and an additional comparison block, and a second delay block are entered. , the output of which is connected to the first managing input of the switch and to the control input of the register block, and the third element OR, the first input of which is connected to the second input of the reset unit frequency triples, the other input of the AND element, which is the input of the device, is combined with the second input of the additional comparison unit. The first output of which is directly connected to the third input of the second element —OR, and the second output through the third element OR

connected to the read input of the main memory unit, the first information input of which is connected to the output of the measuring unit, the second information block is connected respectively to the output of the frequency tuning unit, to the third input of the additional comparison unit and the second input of the recording unit, and the write input is connected to the output of the evaluation unit signal, and the output of the third element OR is connected respectively to the second control input of the register block, the input of the second delay block and to the second control input of the switch, and the second input of the adder coupled to the second output register and the output kodopreobrazovatel connected to another input of the comparison unit.

The drawing shows a structural electrical circuit of the device.

The device for automatic search of radio communication channels contains a frequency tuning unit 1, a receiver 2, a demodulator 3, a signal evaluation unit 4, an OR element 5, a recording unit 6, a measurement unit 7, a comparison unit 8, a RAM block 9, a register 10, a code converter 11, an operation type switch 12, an AND element 13, an analysis time generator 14, delay blocks 15 and 16, OR elements 17 and 18, a switch 19, a comparison block 20, a register block 21 and an adder 22, input buses 23-27.

The device works as follows.

In the mode of measuring the level of the received probing signals, the element 13 and the comparator unit 20 are closed by the potential arriving at the input bus 23, the frequency tuning is controlled by signals arriving at the input bus 24 from an external control device. At each frequency tuning the readiness signal coming from the output of receiver 2, the measurement unit 7 is reset to its initial state, after which it measures the level of the received signal arriving at it from the intermediate frequency output of the receiver. The measured signal is converted by the block 7 into a digital form and is fed to the information inputs of the register 6 and the memory block 9. In addition, the signal from the output of demodulator 3 goes to signal evaluation unit 4, which determines whether it was received - useful or interfered, for example, by counting the number of correctly received code combinations. If a useful signal was received, then from the output of block 4 to the input of block 9 of the RAM, an enable signal is received, through the element OR 5 this signal is fed to the control input of block 6 of registration. At the same time, the measured level and the nominal value of the frequency at which it was measured.

incoming from frequency adjustment unit 1, are recorded in operational parameter block 9 and recorded by registration unit 6. After that, the receiver 2 is tuned to the next sounding frequency, the code of which enters the frequency tuning unit 1 via the input bus 24. After receiving the signals at all sounding frequencies, in block 9, the received signal levels and frequency ratings will be recorded. they were measured.

In the mode of measuring the level of interference, the resolving potential is applied to the element I 13 and the comparison unit 20 from the input band 23. When a start pulse arrives from the input bus 25, the unit 1 rearranges the receiver 5 to the first operating frequency and, via the OR 17 element, gates the read input of the operating memory unit 9 and the control inputs of the switch 19 and one of the registers of the register unit 21. In this case, the nominal value of the first sounding frequency and the value of the signal level at this frequency are written into register 10. From the first output of register 10, the code of the signal level value is fed to the code converter 11, and from the other output the value code

5, the sounding frequency is fed to the input of the sousm mater 22. To the other mains input, from the input bus 26, through the switch 19, the inverse code of the number equal to half the frequency tuning step during sounding is received. For example, if the frequency at

0 sounding changed after 100 kHz, then the reverse code of the number 50 is received via the input bus 27.

When adding the forward code of the sounding frequency with the inverse code of the number arriving at 26, the difference between these numbers appears at the output of mat. 22, which, under the influence of the signal from the output of the element OR 17, is written into the block 21 of registers and determines the lower limit of the range in which the signal level measured at a given sounding frequency can be considered constant. The upper limit of this range is formed after the time specified by delay block 16 by adding the direct code of the mentioned number to the code of the probing frequency value. The sum of these numbers under the influence of a signal from the output of delay block 16 is recorded in block 21 of registers. In comparator block 20, a comparison of the nominal value of the operating frequency received

g from block 1 frequency tuning with the boundaries of the range of input from the block 21 registers.

If the nominal operating frequency is less than the lower limit of the range, then from the first output of the comparison unit 20 through

the OR 18 element and the delay unit 15, the unit 1 receives a tuning signal and this unit outputs to the receiver 2 and the comparison unit 20 a code for the value of the next operating frequency.

If the nominal operating frequency is greater than the upper limit of the range, then from the other output of block 20 to the second input of the element OR 17 a signal will be sent that sends the code of the next probing frequency and the code measured on it from register 9 to the memory 10 signal, and in block 21 of the registers, the values of the new range boundaries will be recorded.

If the value of the operating frequency is within the specified range, then after setting the receiver 2 to the specified operating frequency, the readiness signal from the receiver output will reset the measuring unit 7 and begin to measure the interference level, and through the element 13 will start the formation 14 analysis time. After a predetermined analysis time, the time shaping unit 14 outputs a polling pulse to the comparison unit 8. In this case, the latter compares the measured noise level coming from the measurement unit 7 with the threshold, which is formed by the code converter 11.

Code converter 11 converts each code value of a signal received from a 10 V register, a threshold code, above which, at a given signal level, reliable operation at the analyzed operating frequency Hfi is ensured. By means of switch 12, it is possible for each type of telephone and telegraph operation to oppose different thresholds to the same signal. If the measured level of interference is greater than the threshold generated by code converter 11, the signal from the first output of the comparison unit 8 through the OR 18 element, and the delay unit 16 of the frequency tuning unit 1, are tuned to the next, working frequency and the process described above is repeated. If this level is less than the threshold, then the signal from the other output of block 8 through the OR 5 element starts the recording unit 6 and the nominal operating frequency, and the interference level measured on it is recorded by this block. In addition, through the OR element 18 and the delay unit 15, this signal enters the frequency tuning block G for tuning to the next operating frequency.

Thus, the proposed device makes it possible to more accurately select a communication channel due to toro, that the threshold with respect to which the communication channel is estimated is formed taking into account the level of the useful signal in this channel and the type of operation.

Claims (1)

Invention Formula A device for automatic search of radio channels containing a series-connected frequency tuning unit, a receiver, a demodulator, a signal evaluation unit, the first OR element and a registration unit, the AND element sequentially connected, an analysis time generator and a comparison unit, the outputs of which through the serially connected second Either element and the first delay unit are connected to the first input of the frequency tuning unit, while one of the outputs of the comparison unit is connected to the second input of the first OR element, the outputs The terminal is connected respectively to the input of the element I and to the control-input of the measuring unit, the information input of which is connected to the output of the intermediate frequency, The output is connected to the information input of the registration unit and the information input of the comparison unit, characterized in that, in order to improve the search accuracy, serially connected main memory unit, register and code converter connected to the type of work, serially connected switchboard are added to it. , a register block and an additional comparison block, as well as a second delay block, the output of which is connected to the first control input of the switch and to the control input of the register block, and t This OR element, the first input of which is connected to the second input of the frequency tuning unit, the other input of the AND element, which is the device input, is combined with the second input of the additional comparison unit, the first output of which is directly connected to the third input of the second OR element, and the second output the third element OR under, is connected to the reading input of the block memory, the first information input of which is connected to the output of the measuring unit, the second information input is connected respectively to the output of the frequency tuning unit, to the third input of the additional comparison unit and the second input of the registration unit, and the recording input is connected to the output of the signal evaluation unit, the output of the third element OR is connected respectively to the second control input of the register unit, the input of the second delay unit and to the second control input of the switch, while the second input of the adder is connected n with the second output of the register, and the output of the code converter is connected to another input of the comparison block. 50 Sources of information taken into account during the examination 1. USSR Author's Certificate No. 748890, cl. H 04 B 1706, 1978 (prototype).