SU953739A1 - Pulse train frequency divider using variable fractional division factor - Google Patents

Description

one

The invention relates to a pulse technique and can be used in automation devices, computing equipment and measuring equipment.

A pulse frequency divider is known, comprising a frequency divider, adders and a reference element l.

The disadvantage of the device is low multiplication accuracy.

The closest to the technical essence of the invention is a pulse frequency divider with a variable division factor, comprising a pulse generator, the output of which is connected to the input of the pulse counter, the plug-in input of which is connected to the output of the first element in the bottom, the output of the second comparison element is connected to the first the input element And, the second input of which is connected to the output of the pulse generator, and the first and second groups of inputs of both elements of the comparison, are connected respectively to the information output s pulse counter and outputs information corresponding storage units 2.

A disadvantage of the known device is the impossibility of dividing the pulse frequency by the correct fraction D (pt) with not enough high division accuracy.

The purpose of the invention is to expand the area of variation of the division ratio while improving the accuracy of division.

Claims (2)

The goal is achieved by the fact that a pulse frequency divider with a variable fractional division factor, containing a reference frequency generator, the output of which is connected to the counting input of a pulse counter, the bit outputs of which are connected to the first group of inputs of the comparison element, the second group of inputs of which are connected by t outputs the number register, and the output with the pulse timer input 95, which is zeroed out, two frequency dividers and an input signal period meter, the first input of which is connected to the input bus, are entered and the control input of the number register, the outputs with the information inputs of the number register, and the second input with the output of the first frequency divider, the first input of which is connected to the output of the reference frequency generator, and the second input with the installation bus of the division factor denominator, while the First input The second frequency divider is connected to the output of the reference element and the second input is connected to the bus of the numerator of the division factor. The drawing shows a block diagram of the device. The circuit contains a generator 1 of the reference frequency, a counter of 2 pulses, dividers 3 and frequencies, a register 5 numbers, an element 6 of comparison, a meter 7 for the period of the input signal, an input bus 8, a bus 9 for setting the denominator denominator, a bus 10 ycTahoB for the numerator of the division factor. The device works as follows. Pulses, the frequency of which must be divided into a fraction -, is fed to the input of the meter 7- As the counting pulses, the generator 7 is fed to the input of the meter 7, often the (fo-ajT) is reduced in m -, - -, - j 1 about . divider 3. By the end of the period of the input signal Tg, the output of the gauge k is a number equal to T / Td t this number is fixed in the register 5 Counter 2 counts the oscillator 1 pulses, following with a period T / ,; It is obvious that after a time interval equal to T T0x / Tt Trl (t, the output of counter 2 will be a number equal to that recorded in register 5 in the previous cycle .. At the output of element 6. After a pulse, and the count will start again. If the period of the input the signal does not change, it remains constant and the number recorded by each cycle in register 5, and therefore, at the output of element 6, a uniform sequence of pulses with a period of T5x is formed (these pulses pass through the divider k with the division factor n, and their period It turns out 7x} TP, ie, to the output The device turns out to be a uniform (without parasitic modulation, i.e. without distortion) pulse sequence with the frequency {- {introducing new elements and the proposed division between them). The frequency spruce allows to obtain a uniform output pulse sequence, which ensures the division of the frequency following impulses without oscillations of the output signal; and also the possibility of dividing often by a fraction of the form j for any integer pi, including n "i t; which significantly expands the range of values of the division factor. Formula of Invention Pulse Frequency Divider with variable fractional division factor, containing a reference frequency generator, the output of which is connected to the counting input of the pulse counter, the bit outputs of which are connected to the first group of inputs of the comparison element, the second group of inputs which is connected to the outputs of the register of the number and the output - to the zeroing input of the pulse counter, which is, in order to expand the range of the coefficient change This division, while improving the division accuracy, introduced two frequency dividers and an input signal period meter, the first input of which is connected to the input bus and the control input of the number register, the outputs - with information inputs of the number register, and the second input with the output of the first frequency divider , the first input of which is connected to the output of the reference frequency generator, and the second input is connected to the bus of setting the division factor denominator, while the first input of the second frequency divider, tota is connected to the output of the reference element, and the second input is to the bus of the numerator of the division factor. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 621101, cl. H 03 K 23/00, 1977 2. USSR author's certificate №, cl. H 03 K 23/00, 1978. i Code You Set t