SU947949A1 - Phase frequency flip-flop - Google Patents

Description

The invention relates to discrete automation and computing and can be used in devices for processing discrete information provided by a frequency-phase code.

A trigger based on a tunable loop — a spectrotron consisting of a tunable loop and a detector in series is known. When a set of frequencies is fed to a tunable loop and when feedback is closed from the detector to the tuned loop control input, it passes one of the input frequencies 1 to the output.

The disadvantage of the trigger is the lack of amplification of frequency-harmonic oscillations, which prevents their serial connection.

A two-frequency trigger circuit is also known, made on the basis of two parallel circuits consisting of series-connected mixers, filters, oscillators and detectors with cross-feedback 2.

The disadvantage of the trigger is the low stability of the generated

frequencies, since they are determined by low-Q resonant systems of auto-oscillators. In addition, the stationary phase of the oscillations at the output of such a trigger is not unambiguously connected with the phase of the reference oscillator, since it is determined not only by the phase of the reference oscillator, but also by the phase of the oscillator, which is

10 random. As a result, it is not possible to use a known trigger for working with biorthogonal signals that use frequency-phase coding.

The purpose of the invention is to increase the stability of the frequency of the oscillations generated by the trigger, and to ensure an unambiguous connection of their phases with the phases

20 reference generators.

The goal is achieved in that the frequency-phase trigger containing the first reference voltage generator, to the output of which the first mixer is connected, the output of the second reference voltage generator through the second mixer is connected to the first filter, as well as the second filter, two detectors and the adder unit voltages, keys are entered, controllable amplifiers, a third filter, an additional voltage addition unit, and inverters, while the input of the additional voltage amplifier unit is connected to the first and second mixers, and the output to the inputs of the two arms, consisting respectively of sequentially. included key, filter, amplifier, detector and inverter, the inverter outputs are connected to other inputs of the respective amplifiers, the outputs of which are connected to the inputs of the voltage addition unit, the output of which is connected to another input of the second mixer, and the outputs of the first and second detectors are connected to the control inputs second and first keys.

The drawing shows the functional diagram often; pus-phase trigger

The device contains serially connected first voltage generator 1, first mixer 2, additional voltage addition unit 3, first switch 4, first filter 5, first amplifier 6, first detector 7 and first inverter 8, the output of which is connected to the input of the first amplifier 6 . The output of the second generator 9 of the reference voltage is through a series-connected second mixer 10 and the second filter 11 is connected to another input of the first mixer 2. The input of the second switch 12 is connected to the output of the voltage addition unit 3, and its output through the series-connected third filter 13, the second the amplifier 14, the second detector 15 - to the input of the second inverter 16, the output of which is connected to another input of the second amplifier 14. The outputs of the first 7 and second 15 detectors are connected to the control inputs of the second 12 and first 4, respectively, The second outputs of the amplifiers B and 14 are connected to the inputs of the voltage addition unit 17, the output of which is connected to the input of the second mixer 10. The input signal is fed to the input of the voltage addition unit 3.

The device works as follows.

Input signal from one of the frequencies f. or f 2 goes to the block 3 of voltage additions and through it to keys 4 and 12, filters 5 and 13 and to one of the amplifiers b or 14 and respectively to one of the detectors 7 or 15 Output voltage from the first 7 or second 15 The detector enters the control input of the second 12 or first 4 key and locks it. In addition, the output voltage from the detector 7 or 15 goes to the inverter 8 or 16, and then to the amplifier input B or 14. As a result, one of the keys 4 or 12 in the trigger is locked

and one of amplifiers 6 or 14 provides maximum gain. Next, the signal from one of the amplifiers 6 or 14 goes to the addition unit 17 and through it to the mixer 10, then is filtered: by the filter 11 .and entering through the mixer 2 to the addition unit 3 closes the feedback loops

Thus, after the signal is removed from the trigger input, the output of the addition block 17, depending on the input frequency f or fj, appears, is the voltage at either f or f, and the phase at each frequency takes one of two values, differing in JP in the same way as in resistive parametrons. The excitation in the frequency trigger and f-j are defined as the half-sum of the frequencies of the reference oscillators and fpj

-f, a. (fri ± rz ff a their phases are connected with the oscillation phases of the reference oscillators P and F. and -phase shifts φ, φ, 2, φ, in filters 5.12. and 14. as follows

f D - 0,5 (W, Chg). i-0,5 (f, 1 f ,,,) -MfZ :,

where n 0,1,2. Due to the fact that at each frequency f or f in the steady state one of the two phases is present, the trigger is a four-digit CQ with the following relations, o f; .

The proposed trigger can be used in communication channels for the exchange of information between computing devices integrated into a computing system or network. As in the proposed trigger, the steady states differ in the liaK frequency and the phase at each frequency, it can be successfully applied in communication channels with biorthogonal frequency-phase signals.

Thus, the application of the proposed frequency-phase trigger with potential feedbacks will significantly, approximately twice, increase the capacity of communication channels between computing devices of computer systems and networks.

Claims (2)

1. Multistable elements of discrete technology. Ed. OiropCKOrOi M., Energie, 1966, p. 87 2. Authors certificate of the USSR 744924 cells. H 03 K 3/286, 1978.