SU928415A1 - Associative storage cell - Google Patents

Description

(54) ASSOCIATIVE RECORDING ELEMENT

This invention relates to memory devices.

An associative storage element is known, which contains a trigger, an address bus, write control elements, zero-bit bit buses, read control elements, a logic input and output cells, a zero potential bus, an inverter, a recovery valve, an OR-logic gate, and parallel connected transmitters. til valves

A disadvantage of the known associative storage element is its complexity.

The closest technical solution to this invention is an associative storage element containing a trigger with two AND input circuits, two AND information reading schemes, an OR scheme, a NOT scheme, two output circuits. And, two output circuits OR, five input and five output buses 2.

The disadvantage of this assault storage element is its poor performance and reliability due to its complexity.

The aim of the invention is to improve the speed and reliability of an associative storage element.

The goal is achieved by the fact that in the associative and aa element, containing a trigger, the elements

10 OR and elements AND, the single and zero inputs of the trigger are connected respectively to the outputs of the first and second elements AND, the first inputs of the third and fourth elements AND are connected

IS respectively to the single and zero outputs of the trigger, the second input of the third element And is connected to the output of the first element OR, the first input of the first element And is connected to the first input

m of the second element And, the outputs of the third and fourth element And are connected respectively to the first and second inputs of the second element OR, the output of which is connected to the first stations of the fifth element AND and the third element OR, the first input of the first element IL is connected to the second input of the first element AND, the second inputs of the second n of the fourth elements And are united. FIG. Fig. 1 (structural diagram of an arzociat processor, in which the proposed associative storage element is applied on, FKG. 2 is a functional diagram of the proposed associative storage element. FIG. 1 denotes a local control device 1, an input device 2, an output device 3 and drive 4 matrix tgipa, which consists of identical and equally interconnected associative storage elements 5. Associative storage element (see Fig 2) contains a trigger 6, the first 7, the second 8, the third 9, the fourth Yu and the fifth 11 elements And, the first 12, the second 13 and the third 14 elements OR .. In Fig. 2, the first outputs 15 and the input 16 are marked the second 17, the third 18, the fourth 19, the fifth 2O, the sixth 21 And the seventh 22 inputs, the second 23, the third 24, the fourth 25, the fifth. 26, the sixth 27 and the seventh 28 outputs of the associative storage element. In each CTonate drive 4 (see Fig. 1) the seventh 24, second 23, sixth 27 and n 26th (see - fig. 2) Bbixotoi of the previous associative storage element 5 (see FIG. 1) are connected respectively to the fourth 19 (see Fig. 2), the first 16, the seventh 22, and the second 17 inputs of the next associative storage element 5 (see Fig. 1). In each row of the accumulator 4 (see Fig. 1), the first 15 (see Fig. 2) fourth 25 and third 24 outputs of the previous associative storage element 5 (see Fig. 1) are connected respectively to the third 18 (see Fig. the sixth 21 and fifth 2O inputs of the subsequent associative storage element 5 (see Fig. 1). The proposed -associative storage element can be implemented, for example, on integrated circuits of the K 1O4 series (elements AND, OR and K155 (triggers). Associative memory element works as follows: Consider the work of an associative remembering element on the example of the accumulator 4 (see Fig. 1) matrix type, included in the associative processor, which operates in four modes, write, read, associative search and maximum search. Record. Word to be written , is fed from the input device 2 (see, fig. 1) to the drivers of the first row from the top of the array 4 (see fig. 1 / so that the direct code of each bit is fed to the inputs 16 (see FIG. 2), and the reverse code of the same bit is at the inputs 17 of elements 5 (see, fig. 1) of the corresponding column of accumulator 4. At the input 2O (see fig. 2) of elements 5 (see fig. 1) of the first (left a) column in the same rows of accumulator 4 (see fig. 1) to which recording is to be made, signal 1 is given, recording masking is performed by simultaneously applying signal O to inputs 16 and 17 (see figure 2) of elements 5 (see Fig. -1). the corresponding column of the accumulator 4 (see Fig. 1). Reading. To read the contents of some row of accumulator 4 (see fig. 1), an input is given to input 21 (see fig. 2) of the corresponding element 5 (see fig. 1) of the first (left) column of accumulator 4. The contents of the row are fed to the inputs 24 (see FIG. 2) of elements 5 (see 1) of the last (bottom) row of accumulator 4. Associative search. The polling feature bits are fed from the input device 2 (see Fig. 1) to the inputs of the upper row of the array 4 of the accumulator 4 in such a way that the direct code of the poll character of each bit is fed to the input 16 (see Fig. 2), and the return code the same bit is at the input 17 of the elements 5 (see, fig. 1) of the corresponding column of the matrix. All inputs 18 (cm, fig. 2) of elements 5 (cm, fcg, 1) of the first column of accumulator 4 are given signal 1.. Polling masking is performed by applying signal 1 to inputs 22 (see Fig. 2) of elements 5 (see Fig. 1) of the corresponding columns of accumulator 4. At the same time, signal I appears at outputs 15 (see, Fig. 2) of elements 5 (see Fig. 1) of the last column in those and just those of drive 4 (tM. fig, 1), in which the contents of all unmasked bits. falls with the codes of the corresponding polling feature bits. Search for the maximum. The search for the maximum is carried out using a word parallel and a sequential razputM (starting with the higher bits) / content storage 4 al. FIG. one). To implement this algorithm, it is enough to send a signal to the inputs 16 (see. Fig. 2) of the elements 5 (see Fig. 1 of the first row and to the inputs 18 (see Fig. 2) of all the elements 5 (see Fig. 1) of the first at the table & xxx, which should be masked, the inputs 22 (see fig. 2) of the corresponding elements 5 (see fig. 1) are given signal 1. At the end of the transients, signal 1 appears at the outputs 15 Than. Fig. 2) elements 5 (see Fig. 1) of the last column and in the tech only. Those lines of accumulator 4, in which information in unmasked bits, considered as binary numbers in the positional number system, has a maximum value. The feasibility of an associative storage element is to reduce the number of log elements and connections included in it, compared with the known device, thereby increasing the reliability and performance of the proposed element.

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Claims (2)

ui: i 54 Claims of the invention An aspirating storage element containing a trigger, OR elements into AND elements, the single and zero inputs of the trigger are connected respectively to the outputs of the first and second elements AND, the first inputs of the third and fourth elements AND are connected respectively to the single zero outputs of the trigger, the second input of the third element AND is connected to the output of the first element OR, the first input (of the element of AND connected to the first input of the second element AND, characterized in that, in order to increase speed and hope associative barring element, in it the outputs of the third to fourth and elements are connected directly to the first and second inputs of the second OR element, the output of which is connected to the first inputs of the fifth AND element and the third element OR, the first input of the first element OR in (the first input of the first element is And, the second inputs of the second and fourth elements are And are combined. The source of information is taken into account in the examination 1. USSR Author's Certificate No. 513393, cl. Q 11 15/00, 1973. 2. Copyright certificate CCC №4782 7, cl. OV 1 / OO, 1975 (prototype).