SU919073A2 - Digital frequency detector - Google Patents

Description

54) DIGITAL FREQUENCY DETECTOR

I

The invention relates to communication technology and can be used in the equipment of transmission systems: discrete information.

According to the main author. St. No. 79О235, a digital frequency detector containing a digital pulse width meter, made in the form of a serially connected reference oscillator, a key and a reversible pulse counter, the outputs of which are connected to the inputs of the number comparison element, the outputs connected to the input of a logic unit, is known; connected to the first output of the logic unit. The double-j modulated signal is fed to the input of the input signal generator, the output of which is connected to the input of the pulse former, the counting trigger input and the control input of the frequency divider, the forward trigger output connected to the second bypass of the logic unit, the control input of the reverse pulse counter and the second control input

frequency divider, on the counting input of which the output of the reference generator is connected. The output of the frequency divider is connected to the second input of the pulse generator, the output of which is connected to the input of the pulse extender, connected to the control input of the key and the third input of the logic unit, the second output of which is the digital frequency detector Ui.

The digital frequency detector operates according to a method of separating a pair of pulses, in the difference of the durations of which there is a difference between the period of the input frequency-manipulated signal and the period of the average frequency of this signal. Then the duration of the pair is increased K times, and the sign and magnitude of the difference in the impulse duration are determined.

The disadvantage of the digital frequency detector is the inability to adjust the average frequency of the detector.

signal that causes distortion.

The purpose of the invention is to reduce the distortion of hfn detection.

This goal is achieved by the fact that two cpuchs, a discharge current generator and a control unit, are additionally introduced into the frequency detector, the first output of the control unit preprogramming someone to the input of the current generator.

the output of which is connected to the first inputs of additional switches, the outputs of which are connected to the second input of the pulse expander, and the second output of the control unit is connected to the second

the inputs of additional keys, the third inputs of which, by P1, are connected respectively to the direct one and ifflBOpCHON-jy VYKHORZ.M

trigger

FIG. 1 shows a block diagram of the device; in fig. 2 - diagrams of his works,

The digital frequency detector contains a digital pulse meter 1, made in the form of serially connected reference generator 2, the first key 3 and a reversible counter 4 pulses, the outputs of which are connected to the inputs of the reference element 5, the numbers connected to the input. unit of logic unit 6, and the installation input of the reversible counter of 4 pulses according to E1 is connected to the first output of logic unit 6, the second output of which is the detector output. The demodulated signal is fed to the generator 7 in -stand signal whose vyho connected to the input of the pulse shaper 8, c4emoN entry 1: Rigg ".ra 9 and a control divider vhozu

10 frequency, to the account fJ input of frequency 10 is connected to the output of the reference oscillator 2, and the output of frequency divider 10 is connected to the second input of the driver of 8 pulses. Direct trigger code 9 is connected to the second control input of the frequency divider Yu, the third input of the key 11, the y-switch and the input of the reversing counter 4 pulses and the logic input of the flea 6, and the inverse output of the trigger 9 is connected to the third input of the 12 " The first output of block 13 is connected to the input. generator 14 is the current of discharge, and the second output is connected to the secondary inputs of switches 11 and 12; the output of the discharge generator 14 of the discharge current is directly connected to the first inputs of pegs 11 to 12, the outputs of KoitJpbDC are connected to the second, input of the expander 15 pulses, to the first 34

The output of which is connected to the output of the driver 8 pulses. The output of the pulse spreader 15 is connected to the control input of the first key 3 and the third input of the logic unit 6.

The device works as follows.

The periodic frequency-manipulated signal arrives at the detector input, which is converted by the input signal with the input signal 7 into square pulses, which follow the frequency of the input signal (Fig. 2a), the cycle of the detector, coinciding with the oscillation period on the tripra 9 output (Fig. 2). 25) consists of two periods of the input signal, each of which is formed by one information pulse (Fig. 2a, 5). The beginning of the cycle coincides with the negative voltage front at the output of the input signal conditioner 7 (Fig. 20) by the caller. ny voltage front on the forward output latch 9 (TTF 26)

Consider the cycle of the detector.

At the moment of arrival of the first negative front of the generated pulse (fkg. 2a), the trigger output will be set to i Sfng. 25), the output of forms of the puller 8 pulses will be set to 1 (Fig. 25), and the Divider 1O will unlock the frequency and will start dividing the reference frequency (Fig. 2) At the same time, the output signal t of the eigger 9 controls the counting direction of the reversible counter of 4 pulses so that if the entry of trigger 9 is in the gnome state, then reversal01

counter 4 impulses. in counts in a positive direction (AND, - and if in the zero state, then the count goes D in the negative direction. Delay 10 frequency produces impulses of negative polarity (fig, 2d), HivinynbcoB arriving at the second input of the imaging unit 8 and setting it to O (Fig. 23) .These pulses have a frequency g - (- pDgde l - a whole number, a - average Purity of the frequency-controlled urban) and are shifted relative to the start time. and the divisor 10 (Fig. 2S) is Bray. The value; is chosen from the conditions | | {th /: T, „,,,, (where; ,, d is the maximum period of the input oscillations, taking into account interference noise, the minimum period of the input oscillation, taking into account the waveform of interference, the value of n is chosen so that on one side iLbi the perio.a frequency divider 1O is FLEXIBLE minimal, and on the other hand, the period received on The output of the frequency divider 10 (Fig. 2d) was greater than the magnitude, At the noise and asynchrony frequency of the input frequency and frequency of the reference oscillator 2. With the arrival of the next negative front of the generated input signal (Fig. 2q) pulse shaper 8 is set to 1, direct output of flip-flop 9 is set to O and changes the counting direction of the reversible counter of 4 pulses. Next one then the pulse from the output of the divider 10 (Fig. 2d) sets the shaper 8 pulses in O (Fig 2E). When the positive half-period of the generated input signal and the negative half-period of the voltage at the output of the trigger 9 coincide, the input of the frequency divider 10 is blocked and the divider U is reset. Thus, during the cycle time of the detector at the output of the pulse generator 8, a pair of pulses is formed (Fig. 2E), the positive fronts of which follow with the frequency of the input signal, and the negative fronts with the average frequency of this signal. The pulses thus shaped (Fig. 2a coming from the input of the expander 15 pulses, where (due to the difference in charge time and capacity discharge), their duration increases by a factor of K (Fig. 2e). The pulses from the output of the expander 15 are fed to the control key input 3 for passing to the counting input of the reversible counter of 4 pulses of a series of pulses from the output of the reference generator 2 whose frequency ivffloro is greater and a multiple of the average frequency of the detector input signal. During the first series of pulses of the reference frequency, the reversing counter of 4 pulses reads in the positive direction, and during the second series in the negative. If the input frequency of the detector is equal to the average frequency, both pulses at the outputs of the driver 8 pulses and the enable pulse 15 are equal to each other, and at the end of the counting in the negative direction, the output of the reverse pulse counter 4 is set If the output frequency is | y, then the second pulse of the pair or the output of the expander is 15 pulses shorter than the first by the value of K, cG Tj-p) and the number at the output of the reversible counter 4 pulses of the end NII score 9 36 and more than the original value. If the input frequency is equal to c, then the second pulse at the output of the gate (wicker 15 nm w / o is longer than the first by the value K (-) and the number at the output of the reversible counter is 4 pulses after the end of the count is less than the initial value. After counting in the negative direction in block a recording pulse is formed (Fig. 2), which records the information obtained from the output of the number comparison element 5 and writes the initial value into the reversible counter of the 4 pulses. The number comparison element 5 performs a constant comparison of the number written in a reverse counter 4 pulses, with the initial state recorded therein of counter 4 and at the output of the number comparison element 5 appears O or 1, depending on whether the current value is greater or less than the recorded number. To one of the pulses, for which the control unit 13 supplies the inputs of the keys 11 or 12 with an enable signal (depending on the sign of the center frequency detuning), and on the discharge current generator 14 sets the discharge current value, depending on the values detuning. The direct and inverse outputs of trigger 9, connected to the inputs 11 and 12 of the keys, allow a positive half-wave to allow the discharge current to enter the expansions of the pulses 15. If the control unit 13 supplies the enable signal to the input of the switch 12, the discharge current of the discharge current generator 14 is fed to the input of the pulse expander 15 during the second half of the detector operation cycle and reduces the ratio of the second pulse of the pair, which leads to an increase in the average frequency of the detector value, determined e Iyu discharge current. If the control unit 13 supplies a permitting signal to the input of the switch 13, then the discharge current is fed to the input of the expander 15 pulses during the first half of the detector operation cycle, which leads to a decrease in the average frequency of the detector. In the proposed device, by introducing an adjustment of the average frequency of the detector, its own distortions when detuning the channel at Velizhgau 2.5 Hz are reduced by 2%, which provides an increase in the quality of detection.

Claims (1)

1. USSR author's certificate No. 790235, cl. H 03 K 5/19, 14.09.78. FIG. / and and LJ and ff PP F1 / g, g II -1G