SU913551A1 - Device for control of pulse-width converter - Google Patents

Description

The invention relates to a converter technique and can be used to control thyristor pulse-width converters.

A device for controlling thyristor converters, containing ⁵ n, of control pulse generation channels, each of which includes a master oscillator, a pulse counter, a decoder, a reversible control counter, and a control unit [ΐΐ.

A disadvantage of the known device is that with wide * control ranges of the output voltage of the converter, the actual installed powers of the filtering devices are determined by small durations of the output voltage pulses, and in the region of medium and large values of the voltage at the load, the filtering devices are underused.

The closest technical solution to the invention on the achieved result is a device for controlling

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The pulse-width converter contains a control unit and a master oscillator connected to the inputs of the two-output logic control unit, a terminal for connecting the driver for controlling power, switching and charging thyrioters {21.

However, this device is characterized by low noise immunity when coordinating their work with thyristor control pulse shapers and the effect of the power part of the converter on their operation.

The aim of the invention is to improve the reliability and noise immunity of the device.

The supplied circuit is achieved by the fact that the device is equipped with an Intermediate frequency generator, a chain of series-connected one-shot and a delay line connected by its input to the first input of the logic control unit, and three blocks are protected

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from interference, the first inputs of which are connected to the output of the intermediate frequency oscillator, second inputs of first and second protection units are connected respectively to the second and first passages ₅ You are a logical block, and the second input of the third block are sewn to an outlet of the monostable, the output connected to the protection blocks the terminals for connecting the pulse shapers of the control u, respectively, of the power, switching and charging thyristors.

Each of the interference protection blocks contains an And element, seven transistors with resistive power and mixing circuits, four diodes, two capacitors and an output transformer with a rectifier, the And element being connected with its inputs to the output of the intermediate frequency generator and to the corresponding output 20 of the logic block, the output of the logic block is connected to a channel of four series-connected thyristors, the emitter-collector junction of the last of which is shunted back to-25 nym. the first diode, the anode of which is connected to one of the terminals of the primary winding of the output transformer, the second clip of which is connected to the midpoint of two series-connected capacitors connected in parallel with the terminals for connecting the current source outputs, the second input of the And element is connected to a channel of three series-connected thyristors, the collector _{35 of the} latter of which is connected to the anode of the first diode and through the second diode that is connected back to its emitter, and the collector of the first trap The second transistor of the second channel is connected through ₄₀ through the directly connected third diode and resistor to the base of the second transistor of its channel and through the fourth diode and resistor to the base of the third transistor of the first channel. ₄₅

The second and third blocks are protected against interference from transformers, the primary windings of which are connected to the second input of the respective elements And to the terminal for connecting the common ⁵⁰ output of the current source, and the secondary windings are connected to the terminals for connecting the corresponding control pulse formers.

The drawing shows the device 55 electrical circuit of the device for controlling the pulse-width converter.

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The device contains a master oscillator 1, a control unit 2, a logic 'control unit 3, to the input of which a master oscillator 1 and a control unit 2 are connected with two output' terminals 4 and 5, a delay line 6 and a innovator 7 connected in series to the second output terminal 5 logical C [control eye 3, the one-shot output forms the third output terminal 8 of the logic control unit 3, the intermediate frequency generator 9 and three interference protection blocks 10-12, the first input terminals 13-1 5 of which are connected to the generator output prom the frequency of the frequency 9, the second input terminals 1 6-18 which are connected respectively to the first, second, third output terminals of the logic control unit 3, and the output terminals 19-24 of each of the interference protection blocks are used to connect the formers of control pulses 25-27 power, switching and charging thyristors. The anti-jamming unit consists of two capacitors 30 and 31 and two transistors 32 and 33, connected in the reverse direction with diodes 34 and 35, connected between busbars 28 and 29 of the power source. They are connected to intermediate terminals 36 and 37. the primary winding of the transformer 38, the secondary winding of which through a rectifier 39 is connected to the output terminals of the unit. element 40, the inputs of which are connected to the input terminals of the block, and the output through a resistor 41 is connected to the input of the transistor 42, the output of which is connected through the series-connected thyristors 43 and 44 to the input of the transistor 32, and the transistor 45 is connected to the input of the transistor 33 and transistor 46, the input of which through the resistor 47 is connected to the second input terminal of the block is protected from interference, and the output of the transistor 46 through two diode-resistor circuits 48, 49 and 50, 51 is connected to the inputs of transistors 44 and 45.

Device for controlling the pulse-width 'converter works as follows. „

Under the action of the output signals of the master oscillator, which forms a sequence of pulses next to the carrier or a multiple of the modulation carrier frequency, and the control unit 2, which is a set of voltage, current, and pulsation sensors at the input

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and the output, the logical control unit 3 generates two sequences of control pulses at the two output terminals 4 and 5, the first of which through the anti-interference block 10 enters the form-5 world controller of the impulses of control 25 by the power thyristor of the pulse-width converter, and the second through the block protection from interference 11 - to the driver of control pulses 26 by a commuting 'θ thyristor. The control pulses to the charging thyristor in order to force the recharging of the switching capacitance or to charge it up are shifted relative to the control pulses of the next 15 to the switching thyristor at a predetermined angle determined by the parameters of the switching throttle and switching capacity of the forced switching node. Usually it is chosen to be equal to half-wave 20 of the current recharging the switching capacitor. To form the third pulse sequence, a delay line 6 is connected to terminal 5 of the logic unit, the delay time of which is chosen 25 in accordance with the required shift angle between the commutating ’and charging control pulses. The single-oscillator 7 directly generates pulses of a given duration for a confident 30 start of the driver of control pulses 27 of the charging thyristor. Thus, at the terminals 4, 5 and 8, three sequences of power control pulses of the pulse-width-35 converter are formed.

Consider the operation of the anti-interference unit using the example of the anti-interference unit 10, which transmits control pulses to the power thyristor. 40 In the initial state (at a zero signal at the second input terminal), element 40 is also closed; transistor 46 is also closed, which transmits 44 and 45 transistors with a single signal from its collector, since transistors 44 and 45 are open, then the transistors 32 and 33 are closed. The transistors 32 and 33, shunted by diodes 34 and 35, together with the capacitors 30 and 31 about ₅ , form a half-bridge inverter. In the initial state at the output of this inverter and, accordingly, at the output terminals of the block zero signal.

The input unit signal at the second block terminal ⁵⁵ is transmitted to the block output terminals by modulating the increased intermediate frequency from generator 9. In this case, transistor 46 is opened and its unit signal is removed from the inputs of transistors 44 and 45. At a single signal at the second input of the And 40 element with an increased carrier frequency of the intermediate frequency generator 9, switching the transistor 42 from the closed to the open state, and transistors 43, 44 and 45 are cascaded to its output, this leads to a synchronous antiphase the switching of transistors 32 and 33 with an increased intermediate frequency. The transformer 38 provides galvanic isolation of signals from the anti-interference block 10 from the driver of control pulses. The output signal from the transformer through the rectifier 39 in the form of a bundle of pulses is supplied to the output terminals 19 and 20 of the block and, accordingly, as a single signal to the input of the control pulse shaper 25, which is equal to the duration of a single signal at the second input of the block.

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The choice of the frequency of the intermediate frequency generator 9 is determined from the condition for transmitting a minimum duration of ΐ min pulses, which should be an order of magnitude greater than the period T of the frequency of the modulation oscillator ί min? / 10 T.

In this case, it is supposed to transmit pulses of adjustable duration through the protection unit against interferences during the full time of the cell thyristor's pulse-width converter to prevent the appearance of subharmonic oscillations or voltage dips in the presence of a CS-phototra in its output. At the same time, impulses that are fixed in duration are transmitted through the noise protection blocks 11 and 12, the duration of which is selected based on the reliable start of the switching and charging thyristors. For high frequency thyriotors of the PM series, the pulse duration for a reliable start should be no more than 20 μs. Therefore, to start high-frequency thyristors with small turn-on times, the blocks are protected from interferences 11 and 12 can be simplified, using in this case only transformers. When transmitting unipolar pulses with a duration of up to 20 μs with integrated circuits (series 155) of logic unit 3 as pulse transformers of blocks 11 and 12 can

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A transformer on a ferrite core M 2000 NM with dimensions 10x6x3 should be used. The signal from the secondary, the winding of the pulse transformer is directly fed to the output terminals 5

The units are protected from interferences 11 and 12 and, respectively, at the input of the pulse shaper control of the switching and charging thyristors.

In the invention, the control logic unit is galvanically separated from the thyristor control pulse shapers, which provides an increase in the noise immunity and reliability of the proposed device. The structural isolation of the logic control unit from the thyristor control pulse shapers using the noise protection blocks simultaneously reduces the requirements for the power supply. 20

Claims (3)

Claim 1. A device for controlling the width-25 pulse converter containing a control unit and a master oscillator connected to the inputs of a two-output logic control unit, the terminals of the day for connecting immo-drivers for controlling power cocks of mutating and charging thyristors, characterized in that improving the reliability and noise immunity, it is provided with generator ₃₅ intermediate the exact frequency of the series-connected circuit and a monostable delay line, an input connected to the first output logicheskog control unit, and three units of protection from interference per- nye ₄₀ whose inputs are connected to the terminal of the intermediate frequency oscillator second inputs of the first 'and second protection units are respectively connected to second and first outputs logichesko- _45' th block, and the second input of the third block are sewn connected to the output of the monostable, the protection units outputs are connected to the terminals for connecting the control pulse shapers ₅₀ respectively soot- power, and a charging switching thyristors. 2. Device pop. 1, m l of a- and ^b: w o f e c i so that each of the protection units of the interference element and comprises seven transistors with resistive bias supply circuits and, four diodes, two capacitors and output tranoformator rectifier, the element And is connected by its inputs to the output of the intermediate frequency generator and to the corresponding output of the logic unit, the output of the logic unit is connected with a channel of four series-connected transistors, the emitter-collector junction of the last of which is bounded back by the first diode, the anode of which is connected to one of the primary terminals of the output transformer, the second clip of which is connected to the midpoint of two series-connected capacitors connected in parallel to the terminals for connection the outputs of the current Source, the second input element And connected to the channel of the three series-connected transistors, the collector after one of which are connected to the anode of the first diode and through the second diode which is turned back on, is connected to its em; - * a mitter, the collector of the first transistor of the second channel is connected via the directly connected third diode and the resistor to the base of the second transistor of its channel and through the fourth diode and resistor the third transistor of the first channel. 3. The device according to claim 1, characterized in that the second and third blocks of protection against interference are made on transformers, the primary windings of which are connected to the second input of the corresponding And elements and to the terminal for connecting the common output of the current source, and the secondary windings are connected to the terminals for connecting the corresponding control pulse formers.