SU866754A1 - Frequency-manipulated signal receiver - Google Patents

Description

The invention relates to telecommunications and can be used to transmit data over communication channels.

A receiver of frequency-manipulated signals with a multiple ratio of carrier frequencies is known comprising a first amplifier-limiter, a shift register, and a phase detector made in series. θ on an XOR element [1].

However, the known receiver is sensitive to edge distortion of the signal, which reduces its noise immunity.

The purpose of the invention is to increase the noise immunity of the device.

For this purpose, a series-connected 20 frequency multiplier, a narrow-band filter and a second limiter amplifier are introduced into a known receiver of frequency-manipulated signals with a multiple ratio of non-dry frequencies, the input of the frequency multiplier connected to the input of the first amplifier-limiter, the output of the second amplifier-limiter connected to the clock inputs shift register.

The drawing shows a structural electrical diagram of the proposed receiver. thirty

The frequency-manipulated signal receiver with a multiple carrier frequency ratio comprises a first amplifier 1, a shift register 2, a phase detector 3 made on an exclusive-OR element, a frequency multiplier, a narrow-band filter 5, and a second amplifier-limiter 6.

The device operates as follows.

The binary frequency-modulated signal is fed to the input of the first amplifier-limiter 1 and converted into a sequence of rectangular pulses, which is fed to the input of shift register 2, is tied to clock pulses and delayed for a time equal to the period of oscillation of a higher frequency. Phase detector 3 compares a sequence tied to clock pulses with a delayed sequence. The output signal of the phase detector 3 is the output signal of the receiver.

The pulses of the clock register 2 shift are formed as follows. The input signal is fed to a frequency multiplier 4. A narrow-band filter extracts a second harmonic signal of a higher frequency from the output voltage of the frequency multiplier 4. The output voltage of the narrow-band filter 5 is converted into symmetrical rectangular pulses by the second amplifier limiter 6. The narrow-band filter, 5 cleans the clock sequence ^e from interference, which increases the noise immunity of the receiver.

Thus, the noise immunity of the claimed receiver is not {less than. one to two orders of magnitude higher than the noise immunity of the known device.

Claims (1)

The invention relates to telecommunications and can be used to transmit data over kangs. A known receiver of frequency-manipulated signals with a multiple ratio of unresponsive frequencies contains a series-connected first amplifier-limiter, a shift register and a phase detector made on an Exclusive OR 1 element. However, the well-known receiver senses the body to edge distortion of the signal, which reduces its noise immunity . The purpose of the invention is to improve the noise immunity of the device. For this, a serially-connected frequency multiplier, a narrow-band filter and a second amplifier-limiter are entered into a known frequency-manipulated signal with a multiple ratio of carrier frequencies, the input of the frequency multiplier connected to the input of the first amplifier-limiter, the output of the second amplifier-limiter is connected to the clock inputs shift register. The drawing shows the structures on the electrical circuit of the proposed receiver. The receiver of frequency-manipulated signals with a multiple carrier frequency ratio contains the first amplifier limiter 1, shift register 2, phase detector 3 performed on the XOR element, frequency multiplier 4, narrowband filter 5, second limit amplifier 6. The device operates as follows. The binary frequency modulated signal is fed to the input of the first amplifier limiter 1 and is converted into a series of square pulses, which is fed to the shift register 2 input, associated with the clock pulses and delayed by a time equal to the period of the higher frequency oscillation. Phase detector 3 compares a clock-related sequence with a delayed sequence. The output signal of the phase detector 3 is the output of the receiver. The pulses of the clocking register 2 shift are formed as follows. The input signal is fed to the multiplier 4 frequency. Narrowband filter 5 extracts from the output voltage of the 4 frequency multiplier the second harmonic signal of the higher frequency. The output voltage of the narrowband filter 5 is converted into symmetric rectangular pulses by the second amplifier limiter 6. The narrowband filter 5 clears the clock sequence from interference, which increases the noise immunity of the receiver. Thus, the noise immunity of the claimed receiver is not less than one to two orders of magnitude higher than the noise immunity of the known device. Invention The receiver is frequency-manipulated signals with a multiple carrier frequency ratio, comprising a series-connected first amplifier limiting device, a shift register and a phase detector, performed on an Exclusive OR element, characterized in that, in order to improve noise immunity, a series-included frequency multiplier, a narrowband filter and a second amplifier are introduced A limiter with the input of the frequency multiplier connected to the input of the first limit amplifier, the output of the second limit amplifier connected to the clock inputs of the shift register. Sources of information taken into account in the examination 1. US Patent No. 3437932, cl. H 04 B 1/16, NCI 325-320, 1969 (prototype). T t