SU866570A1 - Shaft angular position-to-code converter - Google Patents

Description

(54) CONVERTER ANGLE OF TURNING SHAFT INTO CODE

one

The converter relates to angular displacement to digital converters, a code, and can be used in measurement technology and automation.

A known converter of shaft angle of rotation into a code comprising a series-connected reference voltage generator, a phase splitter, a sine-cosine turning transformer, and a phase-to-code converter Til.

The disadvantage of this converter is the direct dependence of the converter accuracy on the phase instability of the frequency-dependent elements installed in the measuring circuit of the converter, which leads to increased requirements for the phase stability of the phase splitter and phase-code converter.

In addition, since the accuracy of the phase-code converter decreases when the frequency b1 of the power supply voltage of the sine-cosine rotary transformer ((GHT) is twisted, in the considered converter of the stator windings, the voltage is reduced by a low-frequency voltage, which reduces the speed and accuracy of the converter dynamics.

Also known is a shaft angle converter into an amplitude type code containing a series-connected generator, a sinus-cosine rotary transformer, a sine-cosine voltage divider, a phase-sensitive rectifier, a voltage-frequency converter, a control unit, and a register whose outputs are connected to the corresponding bits single inputs sine-cosine voltage divider.

Claims (2)

The main condition that ensures the normal functioning of the converter in question, in particular, the sine-cosine voltage divider, is the presence of signals sufficiently large in amplitude (on the order of a few volts) at the output of the secondary. 3 wound windings SQUT. In this case, the level of internal noise, emissions, interference, arising at the output of the sinus-cosine voltage divider, has a value of the second order of smallness and has practically no effect on the accuracy of the converter. However, in practice, the majority of high-precision SCRTs, in particular, inductosines, reductosins, have a small amplitude of output signals (tens of MLBs), which leads to the need to install two identical amplifiers of the AC signal at the output of the secondary windings of ACS. Since the inequality of the gain factors (the gains of the amplifiers, as well as the inequalities of the gains of the sine and cosine channels of the sine-cosine divider, is not) leads to a direct error of the converter, which is a disadvantage of this converter. angle of rotation of the shaft in the code. The goal is achieved by the fact that in the converter of the angle of rotation of the shaft into the code containing the generator, the output of which is connected to the primary winding of a sine-cut a rotary transformer, an amplifier, a sine-cosine voltage divider and a phase-sensitive rectifier; the spruce output of which is connected through a serially connected C-frequency voltage converter and a control unit connected to the register input, a second amplifier, zero-organ, frequency divider, inverter, four keys, two analog adders and a two-digit digital adder, the first output coil of the sine-cosine rotating from the transformer through the first and second keys, respectively, connected to the first inputs of the analog log adders, and the second winding of the sine no-cosine rotary transformer through the third and fourth keys | Chi is connected respectively to the second inputs of analog adders, the outputs of which through amplifiers are connected respectively to the first and second inputs of the sine-cosine circuit of the bodies of the same 1ga, whose output connected to the input of a phase-sensitive rectifier, the generator output is connected via a zero-body to the input of a frequency divider, the output of which is connected 0 to the control inputs of the first and third keys of the black From the inverter to the control inputs of the second and fourth switches, the output of the frequency divider is connected to the first input of a two-bit adder, the second and third inputs of which are connected to the outputs of the two high-order bits of the register, and the outputs of the two-bit totalizer bits of the sine-sinus-voltage divider, the remaining inputs of which are connected to the remaining outputs of the register. FIG. 1 shows the flow chart of the proposed converter; in fig. 2 - diagrams of signals at the output of converter elements. The converter contains a generator 1, a sine-cosine rotary transformer (CCTVT 2 with a primary 2-1 and secondary 2-2 windings, amplifiers 3 and 4, a sine-cosine voltage divider 5, phase-sensitive rectifier 6, voltage-frequency converter 7 , control unit 8, register 9, null-organ 0, frequency divider 11, keys 12-15, inverter 16, analog absorbers 17 and 18, and two-digit digital adder 19. Primary 2-1 winding SCRT 2 is connected to generator I output The first (sinusna) secondary 2-2 winding of the SSS 2 through the keys 12 and 13 is connected to The first inputs of adders 17 and 18, and the second (cosine) secondary 2-2 winding SSC 2 via keys 1A and 15 is connected to the second inputs of adders 17 and 18. The outputs of adders 17 and 18 through amplifier 3 and 4 are connected to the first and second inputs of the sine voltage divider (SKLH 5.- Register 9 is made, for example, in the form of an N-bit reversible counter. The penultimate (Nl) bit of register 9 and the output of frequency divider I1 are connected respectively to the buses of the first and second inputs of the first bits of the digital totalizer 19 and the output N (senior) bit register 9 p It is connected to the bus of the first input of the second bit of the digital adder 19. The outputs of the first and second bits of the two-bit adder 19 are connected to the inputs (Nl) and N bits of the SKDN 5, respectively. The remaining bit inputs of the SKDN 5 are connected to the corresponding bit inputs of the register 9. The input of the frequency divider I1 through the zero-body 10 is connected to the output of the generator 1, and the output of the frequency divider 11 is connected to the control inputs of the keys 12 and 14 and through the inverter 16, to the control inputs of the keys 13 and 15. The device operates as follows in a way. A sinusoidal voltage Ut) is formed at the output of the generator I with a frequency wf, which simultaneously enters the power supply of the primary winding of the ACS 2 VI to the input of the zero-organ 10. On the output of the secondary sinus and co-sinus windings of the ACMS 2, sinusoidal AC voltages are injected currents with amplitudes U-, - Uj, sin-oLo and Schk UgCosAo, which then through normal-closed keys 13 and 15 or normally-separated keys 12 and 14 arrive respectively through adders 17 and 18 and amplifiers 3 and 4 to the sine and cosine inputs of the SKDN 5. The keys 12 and 14 are controlled by Low-frequency and low-frequency pulses uJ (arriving at the control inputs of the keys directly from the output of the frequency divider 11, and the keys 13 and 1 are controlled by rectangular low frequency impulses Ø) entering the control inputs of the keys 13 and 15 through the inverter 16 (Fig. 2t). To form low-frequency rectangular pulses, rectangular pulses with a high frequency W, which are formed from positive half-waves of the reference voltage using the zero-body 10 (Fig. 2a, 5, C), enter the input of the dividers 11 frequency. Between the reference frequency Wp and the frequency SC of the rectangular switching pulses, the ratio is executed (., Where i 2.4, ... During the first half-cycle of the switching of low-frequency switching pulses, i.e., over time (Fig. 2) when flat amplitude amplitude pulses are formed at the output of frequency divider 11. The keys 12 and 14 are set to the closed position (the keys 13 and 15 are in the open position.) In this case, the output voltage of the sinus winding and (Ao) is through the closed Tbrii KJno4 12 arrives at the first entry amount torus 17, and the output voltage 06 of the cosine winding through the key 14 is fed to the second input of the adder 18. Adder 18, vol (; lt {eipy according to the scheme in which the signal at the output of the adder is, 1, (1) where C ,. 14 - the signals arriving at the first second inputs of the mattress 18, in accordance with (1), pass the output voltage of the cosine winding of SCCT 2 without phase change through the amplifier 4 to the cosine (first) input of the SKDN 5. The adder 17 made on the differential switching circuit, in which the output signal (matrix is equal to% –i where (, Ugyn are signals arriving at The first and second inputs of the adder 17, in accordance with (2), also, without changing the phase, passes the output voltage of the sinus winding of SCCT 2 through the amplifier 3 to the sinus (second) input of SKDN 5. In this case, taking into account the inequality of the gain factors K and K of the amplifiers 3 and 4 output signals of amplifiers are equal to l% sind.oK and U2V C, K cosdLo or U2y U (, K (1n) cosAo, (h) rfi, e amplitude error due to the inequality of the gain factors K K / j of amplifiers 3 and 4, and K - K1 ffy. During the second half-period of the following switching pulses of low frequency, i.e. during the time TC. (Fig. 2b) At the output of the inverter 16, rectangular pulses of unit amplitude are formed (Fig. 2t), while the keys 13 and 15 are set to the closed position (the keys 12 and I4 are open in that case). In this beam, in accordance with (O and (2), the output voltage C | (1o) of the CKT 2 cosine winding 2 through the switch 15, the summer 17 and the amplifier 3 enters with a phase change of 180 to the sine (second) input of the digital SKDN 5. The output voltage Jo) of the sinus winding of the SCT through the key 13, the adder 18, the amplifier 4, without phase change, goes to the cosine (; the first) input of the digital SKDN 5. Considering (I) and (2), also the inequalities of the amplifiers of amplifiers 3 and 4 output sigpaps upnmi ge.i in this case equal to -IJ (, KiCOsdo oKiSind urm U, UoK (1 sincLo. Output signals of amplifiers 3 and A with amplitudes Ai, UQ (3) and Schu (iy (4) pass through SCRN 5, which is controlled by an N-bit register code 9. For the first half-cycle of switching pulses, a second signal is found at the second input of the first low-order digit of the digital adder 19 (since the signal at the output of the frequency divider is equal to one.) In this case, the discrete signals (N) and N bits of register 9, passing through the digital adder 19, are modulated per unit of the lower order of the digital adder 19 and, as a result of this, the code entering the SCRN 5 is different from the angle code fb Registers unit 9 (N-l) discharge register, i.e. by angle - by 90 In this case, the amplitude of the output voltage of the SKDN 5, taking into account (G), is equal to с (s.lts (L –K (.) cosa OR after the transformation К Xs i п (do -fi) - (1 - ( J cosi 1 (5 During the second post-cycle of switching pulses at the second input 1 of the lower bit of the digital adder 19 there is a zero signal (since the signal at the output of the frequency divider is zero) (Fig. 28), In this case, the discrete signals (NI) and The N bits of register 9 passing through the digital adder 19 do not change modulo, and the output code of the angle B of register 9 without change passes to the digital input of the SC H 5. At the same time, the amplitude of the output voltage of the SKDN 5, taking into account (4), is equal to OKAN 0 cosAtjsinp + К (1-djc) S i ndpcosfS, (6) or after the UcttAH U transformations (, г п (dc, -Р) + (1 s (.) S i PSCs Output Voltages СЗ) and (4) the alternating current enters the phase-sensitive rectifier 6, the constant time of which is chosen equal to Tf-, jjj And at the output of the phase-sensitive rectifier 6 a signal is generated direct current, proportional to the sum of the amplitudes of the output voltage, for example; CRAM J scdm ri at UC |, B U, K, (do-). (7) do r This signal, proportional to the difference between the measured angle and the code of the angle fi of the register 9, is fed through the voltage-frequency converter 7 to the control unit 8, the output of which produces a control signal that changes the code of the register 9 in the direction of decrease the error signal (7 When the phase-sensitive rectifier 6 is zero, the converter 7 and the control unit 8 turn off, as follows from 17), the code at the output of register 9 is equal to the measured angle cLo, not taking into account the amplitude errors of amplifiers 3 and 4, set and the output of the SCRT 2 to enhance its output signals. Claim Inventory Angle rotation converter: a shaft into a code containing a generator, the output of which is connected to the primary winding of a sine-cosine rotating transformer, an amplifier, a sine-cosine voltage divider and a phase-sensitive rectifier, whose output is through a series-connected Torjb voltage-frequency unit and a unit control is connected to the input of the register, characterized in that, in order to improve the accuracy of the converter, a second amplifier, null organ, frequency divider, inverter, The key of the key, two analog adders and a two-digit digital adder, the first output winding of the sine-cosine rotating disk of the transformer through the first and second keys are respectively connected to the first inputs of the analog adders, and the second output winding of the sine-cosine rotating transformer through the third and fourth keys of the transformer respectively, to the second inputs of analog adders, the outputs of which through amplifiers are connected respectively to the first and second inputs of the sine-cosine voltage divider The output of which is connected to the input of the phase-sensitive extractor, the output of the generator is connected via a null organ to the input of a frequency preamplifier, the output of which is connected to the control inputs of the motor cranes and the third 8 keys, through the inverter to the control inputs of the second and fourth keys, the output of the frequency divider connected to the first input of the double-digit adder, the second and third inputs of which are connected to the outputs of the two higher bits of the register, and the outputs of the two-bit totalizer are connected to the inputs of the two higher bits of the sine-cosine d A voltage conditioner, the remaining inputs of which are connected to the remaining outputs of the register. Sources of information taken into account in the examination 1. A.Ahmetzhanov A.A. and others. Induction reductosin, M., Energie, 1971, p. D8. 2. Zverev A.E. and others. Converters of angular displacements in a digital code. L ,, Energie, 1974, p. 141-146, fig. 67 (prototype). eight  f Code Fig1 but fbsZ