SU849250A1 - Device for checking and correcting information - Google Patents

Description

The invention relates to automation and computer technology, in particular to devices for monitoring and correcting information, and can be used in multi-track powders on magnetic media. A device for controlling and correcting information is known, which contains registers connected with the corresponding elements AND, the recording and reproduction heads, and the control elements l. The disadvantage of this device is low. Reliability of its operation The closest in technical essence to the proposed is a device containing registers connected to the control unit, triggers, groups of elements AND, switch, forming signals connected to the first group of elements AND, logical blocks, memory blocks, and delay element 2. A disadvantage of the known device is its structural complexity. The purpose of the invention is to simplify the device. The delivered circuit is achieved by the fact that the device containing serially connected control unit connected to the input and output of the device, the first group of elements AND whose inputs (connected to the outputs of the elements AND of the second group, to the input of the device and to the signal conditioner, the first register connected to the first delay element and to the output of the device, and the switch connected to the control and memory blocks whose inputs are connected to the second register connected to the elements of the second group, shift registers are introduced, the strokes of which are connected to the switch and to the input of the device, and the outputs are connected to the inputs of the elements of the And sec group and to the control unit, the second delay element connected to the input of the device and the second register, the comparison unit connected to the shift registers to the second register and to a signal conditioner, and a third delay element connected to the AND elements of the second group and to the comparison unit.

The drawing shows a block diagram of the proposed device.

The device includes the first group of elements I, the first register 2, the switch 3, the shift registers 4, the second register 5, the comparison unit 6, the control block 7 containing the line correction unit 8, the operation mode node 9 and the correction enable unit 10, the signal generator 11 (ready), the first 12, second 13 and third 14 delay elements, memory block 15 and the second group of elements And 16, as well as the playback head 17 and recording 18. The device operates as follows.

In the recording mode, information enters the first register 2 of the record through the first group of elements I and I, if the readiness signal is set by the shaper 11. The record is gated on the record register 2 by the sync pulse through the delay element 12. The information is fed simultaneously to the input of the shift registers 4, through the switch 3 and to the output of the device (recording head).

Before writing the next line to the 4 shift registers, the information is shifted to the right by one line by the sync pulse. After a given number of such records, the first recorded line is scanned at the output of the device (under the playback heads), and its true value is at the output of shift registers 4. Comparison unit 6 generates comparison signals Yes or No, which are mutually inverse. If incomparability occurs, the No signal reads the readiness of shaper 1, and also gates from the output of registers 4 the correct line through AND 16 elements into the playback register 5 and through I element I into the register 2 records The correction of the information in the play register is necessary if it is performed on triggers with counting input in order to correctly compare the following acoustic strings. The sync pulse gates the next line with the rewrite flag, the recording of which (the sign) permits the readiness signal received by the shaper 1I. The necessary time agreement in this case is provided by the delay element 14.

When reproducing the information, the node 9 of the operation mode of the block 7 ensures its passage from the playback register 5 through the block 15 and the switch 3 to the input of the registers 4.

If the next line is recorded with an error, the next line contains its repeated record and has a sign in the overwrite flag track, which is used by the line correction unit 8 to correct the erroneous lines.

Node 8 of the block 7 correction line analyzes the presence of a rewriting feature at the output of the register 5 and in this case prohibits the passage of information from the output of the registers 4, and allows the reproduction from the register 5 of the reproduction by correcting the incorrect recording.

In addition, the correction node prohibits the passage from the output of registers of 4 lines that have a sign of overwriting, excluding additional corrective lines from the array of recorded data.

Correction node 8 consists of two groups of valves and a logical assembly.

Since the information in it is shifted before being sent to the registers 4 emitting the reproduced line, it is necessary to delay it for the duration of the line for the duration of the line correction. This role is performed by block 15, which is an additional register bit 4

There are modes of operation of some drives when the accuracy of the information (the formation does not make sense. For example, the search for an interband gap in the accumulators on a magnetic tape. In these modes, the line correction during playback is turned off using the correction enable node 10, Information in this case goes to the node 8 corrections, min registers 4. The delay element 12 is necessary for choosing the moment of information shift in registers before recording the next line, and element 13 is for gating information in register 5,

Claims (1)

Claim A device for monitoring and correcting information containing sequentially connected control unit connected to input and. the output of the device, the first group of AND elements, the inputs of which are connected to the outputs of the AND elements of the second group, to the input 15 of the device and to the signal conditioner, the first register connected to the first delay element and to the output of the device, and the switch connected to the control and memory units, the inputs 20 of which are connected to the second register connected to the elements of the second group, except for the fact that, in order to simplify the device, it contains shift registers, the inputs of which are connected to the switch and the input of the device, and the output is sub are connected to the inputs of the AND elements of the second group and to the control unit, the second delay element connected to the input of the device and to the second register ', a comparison unit connected to the shift registers, to the second register and to the signal driver, and the third delay element connected to elements of the second group and with the block comparison.