SU830134A1 - Apparatus for digital registering of weight - Google Patents

Description

one

The invention relates to weighing technology, in particular to devices for digitally recording measurement results.

There is a known digital system for recording averaging results, in which the change in the averaging time of the measurement results is used. This system contains a pulse-width regulator of the compensation current, a generator of counting pulses, a frequency divider, a period counter, a key, an averaging counter, accumulative counters, and a display register. The averaging time change device contains switches by which the counting factor of the period and averaging counter 1 is changed.

The disadvantage of this system is that the choice is necessary. the averaging time is carried out manually using switches mounted outside the instrument. In addition, the choice of averaging time is limited to two r-three values.

The closest in technical essence to the invention is a digital recording device, a weight, containing a pulse-width modulator, connected to a position sensor of a moving part of a scale, to a coil of an electromagnetic leveling system and to a key connecting a counting pulse with an average counter, connected to a cumulative counter and a period counter connected to the Indication register by the time management unit

averaging and stabilization and with reversible counter 2.

However, this device does not provide the required accuracy, since it only reduces, but Re eliminates fluctuations in readings.

The goal is achieved by the fact that the averaging and stabilization time control unit is designed as a comparison node, four keys, an inverter and two OR elements, and the inputs of the comparison node are connected to the low-order outputs of the accumulative counter and the display register, the output is less than the comparison node through the first the key and the first element OR to the input of the addition of the accumulative counter, the output More comparison node via the second key and the second element OR are connected to the input of the subtraction of the accumulative counter, output

Equal to the comparison node through the third key is connected to the subtracting input of the reversible counter, and through the inverter and the fourth key to the addition input of the reversible counter, while the control inputs of the first three keys are connected to the first clock output of the period counter, and the controls of the fourth key input associated with its second clock output.

FIG. 1 is a block diagram of the device; Fig. 2 is a block diagram of the averaging and stabilizing time management block and the coupling of this block.

The device contains a moving part 1 of the scale (not shown), a sensor 2 of the position of the moving part 1, a pulse-width controller 3, a generator of 4 counting pulses, a key 5, a counter b (divider), an averaging counter 7, a counter of 8 periods, a cumulative counter 9 , the display register 10, the indicator 11, the averaging and stabilization time control unit 12, and the reversible counter 13. The block 12 (FIG. 2) is made in the form of a comparison unit 14, keys 15-17 of the first clock, key 18 of the second clock, inverter 19, elements OR 20 and 21.

The device works as follows.

The moving part 1 of the balance with load P is balanced by the electromagnetic force generated by the compensation current of the pulse-width regulator 3, which depends on the signal from the sensor 2 of the position of the moving part 1; Pulse width regulator 3 is synchronized by counter signal 6. Generator pulses of 4 counting pulses through key 5 and averaging counter 7 are recorded in accumulative counter 9. Recording by the counter signal 8 periods stops, the content of accumulative counter 9 is transferred to register 1 in the display and further on indicator 11. At the end of the accumulation of counting pulses, the codes of the lower bits of the cumulative counter 9 and the display register 10 are fed to the inputs of the comparison node 14 of block 12. If there is no scatter of the low-order readings, then shy discharge. And the cumulative counter 9 is equal to the low-order bit B of the display register 10 and the pulse from the output Equal to node 14 through comparisons via key 17 on the first clock pulse of the counter of 8 periods reduces by one the content of the reversing counter 13. Since the output of the reversible counter 13 is connected with the control the inputs of period counters 8 and averaging 7 then the averaging time is changed accordingly. In the case when The low-order bit of the cumulative counter 9 is greater than the younger bit of the register of the 10-display.

the output signal of the Node 14 more comparison by the first clock pulse of the counter of 8 periods through the key 16 and the element OR 21 subtracts one from the low-order bit of the cumulative counter 9. When the low-order bit on the accumulation counter 9 is less than the low-order register of the display 10 and the output signal is Less than a node 14 comparisons through key 15 and the element OR 20 increases, the low-order bit on the accumulation counter 9 by one.

Thus, in the proposed device used three-position

 regulation of averaging time with the dead zone of width il of the smallest discharge. In this case, this zone is controlled depending on the rate of change of the indication of the indication. For this purpose, 0 are used with the outputs of the device for comparing the codes More, Less and Equal instead of the outputs used in the known device There are oscillations and No oscillations, due to which it is increased

5 accuracy of recording the measurement result.

Claims (2)

1.Patent POWER number 3786884, cl. 177-178, published. 1977. 2. USSR author's certificate for application number 2685815, cl. G 01 G 23 / Zy 1978 (prototype) U2.f 9 ±