SU811500A1 - Device for line state control - Google Patents

Description

OR-NOT 5 and b gogic circuits, limiting resistors 7 and 8 and transistor switches 9 and 10, winding of call supply relay 11, winding of relay connecting to talk bus 12, wires of loop 13 and 14, contact groups 15 and 16, chokes 17 and 18, an additional resistor 19, a load resistor 20, a Zener diode 21, an integrated, W / C-pep, consisting of a resistor 22 and a capacitor 23, a D-type trigger 24, an AND-NE logic 25, a pulse generator reading and setting zero 26, the logic OR-NOT 27 and the source of the ringing voltage 28.

The device monitoring the state of the line loop works as follows.

In the initial state of the wire of the loop, lines 13 and 14 are open, and the moving contact of the subscriber switch 1 occupies the upper position (Fig. 1). The level of logic “1 from the fixed contact of the subscriber switch 1 enters the display unit 4 and to the second inputs of the OR-NOT 5, 6 logic circuits. In accordance with the logic tables for the OR function — NOT the outputs of the OR-NOT 5 logic circuits, 6, the logical level "O" is maintained. In this case, the basic circuits of the transistor switches 9, 10 are de-energized, the winding of the call supply relay 11 and the winding of the connection relay to the talker buses 12 are de-energized. The level of the logical "O from the output of the logic circuit OR NONE 5 is fed to the first input of the logic circuit OR NONE 27, allowing passage of setting pulses to zero from the output of the read pulse generator and setting to zero 26 to the output of the logic circuit OR NONE 27 and to the installation the input R of the D-type trigger 24. Due to the fact that the subscriber line loop is open, the loop current is zero. Consequently, the voltage across the load resistor 20, the common point of the integrating / C-circuit, consisting of the resistor 22 and the capacitor

23 and the information input D of the D-type flip-flop 24 is also zero.

As a result, the D-type trigger 24 is in the zero state and can be held in this state indefinitely until the information on input D changes. The logic level is "1 inverse of the D-type trigger output

24 is continuously applied to the first input of the logic circuit IS-NOT 25, allowing (in accordance with the truth table of the logic function AND-NOT) the passage of read pulses from the first output of the generator of read pulses and setting to zero 26 on the output of the logic circuit IS-NOT 25 and the clock input From the D-type trigger 24. The logic level “1 from the inverse output of the D-type trigger 24 goes to the first inputs of the display unit 4 and the logic circuit OR NOT 5. In this case

the display unit 4 indicates the initial state to which the logical "1 levels at its inputs correspond.

In the outgoing call state, the mobile contact of the subscriber switch 1 is moved to the lower position (Fig. 1). In this case, the logic level “O from the fixed contact of the subscriber switch 1 enters the second inputs 10 of the display unit 4 and the OR-NOT 5 logic circuits. 6. The presence of the logic levels“ 1 and logic “O, respectively, on the first and second inputs of the display unit 4 provides an indication 5 outgoing call status.

The logical signal at the input of the logic circuit OR NOT 5 does not change until the logical level "1.

0 The read pulses from the first output of the read pulse generator and the setting to zero 26 are passed to the output of the OR-NOT 6 logic circuit and then are fed to the base circuit of the transistor switch 10.

5 The transistor switch 10 is periodically turned on, causing the winding of the call-feeding relay I.

The contact group of the call supply relay 11 periodically, with a read pulse frequency, connects a normally closed contact of the connection relay to conversational women 12 to a source of ring voltage 28. As a result, the calling voltage is periodically supplied to the subscriber line through the normally closed contacts of contact groups 15, 16.

Due to the rectifying properties of the Zener 21, passing an alternating current through the line loop, auxiliary resistor 19, a load resistor 20 and a Zener diode 21 causes a pulsating voltage to appear on the load resistor 20. This voltage is smoothed by an integrating / C circuit consisting of a resistor 22 and the capacitor 23 and acts on the input D of the trigger D-type 24.

FIG. 2a, read pulses are shown which in this device are simultaneously fed to control unit 2 and

0 through the logic circuit AND-NOT 25 to the counting input of the trigger D-type 24.

FIG. 2 b shows a ringing signal sent to the subscriber's line. For most electromagnetic relays

5, the on time T2 is in the order of a few units or tens of milliseconds, and the delay of the D-type triggers in integrated design — TI does not exceed units of microseconds.

0 Thus, with the same control signals, information is first read from the D input of the D-type flip-flop 24, and then after a time interval T2-TI the winding of the nodache relay turns on

call 11 and during the time ti in line

The ring voltage is applied, after which, during the interval T, a constant voltage is applied to the line, as in the initial state. This protects the control unit 2 from the influence of the ring signal and the false indication of the closed loop.

In the proposed device for protecting the control unit 2 from failures caused by the discharge of the coupling capacitor of the telephone apparatus, the time 2 (the time interval between the moment the call signal stopped and the moment the information was read from the D input of the D-type trigger 24) is longer than the capacitor discharge, i.e., a polling of the state of the line loop with respect to the moment the ring signal is removed is performed at a time interval that is known to exceed the transient discharge time of the capacitor.

The D-type trigger 24 for most of the read pulse period is not sensitive to changes in information at input D. This protects this device from extraneous pulse voltages in the line.

When the loop is closed through the additional resistor 19 and the load resistor 20, a current flows, creating a voltage drop across the load resistor 20, with which the zener diode 21 is shifted to the area of electrical breakdown. The stabilization voltage of the Zener diode 21 is chosen equal to the logic level “1. The logical level "I with the load resistor 20 through the integrating / C-circuit is fed to the input D of the D-type flip-flop 24.

With a short loop, the additional resistor 19 limits the current through the Zener diode 21.

A positive read pulse of input C of the D-type flip-flop 24 is switched to one state. In this case, the level of the logic "O, coming from the inverted output of the D-type trigger 24 to the first input of the AND-NE logic circuit 25, blocks the passage of read pulses to the output of the AND-NOT logic circuit 25. The latch is triggered, excluding the possibility of changing the trigger state D- Type 24 on inputs D to C.

At the same time, the logic level “About from the inverse output of the D-type trigger 24 goes to the first inputs of the display unit 4 and the logic circuit OR — NOT 5.

Therefore, the logical level "1 appears at the output of the logic circuit OR - NOT 5 (according to the truth table of the logical function OR NOT); the transistor switch 9 is switched to the saturation state, the connection winding to the talk buses 12 is activated and contact groups 15, 16 connects the subscriber line to the Drossel m 17, 18 spoken tires. The display unit 4 indicates the state of the conversation, which corresponds to the presence of logic levels “O at its inputs. At the same time, the logic level “I from the output of the logic circuit OR NONE 5 goes to the first input of the logic circuit OR NI 27, blocking the passage of setting pulses to zero at the set input R

D-type trigger 24. As read-out pulses, you can use read pulses after dividing their frequency by n times (where n is an integer 2). As a result, the D-type trigger 24 retains its state until the subscriber switch 1 returns to its original state.

At the same time, the logic level “1 from the direct output of the D-type trigger 24

enters the third input of the logic circuit OR-NOT, blocking the passage of read pulses into the base circuit of the transistor switch 10. By the level of the logic "O from the output of the logic circuit OR-NOT

b, transistor switch 10 is turned off. The winding of the call-giving relay 11 is de-energized, the contacts of the call-giving relay take the initial position.

When the loopback line 13, 14 is disconnected, the logic level "O" is established at the input D of the D-type trigger 24. However, the D-type trigger 24 will be in a single state as long as

The user switch 1 does not return to its original state. When this happens. at the output of the logic circuit OR NOT 5, a logic level of “O. This level is used to turn on the transistor switch 9, the winding of the connection relay to the talk bus 12 is de-energized and in its contact groups 15 and 16 disconnects the subscriber line from the chokes 17, 18 of the talk bus.

At the same time, the same logical level “About norrvnaeT and the first input of the OR-NOT 27 logic circuit, allowing passage of setting pulses to zero from the second output of the readout generator of the PPI generator and setting of zero zero 26 n set-up h R of D-type flip-flop 24. the null D-type trigger 24 is transferred to the zero state. When an incoming call is closed, the wires of the stub line 13 and 14 are closed. At the same time, with the load resistor 20, the logic level "1 is fed to the input D of the D-type flip-flop 24. The positive edge of the read pulse arrives at the input

From the D-type flip-flop 24, the readout of inorption from input D occurs: the D-flip-flop 24 translates to one state. At the same time, the level of the logical "O with inverse output of the D-type trigger 24 blocks the passage of read pulses to

the output of the AND-NOT 25 logic circuit and the clocked input of the D-type flip-flop 24. The deadlock triggers, excluding the possibility of changing the state of the D-flip-flop 24.

At the same time, the logic level "O" arrives at the first inputs of the display unit 4 and the logic circuit "OR-NOT 5. At the same time, the display unit 4 indicates the incoming call from the subscriber, which corresponds to the logic level" O on the first and logical "1 on the second input, and the logical signal at the output of the logic circuit OR-NOT 5 retains its previous value.

The logic level "1 from the direct output of the D-type trigger 24 goes to the third input of the OR-NOT 6 logic circuit, the logic signal at the output of which also does not change its value. It follows that the transistor switches 9, 10, and thus the winding of the call supply relay 11 and the winding of the connection relay to the talker buses 12, are in the initial position. When translated into the talk state, the movable contact of the subscriber switch 1 is moved to the lower position (FIG. 1). In this case, the actuators are transferred to the same states as in the transition to the talk state from the outgoing call position.

Claims (1)

Invention Formula The device for monitoring the state of the loop of the LINE, containing a subscriber switch, the control unit, the first output of which is connected to the winding of the call supply relay, the source of the ring voltage connected to one wire of the LINE loop, the second wire of which is connected to the common bus through serially connected extension resistor, load a resistor and an integrating C-circuit connected in parallel with the load resistor and the zener diode, characterized in that, in order to increase the reliability of protection of control circuits against impulse zheny etc., entered and read pulse generator setting to zero, the trigger D-type, AND-NOT and OR-logical circuits, while the information input of the D-trigger is connected to the output of the integrating / C-circuit, and input C to the output of the AND-NOT circuit, the first input of which is connected to the first input of the control unit and the first output of the generator of readout and zeroing pulses, the second output of which is connected via the OR-NOT circuit with the input R of the D-type trigger, the inverse output which is connected to the second input of the control unit and the second input of the NAND circuit, and the parallel output to the third input of the control unit, the output of which is connected to the second input of the OR-NOT circuit. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 543200, cl. H 04M 3/30, 1975 (prototype).