SU789827A1 - Voltage monitoring apparatus - Google Patents

Description

one

The invention relates to electrical measuring equipment and can be used to control the voltage of a voltage source operating in a guarring mode and having changed it; me the magnitude and direction of current ngrueki at maximum. but permissible load currents.

Devices are known that include upper and lower threshold comparators, potentiometers, an inverter, and a matching element.

A disadvantage of the known devices is their limited functionality, since they do not allow to control the output voltage of the voltage source operating in the shock mode and having a variable magnitude and direction of the to-ky load. .

The closest in technical essence to the present invention is a voltage monitoring device containing top and comparators. lower threshold levels, printsiometers, trigger, inverter and element, coincidence 2.

The disadvantage of this device is that it also does not allow to control the output voltage of a voltage source, operating on-line mode and having a change e, the magnitude and direction of the load current, at the maximum permissible load currents, i.e. its functionality devices are also limited.

The purpose of the invention is to expand the functionality.

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This goal is achieved by the fact that a known device containing comparators of the lower and upper threshold levels, the potentiometers, the moving contacts of which are connected to the first inputs of the comparators, the inverter and the coincidence element, the first and second inputs of which are connected from the output of the 1 through an inverter and equipped with an electronic key, made according to the complex inverter circuit with an amplifier and an emitter follower connected in series at its output, the loads of which

25 serve as potentiometers, with this the input and output of the electronic key are connected together and connected to the input terminals of the device, and the second inputs of the comparators and the third input of the coincidence element are connected to the clock pulse bus. The drawing shows a functional diagram of the device. The device contains a comparator 1 of the lower threshold level, a comparator 2 of the upper threshold level, potentiometers 3 and 4, an inverter 5, a coincidence element 6, an electronic switch 7 containing resistors 8, 9 and 10, a diode 11, transistors 12 and 13, an amplifier on a transistor 14 and the emitter. Repeater on the transistor 15, the bus 16 clock pulses and input terminals 1 7 and 1 8. The device works as follows. The output of the monitored voltage source (devil, not shown) is connected to the input terminal 17 of the device. The controlled voltage source operating in the key mode is in two states (open and closed). If the controlled voltage source is closed, the output voltage level is high at its output, corresponding to a logic signal, the load current is from the source controlled voltage to the load. If the source of the monitored voltage is open, then at its output the voltage level is low, corresponding to a logical signal, the load current has the opposite direction, i.e. from the load to the source voltage control. The condition of the electronic switch 7 is determined by the voltage level applied to the input terminal 17 of the device. If this level is high (above the trigger threshold of the electronic switch 7), then a current flows through the collector junction of the transistor 12, which functions as a switch, and a current flows into the base of the transistor 13. As a result, the transistor 13 is in the open state. 1At the transition from the BA to the emitter emitter follower, a current flows on the transistor 15, ensuring its operation in the saturation mode. Diode 11 is closed, and the amplifier transistor 14 is turned off. Potentiometer 4 through the collector-emitter junction emitter follower transistor 15 is connected to the input terminal -17 of the device. Thus, at a high level of controlled voltage, the load of the source of controlled voltage is potentiometer 4, and the loading current has a positive direction. If the level of the monitored voltage is low, then the base current of the transistor 12 flows through its emitter and further to the input terminal 17 of the device, i.e. to the source of the controlled voltage. The transistor 13 and the emitter follower on the transistor 15 when this is off, and the amplifier on the transistor 14 is open. Potentiometer 3 through the collector-emitter junction amplifier on the transistor 14 is connected to the input terminal 17 of the device. Consequently, at a low level of controlled voltage, the load of the source of controlled voltage is 5 potentiometer 3, and the load current has a negative direction. Potentiometers 3 and -4 are selected so that they provide the maximum allowable load currents of the source of controlled voltage. At the input terminal 18 of the device from the source of clock pulses (in hell, not shown) clock pulses are applied. Clock pulses must follow at the same time as the controlled voltage drops or be slightly ahead of them. The duration of clock pulses must somewhat exceed the duration of transient processes occurring in the device when the controlled voltage passes from the logic level O to the logic level and vice versa. Clocking the operation of the device allows to avoid its false alarms, conditioned by transients in the source of controlled voltage. The state of comparators 1 and 2 of the lower and upper threshold levels, as well as the coincidence element 6, is determined primarily by the voltage level on the bus 16 clock pulses. If this level is logical O, then at the outputs of comparators 1 and 2 of the lower and upper threshold levels, as well as at the output of element 6, the coincidence is logical. If the voltage level on the bus 16 clock pulses is logical, then the state of comparators 1 and 2 of the lower and upper threshold levels is determined by the level of the voltage at their inputs connected respectively to the potentiometers. 3 and 4, and the voltage level at the output of element 6 is coincident, i.e. at the output of the device, the states of comparators 1 and 2 are lower. and upper threshold levels. To adjust the device, a reference voltage source (not shown) is connected to its input terminal 1.7, which accurately levels the reference voltage. About and reference voltage. The initial voltage at one of the inputs of the Comparator 1 of the lower threshold level is set at the presence of a reference level at the input terminal 17 using a potentiometer 3, and the initial voltage at the corresponding input of the comparator 2 of the upper threshold level at the input level 17 of the reference voltage 1 s using potentiometer G 4.

Claims (1)

Claim A device for monitoring voltage, containing comparators of the lower and upper threshold levels, potentiometers, the movable contacts of which are connected to the first inputs of the comparators, an inverter and a matching element, the first and second inputs of which are connected to the outputs of the comparators, the first directly, the second through an inverter, characterized in that, in order to expand the functionality, it is equipped with an electronic key, made according to the complex inverter circuit with an amplifier and emitter sequentially connected at its output th repeater loads which are potentiometers, the electronic key input and output are connected together and are connected to input terminals of the devices to the second inputs of the comparators and the third input matching element connected to the bus clock.