SU773900A1 - Static converter control method - Google Patents

Description

one

The invention relates to converter technology and can be used in the construction of secondary power sources.

A known method of controlling a transistor static converter, at least one load that is connected via a rectifier, by sequential supply of control pulses to the power 10 transistors 1.

There are also known methods for devices that provide a specific sequence of supply and pulses to the power transistors 2 and 3.5.

The closest technical solution to the invention is a method of controlling a static converter having at least one supervisor in the output circuit, by supplying control pulses to power transistors in series by 20

13.

The known methods have a fundamental disadvantage: when 25 attempts to reduce the dynamic losses at shutdown, the dynamic switching losses increase and vice versa.

At the same time, it is the dynamic losses that limit the efficiency and monitoring.

ness and serve as a deterrent to the miniaturization of static converters by increasing the frequency.

The purpose of the invention is. exclusion of dynamic losses in semiprivodnik elements.

This goal is achieved by starting from the moment of termination of the next control pulse, the process of resorption of excess carriers is initiated, for which the voltage output is proportional to the input voltage, the residual voltages on the semiconductor elements are fixed and the next control pulse is fed after changing the value of residual stresses on the semiconductor elements or termination of the resorption processes of excess carriers, and the next control pulse is given when those indicated fixed "1h zgshannogo voltage level.

The drawing shows an equivalent static converter circuit.

It contains power transistors 1-4, a diode rectifier 5-8, an electrolytic capacitor 9, which

at the switching intervals, it is equivalent to the auxiliary voltage source, the value of which corresponds to the reduced voltage of the primary source. DC load 10, reduced AC load 11. During alternate switching of power transistors 1.2-3.4, an alternating voltage is applied to the diode rectifier 5-8, which charges the capacitor 9 to a voltage approximately equal to the voltage of the primary source. A constant current load 10 and an alternating current load 11 are supplied with a constant current and an alternating current.

Consider the processes when switching. Transistors 1 and 2 Hc1 input TCs in peiicHMe are saturated. In this case, the diodes 5 and 6 are biased in the forward direction and the current of load 10 flows through it. After the base current of the saturated transistors 1 and 2 is changed (turned off or reversed), the currents in the circuit do not change, as the resorption process of excess carriers in the transistors 1 and 2. At the end of this process, the collector currents of the said transistors and the direct currents through diodes 5 and 6 begin to decrease.

Starting from this moment, the auxiliary source, which in this case serves as a capacitor 9 acts on the circuit, initially maintaining the current through the load 10 unchanged and, after reducing the forward current through diodes 5 and 6 to zero, ensures the development of a reverse current that closes through the load 11 In diodes 5 and 6, under the action of reverse current, the processes of resorption of excess carriers proceed and the voltage drop across them is practically zero. In this connection, the residual voltage drops on the semiconductor elements 1,2,5,6 in the process of changing their currents are fixed by the difference of the auxiliary and primary sources voltage at a level close to zero. Next, the process of reducing the currents in the collector of transistors 1 and 2 and then the dissolution of excess carriers in diodes 5 and 6 ends. Next, the process of reducing the currents in the collectors of transistors 1 and 2 ends, after which the dissolution of excess carriers in diodes also ends. max 5 and 6. Transistors 1 and 2 are in cut-off mode and the whole process of switching them from the saturation region to the cut-off region is carried out in an ideal loop. Switching excludes dynamic losses to the off.

At this stage, the current consumed from the primary source is negligible, since all transistors are in cut-off mode.

Then begins the process of restoring the inverse resistance of the dirds 5 and 6.

In the case of a small alternating current load at this stage, there are no dynamic losses in both the transistors and the diodes, since the process of restoring the reverse, the resistance occurs at low currents through the diodes. With an alternating current load comparable to a direct current load, there are no dynamic losses in the transistors and dynamic losses in the diodes. In this case, the process of reactive energy recovery is observed into the auxiliary source 9 or the primary source.

At the end of the process of restoring the reverse impedance (at AC load) and at the end of the recovery process (at high AC load), all power diodes are in reverse bias mode, and all transistors are in cut-off mode. Only after this, the forward control current supplied to the bases of transistors 3 and 4 is switched on.

The rising collector current of transistors 3 and 4 puts diodes 7 and 8 into forward bias. The sukvlar voltage drop across transistors 3 and 4 is determined by the voltage difference between the primary and auxiliary sources, which is close to zero.

Thus, the entire process of switching from the cut-off mode to the saturation mode is carried out along an ideal switching loop, eliminating dynamic switch-on losses. Then slow processes proceed and then the fast processes are repeated.

Using this method as the basis for building the power and control part /, you can dramatically improve the basic characteristics of transistor static converters.

Claims (3)

1. Laptev N.N., Moin B.C. Dynamic loss in the transistors of inverters. - Electronics, 1966, 1, p. 1881. 2. Moin B.C. Transient switching process of transistors in static converter circuits. - Electrical Engineering, 1964, 9, p. 22-24. 3. Authors certificate of USSR 169662, cl. H 02 M 7/48, 1965. -Un 0 f U / 7 IZ in. n tj