SU771679A1 - Pulse frequency multiplier - Google Patents

Description

(54) MULTIPLINE OF PULSE FREQUENCY

one

 The invention relates to a pulse technique, in particular, to devices for converting input signals of frequency sensors, and can be used in various measuring converters and electronic automatics devices.

A pulse frequency multiplier is known, comprising a sinusoidal oscillator, an emitter follower, a modulator, a push-pull power amplifier, a characteristic synthesizer made on nonlinear control transformers, and a detector l.

This device is very complex and is intended to multiply the frequency of the harmonic signals.

Also known is a pulse frequency multiplier containing an integrator, to the input of which input pulses are fed, output connected to inputs n of threshold switches, the outputs of which are connected through the differentiator to the input of the phase inverter and forming device 2. At the output of the multiplier, the frequency of the pulses is determined by the formula. . ewx 2 nf, where f is the frequency of the input pulses

The disadvantage of such a frequency multiplier is the requirement of frequency stability f and the duration of the input pulses.

The aim of the invention is to expand the frequency range of the input signal.

To do this in the frequency multiplier

10 pulses containing a counting trigger, the outputs of which are connected to the second inputs of the current sources through the switches, connected to the input amplifier of the buffer amplifier, and the threshold 15 devices whose outputs are connected to the inputs of the OR element, are connected in series and connected between the output of the buffer amplifier and the first inputs of threshold devices are an AC amplifier, rectifier, analog storage device and voltage divider, with the second inputs of threshold devices connected to the output

25 straightened.

The drawing shows a structural electric circuit of a pulse frequency multiplier.

The pulse frequency multiplier contains trigger 1, the counting input of which is the input of the multiplier, and the outputs are connected to control circuits of analog switches 2 and 3. The inputs of the keys are connected, respectively, through current sources 4 and 5 to buses B and 7 reference voltages -U The outputs of the analog switches are connected to one plate of the capacitor 8 and to the input of the buffer amplifier 9. Another capacitor plate is connected to the common power supply bus. The output of the buffer amplifier through the AC amplifier 10 and the rectifier 11 is connected to the input of the analog storage device (AMD) 12 and to the inputs of the threshold devices 13, 14, 15. The output of the AMU is connected to other inputs of the threshold devices through the voltage divider 16, the outputs of which are connected through the element OR 17 to the output of the frequency multiplier.

The device works as follows.

The input pulses, arriving at the counting input of trigger 1, transfer it from one steady state to another. The trigger output signals alternately open analog switches 2 and 3 for the same time. In this case, capacitor 8 is linearly charged from bus 6 of reference voltage + U via current source 4 n and linearly discharged through current source 5 to bus 7 of reference voltage -U.

The buffer amplifier 9 is designed to increase the input impedance of the AC amplifier 10. The latter amplifies the variable component of the triangular signal, which is rectified by the rectifier 11, made, for example, according to the synchronous detector circuit. At the output of the CCD 12 there is a DC voltage equal to the amplitude of the triangular pulses, which is divided by the divider 16, made, ng, by the resistors; thus, the actuation and release of the threshold devices 13 14, 15 takes place at equal intervals of time. At the same time, their output signals with their leading and trailing edges trigger the element

OR 17, at the output of which a frequency pulse signal is generated.

2 nf

s

BX (

where n is the number of threshold devices.

A change in the frequency of the input pulses, such as a decrease, leads to an increase in the amplitude of the triangular pulses and, consequently, to an increase in the DC voltage at the output of the ABC and the threshold voltages at the outputs of the voltage divider. Wherein

frequency multiplication factor remains unchanged.

The frequency multiplier allows frequency multiplication with a constant factor in a wide frequency range of input pulses due to the introduction of an AC amplifier, AMS and voltage divider.

Claims (2)

1. Gluzman P. L. et al. A wide frequency multiplier with a variable multiplication factor. Instruments and Experimental Technique, 1978, № 4, p. 149-151. 2.C. Sequential switching for low frequency multiplication. Electronics, 1967, 17, p. 12-14. t fh ten ff 7 - {}