SU752741A1 - Apparatus for controlling thyristorized pulse-width converter - Google Patents

Description

the generator, the input of the voltage reversing unit is connected to the output of the voltage sensor, and the output is connected to the input of the pulse duration regulator, the switch of the converter operation modes by the outputs is connected to the corresponding inputs of the logic unit, the inputs through the mode switching driver to the output of the pulse beginning generator, to the output of the pulse end driver and to the trigger trigger output, a converter shunting unit is connected to the output of the pulse end generator by the inputs, the minimum output of the sensor oh the duration of the pause, to the output of the inverter, and the output of the converter bypassing unit is connected to the output for connecting the bypass of its contactor. FIG. 1 is a circuit diagram of a device for controlling a thyristor pulse-width converter; in fig. 2 - power part of the converter; in fig. 3 - time diagram of the device. A device for controlling a thyristor pulse-width converter (see Fig. 1) contains a clock pulse generator 1 with an output connected to trigger 2 with a counting input and to a sensor 3 with a minimum pause duration connected by its output to inverter 4 inputs, amplifier 5 of driver 6 the onset of impulses; pulse duration controller 7, mode switching driver 8, pulse end driver 9, mode switching trigger 10, converter bridging unit 11, elements 12-14, amplifier 15, voltage reversing unit 16 including a rectifying bridge 17, parametric stabilizer 18 and adjustable resistance 19, starting control voltage sensor 20, pulse driver 21, switch 22, start trigger 23, reverse switch contact 24, contact 25 for blocking logic unit 26, including And 2 elements 7-36, 37-40 amplifiers with transformer outputs. The power part of the converter (see Fig. 2) contains group thyristors 41 - 44, motor 45 with excitation winding 46, buffer diode 47, diodes 48, 49, reactor 50, filter capacitor 51, shunt contactor contacts 52, magnetically coupled switching inductors 53 -56 and switching capacitor 57. The device operates as follows. In the initial state, all elements of the circuit are energized, and the transients after power is completed. The clock pulse generator 1 produces f / i square pulses (see FIG. 3), trigger 2 divides the frequency of the generator 1 in half, and the potentials from its outputs (Uz) are fed to the inputs of logic unit 26, as well as to the input of the pulse former 21. Trigger trigger 23 goes in the position when at its output, and hence at the start-up input, there is a zero potential, which prohibits the appearance of output pulses on all elements of logic block 26, except elements 29 and 32, since their inputs negative potential from the other output of flip-flop 23, therefore, control pulses can be received only through amplifiers 38 and 39 to power thyristors 42 and 43, which corresponds to the pre-charge mode of the switching capacitor 57. At this time, the switch trigger 10 is both It blocks zero at input b of logic block 26, and negative potential (f / io) at input a, elements 3-6, 8, 9 provide voltages at their outputs corresponding to voltage Oz, f / t, and, and. Us, Ug. The potential at the output of voltage sensor 20, which can be set automatically and manually (by the controller), is zero, and a voltage (7input) of the parametric stabilizer 18 is applied to the input U of the pulse width controller 7, which ensures its output is a pulse duration corresponding to 7 of a significantly longer RMPN. After switching in the power circuit, the switching capacitor 57 is instantly charged. When the controller knob is switched to the Start position, the contacts 22 are switched II The contact 25 is opened. At the positive pulse front (U) from trigger 2 through the driver 21 and the switch 22 switches the trigger 23 while ensuring the output potentials of the outputs of all elements and logic block 26 at the outputs, except for elements 29 and 32. Moreover, at each positive edge of pulses (f / h) at the output of the driver 6 (at the input I of logic lock 26) negative pulses (U) appear. The pulses ((/ 4) trigger the trigger in the pulse duration controller 7 with pulses (U) and discharge the capacitor. At the moment ti, a pulse (Ue) arrives at the input of the amplifier 37 and through the thyristor 41 in the first half period of the trigger 2 ( on the thyristor 42 in the second half cycle of the trigger 2), it is turned on, and the capacitor begins to recharge along the circuit of the elements 57, 54, 49, 41, 53, 57 (57, 53, 37, 52,54,57). At the same time the charge starts the capacitor in the regulator 7 pulse duration. A positive front at its output (output) appears, respectively, input voltage (Ux). At the moment

h a voltage pulse appears at the output of the imaging unit 9 of the end of the pulses (Ug), which ensures that the amplifier 40 and, accordingly, the thyristors 41 (42), 44 (43) are switched on in the power circuit. If by this time the switching capacitor 57 is completely recharging, then only a small pulse of the capacitor current of the capacitor 57 passes through the load.

The start-up rate is set by increasing the voltage at the output of sensor 20, which can be carried out by the controller or automatically. The voltage from the output of the sensor 20 compensates for the voltage from the parametric stabilizer 18, which leads to a decrease in the signal level at the C / T input, i.e., to a decrease in the length of time from switching on the thyristors 41 (42), 44 (43). In this case, the proportion of the recharge energy of the switching capacitor 57 in the load current will smoothly increase. At the time r when the voltage from sensor 20 fully compensates the voltage from stabilizer 18, the pulse duration regulator provides the minimum pulse width pminS with the restarting energy of the switching capacitor closed through the load (45, 46), and in the control circuit the signals U, Us coincide. , with signals from the trigger 23 and the trigger 10 switching modes, there is a signal at the output of the element 12 (f / ia), which switches the trigger 10 to the position corresponding to the second start mode, during which It increases the duration of the pulses on the controller output 7 by increasing the voltage level at the output of the sensor 20. Thus, the voltage reversing unit 16 provides, with a gradual increase in voltage at the output of the sensor 20, from zero to maximum, first smoothly decreasing and then gradually increasing controller pulses 7, which allows the traditional starting scheme to be preserved by a set of controller positions in one direction.

In the second start mode, logic block 26 provides in the first mode; trigger period 2, at the beginning of the pulse, turn on amplifiers 37, 39, respectively, thyristors 41, 43, and in the second half-period, amplifiers 38, 40, respectively, thyristors 42, 44. At the end of the pulses, amplifiers 38 (37) and thyristors 42 (41) are turned on.

As the pulse width P increases, the voltage across the motor increases. At Рmax, the further increase in the pulse width ceases, and the negative potentials on the element I 13 coincide, which causes the switching of the trigger I and through the amplifier 15 to switch on the contacts 52. At the same time, the converter is probed with a minimum voltage jump on the motor, since bypassing does not depend on the supply voltage level. The reverse switching of the trigger is carried out when the signals on the element 14 coincide.

Pins 24 and 25 serve to switch trigger 10 to the position corresponding to the first start mode.

The economic efficiency of the device is to increase the reliability of the rolling stock by eliminating the jolts of the pulling force, to increase boxing resistance.

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Claims (2)

1.Birznieks L.V. Pulsed converters of direct current. M., “Energie, 1974, p. 231, fig. 10--7. 2. USSR author's certificate oN 474897, cl. H 02P 13/16, 04.21,72,