SU733106A1 - Device for controlling a-c thyristor switch - Google Patents

Description

I

The invention relates to thyristor switches of alternating current, can be used, for example, to control thyristor switches with transformer load.

Lime control device thyristor switch AC and containing elements of the synchronous control thyristor.

It does not limit the inrush of current through the thyristor and the load at the moment of switching on.

It is also known to control the thyristor switch of the alternating current, which contains the amplifier-driver of starting pulses, the output of which is connected to the control transition of the thyristor, the controlled driver of delayed pulses, the pulse input of which is connected to the mains generator, and the control input to the first output of the ramp source, and the control signal source 21

The disadvantage of the prototype is low reliability due to the inrush current when the load is switched on.

The purpose of the proposal is to increase reliability by eliminating inrush current when the load is switched on.

For this purpose, an AC thyristor switch control device containing an amplifier driver, the output of which is connected to a thyristor control transition, a controlled delay pulse generator, a pulse input of which is connected to a power supply driver, and a control input - to the first output of the source is linearly increasing, and the source of the control signal, the element AND, the threshold element and the element OR, whose output is connected to the input of the amplifier, are introduced , the first input to the output of the controlled delay pulse generator, the second to the third inputs to the forward and 1-hole outputs of the threshold element, and the fourth input to the pulse input of the delayed pulse generator connected to the clock driver through the And element, the second input of which is connected to the output of the source of the control signal and the input of the source of the linearly rising signal, to the second output of which the input of the threshold element is connected. The structural electrical circuit of the proposed device is shown in FIG. one; in fig. Figure 2 shows time diagrams of voltages at points in the circuit. The device contains a clock driver 1 connected to the AC network and connected to the first input of the AND 2 element; the controllable delayed pulse shaper 3, the pulse input of which is connected to the upstream input of the element 2, the source of the control signal from the RS flip-flop 4 and the control buttons 5 and 6, the output of which is connected to the second input of the element 2, the source of the linearly increasing a signal consisting of an integrator 7 and a current generator 8, the integrator input 7 being connected to the output of the RS flip-flop 4, and the output to the control input of the controlled delayed-pulse driver; the threshold element 9 whose input is connected to the second output of the source of a linearly rising signal, element 2I-OR 10, the first input of which is connected to the output of the controlled driver of the impulse output pulse, the second input - with the inverse output of the threshold element, the third input - with the output of the And 2 element, the fourth input is with the direct output of the threshold element, and the output is with the input of the amplifier-former 11 connected to the control transition of the thyristor 12 connected in series with the transformer load 13 into the source circuit alternately of current. The device works as follows. The sinusoidal voltage of the network (Fig. 2, and

The synchro pulses 1 arriving at the foror turn into pulses (Fig. 2, b), coinciding with the beginning of each half-period of the network voltage and having a duration sufficient to turn on the thyristor 12. These pulses go to the first input of the And 2 element. the second input of the element And 2 receives a logical O signal from the direct output of the trigger 4. Therefore, the output of the element 2 also has a logic level O, as a result of which the thyristor 12 start pulses are absent. In this case, the output voltage of the integrator 7 and the output current of the generator 8 are equal to zero, the signal at the forward output of the threshold element 9 corresponds to the logical O.

When submission by button 5 of the On command. (Fig. 2, c) to the S-input of the trigger 4, the signal of logical 1, coming from its direct output. After the voltage at the output of the integrator 7 reaches the threshold of triggering of the threshold element 9, the signal of logical 1 is covered at its direct output, and the output of element 2I-OR 10 to pass pulses from element I 2, the leading edge of which has no delay relative to the beginning of the half-periods of the mains voltage.

Claims (2)

From the element 10, the pulses arrive at the amplifier driver 11. Here, the starting impulses of the thyristor 12 (Fig. 2, h) are formed, synchronized with the leading edge of the output pulses. At the output of the amplifier-former 11, signals are obtained whose delay relative to the beginning of the half-periods of the mains voltage decreases to zero zero, as a result, the turn-on angle of the thyristor 12 decreases from a value close to 180 ° to 0 °. 4 moves to the second input element AND 2, allows the passage of pulses from the driver of clock pulses J to the first input of the controlled driver of delayed pulses 3 and to the third input of element 2И-OR 10. The driver 3, triggered by the leading edge of the input signals, produces pulses shifted to the end half-periods of the network voltage (Fig. 2, d), which arrive at the first input of the element 2И-OR 10, C of the network 4, the signal of logical 1 also goes to the integrator 7, allowing its operation. Within a certain period of time, the voltage at the output of the integrator (Fig. 2, e) smoothly changes from 0 to the maximum value. At the same time, the output current of the generator 8 connected to the master circuit time of the controlled delay pulse generator 3 through its second input smoothly changes from O to the maximum value. As the discharge current increases, the time of the driving circuit gradually decreases the pulse delay, as a result of which the leading edge of the output pulses moves from the end to the beginning of the half-period of the mains voltage. In the process of raising the output voltage of the integrator 7 from O to a certain level, corresponding to the threshold threshold 9, the signal at the forward output of the threshold element (Fig-2, e) is equal to logical O. This signal prohibits the passage, value on the output of the 2 And - OR 10 (FIG. 2, g) pulses from element 2. The output of element 2I-OR 10 is pulsed from a controlled delayed pulse generator 3, which is provided by a logical signal arriving at the second input of element 2 from the inverse output of the threshold element . when applying the button 6 command Off. at the direct output of flip-flop 4, the signal becomes equal to logical 0, the flow of pulses through element 2 is stopped, and the thyristor 12 is turned off. At the same time, the integrator 7 is reset to zero, the threshold element 9 is reset to its original state, and the device is prepared for the next turn-on cycle. Thus, when the device is switched on, the load, for example, the transformer is gradually brought to power by the nominal voltage of the network (Fig. 2, i). In this case, a transient process takes place, characterized by a sequence of partial cycles of transforming the transformer, which are divided by the amplitude and duration of voltage pulses, which ends with the output of the transformer on the working cycle of the magnetization reversal. Due to the partial reversal cycles, the turn-on current of the transformer is limited at a predetermined level, for example, at the level of the switching thyristor current. This contributes to improving the reliability of the device as a whole, allowing for a fuller use of both the thyristor and the transformer in power. Claims An AC thyristor switch control device containing an amplifier shaper whose output is connected to a thyristor control junction, a controlled delayed shaper driver whose pulse input is connected to a clock shaper connected to the mains, and the control input to the first the source of the source is a linear increase in the signal, and the source of the control signal, characterized in that, in order to increase its reliability by eliminating the inrush current when element, the threshold element and the element 2I-OR, the output of which is connected to the input of the amplifier-former, the first input to the output of the controlled delayed-pulse former, the second and third inputs to the forward and inverse outputs of the threshold element, and the fourth the input to the pulse input of the controlled delay pulse generator connected to the clock generator through the element I, the second input of which is connected to the output of the source of the control signal to the input of the source linearly increasing second signal to the second output of which is connected the input of the threshold element. Sources of information taken into account in the examination 1. US patent number 3569999, cl. 307-252, 1971. 2. USSR author's certificate N 488302, cl. H 02 R 13/16, 07.06.73 (prototype).