SU599713A1 - Logic circuit block of device for pulse control of high-voltage gates of m-phase cascade-bridge transducer - Google Patents

Description

For each period, two narrow pulses are usually applied from this source: one at the beginning of a predetermined conduction interval of the high-voltage gate (moment ta in Fig. 2) and the other at the end of this interval (moment / k pa fig. 2). Moreover, narrow synchronizing pulses can be both unipolar and heteropolar (see the dashed line on the curve Ui, Fig. 2). The input device 3 converts the synchronizing pulses into a rectangular pulse (Us in Fig. 2), the duration of which is equal to the specified duration of the conduction interval of the high-voltage valve 4 (interval / c-4- in Fig. 2) or the duration of the allowed zone. Pulse Us through the logical cell OR 5 enters, first, the second input of the logical cell AND 6, and secondly, undergoes differentiation in the second differentiating device 7, resulting in a narrow pulse corresponding to the leading edge of the pulse Us, is fed to the second input logical cell OR 8, then to the input of the amplifier-former 9 electrical control pulses (, (7i3 at the moment n in Fig. 2), and at the output of the latter, an impulse f / 14 appears at the moment n the beginning of the specified conductivity interval of the high-voltage valve 4 This one The zero through the light channel 10 of the communication enters the valve 4 and, if there is a positive voltage on the latter, switches it on.

During normal operation of the converter, when the direct current of the converter is continuous, each converter gate turns on and conducts current during the time interval (), where () is the specified allowed zone. In normal mode, a three-phase bridge circuit converter (K- / 11) 120el. hail. const, and Y is the angle of commutation.

Consequently, in a normal mode of operation of the converter, for each of its valves it is sufficient to supply only one narrow pulse in the period determining the magnitude of the control angle a (i.e., at time n).

However, in most transient modes of the converter (on, off, automatic reclosing, conversion from rectifying mode to inverter mode, etc.), accompanied by a decrease in DC current, each gate of the converter conducts current during only part of the interval (). Reverse voltage can be repeatedly applied to valve 4 within the allowed band (/ k-4i) (curve t / i in FIG. 2).

To increase the reliability of transducers in transient conditions and to prevent the occurrence of overvoltages hazardous to equipment isolation

the converter requires that valve 4 be turned on again for a predetermined conductivity interval as soon as the necessary conditions for this are met, i.e. the voltage between the anode and cathode of the valve becomes positive. For this, in particular, valve control systems are widely used, which provide wide control pulses whose duration is equal to a given conduction interval ().

In the described device, this problem is solved by applying a feedback circuit consisting of a sensor 11 of voltage transitions at the valve 4 through zero, the communication channel 12 and a converter of 13 light signals. A voltage is applied to the input of sensor 11 between the anode and cathode of valve 4 (curve U in Fig. 2), and at the output of sensor 11, narrow electrical pulses appear (curve t / s in Fig. 2) at times of voltage transition valve 4 through zero from negative to positive values, which through light 5 channel 12 of communication come in the form of narrow light pulses to the input of converter 13 of light signals (second input of logic block 2). At the output of the transducer 13, narrow rectangular 0 pulses with steep fronts (f / js curve in Fig. 2) appear, then coming to the nerve input of the logic cell AND 6. These pulses appear at the output of the AND cell 6 only when there is a signal from the input device 3 at its second input, i.e., as shown in FIG. 2, of the five pulses during the period under consideration (at the moments of / it) at the output of the logic cell AND 6 there are two pulses at the moments of t2 and / h (the C / o 0 curve in Fig. 2), because at these moments the second input of the logic cell there is a signal Us. The output signals of the logic cell are differentiated in the first differentiating device 14, and then narrow electric pulses corresponding to the leading edges of the Uio pulses are fed to the first input of the logical cell OR 8, then to the input of the shaping amplifier 9 electrical control 0 pulses (Uis at times 4 and / h), and at the output of the latter, narrow pulses appear at times / 2 and t, i.e., at times of voltage / 4 at the valve through zero from negative to positive values for a given interval / n - katy them The pulses through the light channel 10 are fed to the valve 4 and re-enable the latter at times slightly different from tz and 30. Thus, the device for controlling the high-voltage gate, which uses the proposed logic block, provides the flow to the gate during each industrial period. the frequency of the narrow pulse at the beginning

a predetermined conductivity interval, which determines the magnitude of the control angle a, and at subsequent moments during a predetermined conductivity interval at each voltage across the valve at zero level from negative to positive values.

As channels 10 and 12, not only light channels, but also radio channels, isolating transformers, etc. can be used.

Controlling a high-voltage gate with narrow control pulses is advantageously different from control with wide control pulses in that it is applicable to any system of transmitting control pulses to a high potential, for any system of distributing control pulses over the thyristors of a high-voltage thyristor block and allows to significantly reduce the power consumed by the formation and amplification schemes of control pulses at high potential.

These advantages are especially noticeable in the case of using a high voltage valve in the shunt valve mode, when it is required to ensure the conductivity of the latter for relatively long time intervals (up to 1-2 s). The proposed block of logic circuits makes it possible to ensure such a mode of operation of the high-voltage valve. In this case, from the converter protection system 15 to the second input of the logic cell OR 5 (the third input of the logic block 2) a continuous signal of a given duration is received. At the time of the beginning of this signal, a control pulse appears at the output of the logic circuit along the circuits 5, 7, 8, 9. In addition, the second input of the logic cell I 6 Io is a signal whose duration is equal to the duration of the signal from the converter protection system 15 (i.e., the predetermined shunting interval). Therefore, in the case of extinction of the shunt valve 4 for any reason, during a predetermined shunting interval, the circuit 11, 12, 13, 6, 14, 8, 9 ensures that it is turned on again at the moments when the voltage on it goes from negative to positive values.

To match the block 2 of the logic circuit with the source 1 of the primary pulses, generate a signal with a duration equal to the duration of the specified conduction interval of the valve 4 (allowed zone), and to take into account changes in the durations of the conduction intervals of the valve 4 in the process of adjusting the ignition angle of the converter, input device 3 is used.

The electrical circuit of the input device 3 varies depending on the type of source 1 of the primary pulses. When using source 1 primary

pulses, at the output of which each period there are two narrow pulses (t / i in Fig. 4) - the first at a given time (tn in Fig. 4) the beginning of the conduction interval of valve 4 (determines the angle of adjustment a), and the second - at the time of termination of the conduction interval (4 in Fig. 4) of valve 4 (i.e. at the beginning of the conduction interval of the next transformer bridge in order of activation), the input device contains a matching device 16 and an allowed zone signal generator 17. The matching device 16 converts

input narrow pulses in imiuls of a given amplitude, duration and rate of increase of Uis, and these parameters do not depend on the corresponding parameters of the input pulses, i.e., provides a consistent load of communication cables from the source 1 of the primary pulses, and also enables unit 2 to start logic circuits from sources 1 primary pulses with different parameters

narrow clock pulses.

The pulses thus transformed are fed to the two inputs of the generator 17 of the signals of the allowed zone, at the output of which the signal of the allowed zone appears in the form of a wide square pulse Un, the beginning of which corresponds to the moment tu, and the end to the moment t. In other words, the duration of the allowed zone signal in the presence of both input

pulses equal to the duration of the conduction interval of the valve 4, defined by the source 1 of the primary pulses.

The allowed zone generator 17 starts with a start pulse f / ie at the moment

The < and < 1 > and the return to the initial state by the return pulse L / u at the instant k (Fig. 4). The generator 17 returns to its initial state, since it prevents the supply of false control to the valve

pulses, for example, at moments 4 and tz (Fig. 2). In the case of a missing or non-returning pulse at time k (for example, when the source 1 of primary pulses are momentarily locked), generator 17 self-returns at time k (dashed line in Fig. 4). The interval is chosen to be somewhat longer than the maximum possible conduction interval of the valve 4 in the process of adjusting the ignition angles of the converter (usually for a three-phase bridge circuit, this interval is chosen to be 180-190 e-degree). The f / n signal of the allowed zone of the gd-t duration (or

) through a logical cell OR 5 is fed to the inputs of blocks 6 and 7 (Ug in Fig. 4).

If necessary, use valve 4 as a shunt valve.

from system 15 transducer inverter to

the second input of the logical cell OR 5 is supplied with the signal / 7, the duration of which is equal to the duration of the required shunting interval and can reach 1-2 s. This signal Io is at the output of the logic cell OR 5 (f / g in Fig. 4), is fed to the inputs of blocks 6 and 7 and provides for switching on the valve at the beginning of the shunt interval and the possibility of multiple switching on of the shunt valve 4 (during extinction the last) at the moments of voltage crossing across it from negative to positive values during the entire predetermined shunting interval.

When using a source of 1 nerve impulses, at the output of which, once in a period, a wide synchronization occurs, a pulse Ui, the beginning of which / 4 determines the angle of regulation a, and the duration - a predetermined conduction interval is 4, a wide synchronization, its impulse (7 enters the input of the input device 3 (matching circuits). The purpose of this pulse is to match the input impedance of the device 3 with the characteristic impedance of the cable from the source 1 of the primary impulses and the output impedance of the latter, and also in changing the front-rise rate and amplitude of synchronization, its pulse, if necessary, and send it from interference.From the output of the matching circuit, the signal i / s is fed to the input of the logical cell OR 5, and from the output of the latter to the inputs of blocks 6 and 7, as in the idle mode case (t / g signal). The shunting signal LJ is supplied from the system 15 of the transmitter and the transmitter to the second input of the logical cell OR 5.

If the control and protection functions of the converter (in terms of outputting the signal for shunting the latter) are combined in the converter control and protection device, input device 3 is connected directly to the input of the logic cell 6 and to the input of the differentiator 7.

FIG. 5-7 shows the circuit diagrams of several possible variants of the circuits of the device 16 for matching the input device 3.

The matching circuit shown in FIG. 5, can be applied when using source 1 of primary pulses, at the output of which narrow unipolar synchronizing pulses take place (a variant of the circuit in Fig. 3), determining moments of the beginning and end of a predetermined conduction interval and supplied via two cables respectively to terminals Bx .1 and Bx.2 matching schemes.

The matching circuit shown in FIG. 6, designed to work with a source of primary pulses, issuing a narrow

opposite polarizing pulses (a positive pulse corresponds to the moment of the beginning of a given conduction interval, and a negative pulse - to the moment of its termination t, or vice versa), fed through a single cable to the clip Bx. matching schemes. The principle of operation of the circuits shown in FIG. 5 and 6 are the same. Through diodes 18 and 19, which prevent the polarization of false polarity signals, the cables from the source of primary pulses are connected to the matching resistors 20 and 21, the resistance of which (taking into account the resistance values of the resistors 22 and 23) is equal to the wave resistance of the cable.

This prevents distortion of the edges of the clock pulses due to reflections in the cables from the source of primary pulses whose length

at large converter stations it can reach several hundred meters. The synchronizing pulse through the diode 18 (19) and the resistor 22 (23) with a certain short time constant charges

capacitor 24 (25). The constant charge time is chosen such that the duration of the charge of the capacitor is less than the duration of the front of the synchronizing pulse. When, as a result of the charge, the voltage on the capacitor 24 (25) reaches the switching voltage of the diode thyristor 26 (27), the latter is turned on and the capacitor is discharged through this thyristor to the primary winding

transformer 28 (29). Narrow pulses Uie appear on the secondary winding of the pulse transformer 28 (29), then used to control the generator 17 of the allowed zone signals, the shape of which does not depend on the front duration and amplitude of the synchronizing pulses, which makes it possible for the logic circuit to work with any sources of primary pulses , different in a form and amplitude of output impulses. It is only necessary that the amplitude of the synchronizing pulses exceed the switching voltage of diode thyristors 26 and 27. The interference pulses, whose amplitude when charging capacitors 24 and 25 are lower than the switching voltage of diode thyristors 26 and 27, will not pass through the device 16 to the inputs of the signal generator 17 allowed zones, i.e., the proposed matching schemes have increased noise immunity.

FIG. 7 shows a circuit diagram of a possible embodiment of an input device 3 carrying

at the same time, the function of matching and shaping the signal of the allowed zone and intended for use with the source 1 of the primary pulses, issuing wide clock pulses.

Typically, a wide clock pulse at the output of source 1 of primary pulses is a combination of a powerful narrow pulse with a steep front loaded on a matched cable load, and a wide pulse with a lower amplitude and less steep fronts loaded on a higher load resistance. The resistor 20 and the capacitor 24 (Fig. 7) form an interference suppressor integrating the string with a small time constant. The voltage to stabilize the diode 18 is higher than the amplitude of the wide pulse, but lower than the amplitude of the narrow pulse at the front of the latter. The stabilization voltage of diode 19 is 10–20% of the amplitude of the wide pulse. The resistances of the resistors 20 and 21 are equal to the wavelength of the soprotilenien cable and are matched with the latter. At the beginning of the synchronizing pulse, this matching is performed by resistor 20, and when voltage is reached to stabilize diode 19, by resistor 21. Diode 19 provides additional protection from interference, not passing to resistor 22 interference pulses that do not reach 10-20% of amplitude momentum. The resistance of the resistor 22 is chosen equal to the output impedance of the generator of wide pulses in the source 1 of the primary pulses. Thus, the considered version of the input device provides matching of the input device with the cable impedance from the source of primary pulses, with the output impedance of the latter, as well as protection from interference. In a known imimage control device, a waiting multivibrator is used to obtain a signal whose duration characterizes the duration of the conduction interval of the valve 4 (allowed zone). The duration of the signal of the allowed zone is constant, it is determined by the parameters of the standby multivibrator circuit and does not depend on the operation of the automatic control system of the converter. However, in real converter circuits, the change in the converter control angle is due to the action of the automatic control system and protection of the converter (transfer of the rectifier to the inverter mode, transfer of the inverter to the rectifier mode, action of the current regulators, ARF converter, lock-in of the converter, etc.), accompanied by a change in the duration of the valve conduction intervals. In order to take into account changes in the durations of the conduction intervals due to the action of the automatic control system and protection of the converter, new schematic diagrams of two variants of the generators 17 of the allowed zone signals, shown in FIG. 8 and 9 and intended for operation in the block diagram of the input device 3 shown in FIG. 3. The allowed zone generator, whose circuit is shown in FIG. 8, consists of a trigger on transistors 30, 31, an emitter follower on transistor 32, and a standby multivibrator on transistors 33, 34, 35, the output pulse of which overlaps in duration the limits of change in the duration of the conduction intervals of the valve 4 when the control angles change in the full allowable range (on the order of 180-190 e. degrees). A narrow pulse A is fed to the first input of the trigger from the matching circuit (Fig. 3), which determines the beginning of the conduction interval of the valve (angle of adjustment). At the same time, the narrow pulse A triggers a waiting multivibrator. At the output of the trigger, and hence of the emitter follower (resistor 36), a signal of the allowed zone appears in the form of a wide pulse. The trigger returns to its original state (which corresponds to the end of the signal of the allowed zone) either by the impulse B from the compacted circuit applied to the second input of the trigger and determining the moment of the end of the conduction interval, or if for some reason the impulse is absent (for example, in case of ), - the pulse received after differentiation of the output pulse of the multivibrator and corresponding to its falling edge. The last pulse is also sent to the second trigger input. As a result, the duration of the allowed zone signals at the trigger output correspond to the valve conduction interval durations when the converter control angles are measured and the trigger returns to the initial ready state in all cases, including the absence of a narrow pulse B from the source of primary pulses. In the generator circuit 17 of the signals of the cervical zone shown in FIG. 9, a standby mu switch is also used on transistors 33, 34, 35, the duration of the output pulse of which overlaps the possible limits of changing the duration of the conduction intervals of the ventilators by varying the control angles in the full allowable range. When the waiting mu, the vibrator is started, the signal A from the matching circuit at the output of the multivibrator is the signal of the allowed zone. In parallel, the time of the driving multivibrator 25 supplying capacitor 25 is switched on. When a narrow pulse B is applied to the control electrode of this thyristor B, the driving capacitor 25 is discharged through the thyristor 26 from the matching circuit, and the allowed zone signal stops. If for any reason the impulse B does not come from the matching circuit (

For example, in the case of a lock-up converter), the waiting multivibrator returns to the outgoing readiness state over time, its time determined by the master circuit. In the standby multivibrator circuits, emitter repeaters on transistors 34 have been introduced, which significantly shorten the transition time of the standby multivibrator to the initial state, which ensures its readiness for operation at the beginning of the next period.

The converter 13 of the light signals serves to convert light pulses from the sensor 11 of the junction voltage on the VTB through zero from negative to positive values (DPN) into electrical signals of standard shape with a steep front.

FIG. 10 shows one of the possible circuit diagrams of the receiver-converter 13. A phototransistor 37 is used to convert the light signals into electrical ones; output multivibrator uncritical. It is only necessary that the multivibrator can operate normally with a miniltal interval between two successive pulses of no more than a duration of the electrical control impulse on the thyristors of valve 4 in order to avoid misses of unlocking this valve. As the Converter 13 can also be used a blocking generator on the phototransistor.

In the proposed logic block 2, a blocking geerator is used as an output stage, which enables the start of any light source that controls the valve 4 (flash lamp, lumiophore source of CRPTH, semiconductor laser, radio device, etc.).

FIG. II and 12 show the principle electrical diagrams of possible variants of the block 2 logic circuits. Both schemes correspond to the block diagram shown in FIG. I, and consist of the input device 3, the converter 13 of the light strings (Fig. 10), the logical cell AND b, the first differentiating device 14, the second differentiating device 7, the logical cells OR 5, 8 and the amplifier of the driver 9 electric control pulses, representing a blocking generator.

A block of logic circuits, the circuit diagram of which is shown in FIG. 11, is intended for operation with a source of 1 primary pulses, issuing narrow synchronized pulses

12

over one cable. Input device 3

this block of logic corresponds to

The block diagram shown in FIG. 3 and

includes matching circuit (FIG. 8)

and generator 17 signals of the allowed area

(Fig. 8).

A block of logic circuits, the basic circuit of which is shown in FIG. 12, is designed to work with an overlapping control and protection device for the converter, which produces wide clock pulses and, if necessary, long-lasting signals and converter bypass. Input device 3 of this

The block of logic circuits consists of the matching circuit as shown in FIG. 7

The proposed block of logic circuits of races does not lie on the high potential, but on the potential of the earth, that o6vTer4aeT it

connection with a source of primary (synchronizing) pulses, simplifies the power supply circuit and significantly increases its immunity to strong electromagnetic electrostatic fields arising

At work powerful high-voltage converter. Such a block of logic circuits is able to work with any source of primary pulses, regardless of the form of impulses issued to them.

In the operation of the proposed logic block, changes in the durations of the conduction intervals of the valve are taken into account for any changes in the control angle and, in any conditions, the circuit is returned to its initial state of readiness. The block is able to work on any light source, radio device, etc., control, ee the valve. It ensures that the valve operates in a shunt valve mode upv to control narrow pulses.

Claims (8)

Invention Formula I. Block of logic circuits of the device for pulse control of high-voltage A V-phase-cascade-bridge converter equipped with a protection system using narrow control pulses applied to the valve at the time of the initiation of the conduction cycle and at each subsequent time the voltage across the valve goes from negative to positive during this time. and the conduction band, the contained receiver-signal converter, transmitted from the potential of the valve, an input device connected to the source of primary pulses, logic cells AND and OR, a differentiating device connected between them, and an amplifier-driver of electrical control pulses, characterized in that, in order to increase the reliability of the converter in operation and its noise immunity, enabling operation of the converter operating valve in the mode 13 shunt and taking into account the change in the duration of the valve conduction intervals in the operation process, it is provided with an additional logical cell OR, the first input of which is connected to the output of the input device, the second input - with the converter protection system, and the output through the additional differentiating device-with the second input of the main logical cell OR. 2. The unit according to claim 1, characterized in that, in order to enable UOCTI1 to be installed on ground potential II to improve noise immunity, a conventional converter of signals transmitted from the potential of the valve is made on a photo-resistor connected in the emitter follower circuit and a retarded multivibrator, moreover, the output of the emitter follower is connected to the input of the retarded multivibrator, and the output of the latter is connected to the first input of the logical cell I. 3. The unit according to claim 1, characterized in that, in order to enable it to work on any source of light control pulses, the amplifier-driver of electrical control pulses is made in the form of a blocking generator on a high-frequency transistor. 4. Block on PP. 1-3, characterized in that the input device contains a generator of signals of a permitted zone of adjustable duration, both of which are connected to the outputs of the source of primary pulses through a matching device. 5. The unit according to claim 4, characterized in that, in order to ensure its reliable and stable operation in various forms and parameters of narrow clock pulses from the source of primary pulses, at the input of a matching device connected to the output of the source of primary pulses the diode, the resistor and the capacitor, in parallel to which the primary winding of the pulse transformer is connected through an uncontrolled switching diode, the secondary winding of the co This is connected to one of the inputs of the signal generator of the allowed zone. 6. Block on Mon. 4 and 5, that is, with the fact that the allowed zone signal generator is designed as a trigger with separate inputs and a waiting multivibrator with a built-in emitter follower, connected to one of the inputs of the specified trigger, and the output through the differentiating chain is with its second input, and the second emitter follower is connected to the trigger output, the output of which is the output of the allowed zone signal generator. 7. Block on PP. 4 and 5, so that the allowed zone signal generator is designed as a standby multivibrator with a built-in emitter follower, the output of which is the output generator of the allowed zone, parallel to the time of the setting capacitor of the waiting multivibrator, the thyristor is turned on; moreover, the control electrode portion is the cathode of the indicated thyristor and the multivibrator input form the inputs of the allowed zone signal generator. 8. Block on PP. 1-3, that is, so that, in order to ensure its development, stable operation with different forms and parameters of wide synchronizing pulses from the source of primary pulses, the duration of which is equal to the duration of the valve conduction interval, The input device contains an interference-suppressing integrating RC-chain, parallel to the capacitor of which are connected two circuits of limiting the clock pulse to the maximum and to the minimum, each of which is a series-connected Zener diode and a resistor, the input of the integrating chain being the input of the input device and connected to the output of the source the primary pulses, and the output of the input device connected to the first input of the additional logical cell OR, are the terminals of the clock pulse limiting circuit resistor on a miniMVMV. FIG g JT-rpiX IB Ih y " (Woo, .. , fix / : r: i ..., .. 4 ... ,, .. j .. H h-- - -: Out ) Bhix i IS years IB | f -CD-R- 1-7 / 1-1-L  V 2J27 -t4-4 c5-i-1 Th Out I 2S-r- 2, A vshg 29 Bx am 11 WH - (6 Bbix. . p. ini Fig.8 four SXt SH tSxZ L1 I I I 1 i 1I 115 I and IZ