SU575781A1 - Device for statistic channeling of timedivision multiplex system - Google Patents

Description

one

The invention relates to communication technology and can be used in the construction of satellite communication systems.

There is a known statistical compaction system of a channel time division system j containing an analog-digital converter, an analysis unit, and a sequential connected 1: 1 switching unit and a switching unit, the outputs of which are connected to the corresponding inputs of the common parallel-to-serial code converter, in an identical channel.

However, in the known device, some of the information of the additional channels disappears due to the absence of pauses in the main channels.

The purpose of the invention is to increase the number of sealed channels.

For this purpose, a temporary separation of channels, containing in each identical channel an analog-to-digital converter, an analysis unit, as well as serially connected memory block and switching unit, are connected to the device of statistical compaction of system 1, the inputs of which are connected to the corresponding inputs of a common parallel to serial stake converter; common controlled valve, in each channel of the output of the analog-digital converter are connected to the inputs of the memory block through the analysis unit, additional The outputs of which through a common controlled distributor are connected to the corresponding control 1 inputs of the switching unit.

The drawing shows a structural electrical circuit of the proposed device.

Claims (1)

The device for statistical control of the system with time division of channels contains in each identical channel an analog-digital converter 1, an analysis unit 2, as well as serially connected memory block 3 and a switching unit 4, whose terminals are connected to the corresponding inputs of a common parallel-to-code converter 5, common control valve 6, in each channel the outputs of the analog-digital device 1 are connected to the inputs of the memory block 3 through the analysis block 2, the additional outputs are Then, through a common controlled distributor 6, they are connected to the corresponding control inputs of the switching unit 4. The device operates as follows. An analog signal from a source of information is fed to the input of analog digital converters 1, the outputs of the bit circuits of which are connected to the inputs of analysis blocks 2, which determine our own at least one random pulse during time T, from the output of the analysis block 2 the signal enters the block memory 3, with the help of which the signal is delayed by time T. The signal about the presence of pulses in the discharge circuit during time T from the second output of the analysis unit 2 enters the input of the controlled distributor b, which sequentially opens the block to switch 4. First, switch blocks open in the first bit circuits (higher in weight then switch blocks 4 in the second bit circuit, etc. If from analysis block 2 to the input of the controlled distributor 6 a signal is received that there are no pulses in the circuit of this bit in time T, then the controlled distributor 6 will not open the switching unit 4 of this bit and instead open the next switching unit 4. Thus, a sequential readout of the signal is ensured by means of the controlled distributor and switching units Only those units with the memory 3, in which for the time analysis unit 2 recorded by the presence of at least one discharge pulse. The operation cycle of the controlled distribution is designed for transmission over the communication line of only a part of the signals of the low-voltage circuits. In the absence of an analog signal at the input of any of the analog-to-digital converters, the bit signals of the remaining two analog-digital converters are transmitted to the communication line completely. If there is a maximum analog signal on all three alo-digital converters, the signals of the first and second discharge circuits of all three analog-digital converters and the signals of the third discharge circuit of the first and second analog-digital converters are transmitted to the communication line. The signals from the outputs of the switching unit 4 are fed to a parallel code to serial converter 5, which combines all the signals of the bit circuits into a single signal. The output signal of the parallel-to-serial converter is combined with the control signal from the control valve 6 and carrying information about the bit circuits, which currently have no discharge pulses. The invention The device is a statistical multiplexing system with time division channels, containing in each identical channel an analog-to-digital converter, an analysis unit, as well as serially connected memory block and a switching unit, the outputs of which are connected to the corresponding inputs of a common parallel-to-code converter, that, in order to increase the number of sealed channels, a common controllable valve was introduced, with the outputs of an analog-to-digital converter in each channel The user is connected to the inputs of the memory block through the analysis unit, the additional outputs of which are connected to the corresponding controlled inputs of the switching unit through a common controllable distributor1: {ii.