SU558362A1 - Direct-coupled frequency converter - Google Patents

Description

FIG. 1 shows the basic electrical circuit of the proposed device; in fig. 2 shows time diagrams (a, b, c) of switching on the valves, the output voltage and the current flowing through the valves at the output voltage frequency well below the frequency of the power source; in fig. 3 - the same, with the frequency of the output voltage, exceeding the frequency of the power source. The proposed converter can be designed to operate from a single-phase and multi-phase voltage source with a single-phase or multi-phase output. Consider for example a converter with a three-phase input and a single-phase output, the circuit diagram of which is shown in FIG. 1. The device contains input chokes 1, the number of which is equal to the number of phases of the power source, a block of controlled transducer valves 2, a switching nonlinear choke 3, a capacitor 4, in parallel to the terminals of which an active-inductive load is connected, for example, the motor phase, represented in series Drossel 5 and resistor 6. As controlled valves in the converter, triacs 7-12 or anti-parallel thyristors can be used, in the latter case their number should be l is twice as large. During operation of the converter, the valves are switched on in pairs on a linear voltage, the instantaneous value of which is higher than the voltage on the capacitor; charge it up to a voltage that exceeds the voltage by the end of the charge; recuperating part of the stored energy back to the power supply by turning on the same (symmetric) valves, but in the opposite direction (or counter-connected thyristors). Due to this, the voltage on the capacitor is modulated according to any law, including a sine wave, and the output voltage is regulated at frequencies below the frequency of the power source. If the ratio of reactances (at the frequency of the power supply) of capacitor 4 connected at output X to resistance XL chokes 1 connected at the input is equal to or greater than the square of the equivalent number of phases of the supply voltage, this period of natural oscillations L - C of the circuit formed by the input droplets and output capacitor, above the inter-switching interval of 4 converters. T 2, j. tk - kt w ™ where T is the period of the supply voltage, whose angular frequency is C1), am is the equivalent number of phases of the supply voltage, equal to the number of commutations of the converter during the period when operating in the rectifying mode. Otherwise they say or T „. Since .J, then from (3) and (4) it is easy to go to (1). Therefore, if the switching on of a pair of valves occurs at the moment of natural switching in the rectifying mode, then by the next natural switching time in an interval of 4, all the gates will turn off, and the instantaneous voltage on the capacitor 4 is lower than the instantaneous value of the linear voltage on which should turn on the next pair of valves. For example, consider the operation of the converter at the frequency of the output voltage. much lower frequency power supply. To illustrate this mode in FIG. 2 shows the following timing diagrams: a) switching on controlled valves; the number in parentheses indicates the direction of conduction of the valves (1) from the source to the load, and (2) from the load to the source; b) the voltage across the capacitor t / ck (indicated by a bold line) and the instantaneous values of the linear voltages UAB, Use, CA (shown by a thin line) and phase voltages of the source AT, c, c (dashed). c) valve currents: when consumed from the source of gV, recovery (inverted to the source) -i (the latter are shown darkened); load current at converter output - IH. Turning on the valves 7 (1) (in the direction from the source to the load) and 10 (2) (from the load to the source) at the moment taken for 0 leads to an increase in the voltage on the capacitor (curve t / ck) and the current consumption from source until the tension claim. will not exceed the voltage of the power source; the current through the veetili then drops to zero and the valves are closed. For a partial discharge of the capacitor (when modulating the output voltage), immediately or with a small pause, the same valves are turned on, but on the opposite direction of the current: 7 (2) and 10 (1) and the capacitor is quickly discharged to a voltage below the instantaneous value the source voltage, until the current flowing through the valves 7 (2) and 10 (1) drops to zero and they do not turn off. After this, valves 7 (1) and

12 (2) for charging the capacitor, and after turning them off - valves 7 (2) and 12 (1) -dl discharge. Next, valves 9 and 12 will turn on; 9 and 8; 8 and 11; 10 and 11 and, finally, again 7 and 10, etc.

If on, for example, valves 9 (1) and 12 (2). the signal about the need to change the polarity was received, it is delayed by a constant delay time At, after which the previous one is connected according to the pair numbers of the valves 7 (2) and 12 (1) (to realize the recovery mode of the epeogiya stored in the capacitor to the source, to the line voltage UAC) - Valves 7 (2) and 12 (1) are turned off after the instantaneous voltage on the capacitor changes sign and by absolute value exceeds the instantaneous value of the linear voltage. Due to the load current, the direction of which has not yet changed, the capacitor 4 continues to charge, and the voltage on it will rise until none of the pairs of valves 7-12 is turned on. To limit the voltage on the capacitor and form a smooth component of the output voltage of the converter or the load current, the energy stored in the capacitor 4 on the UAC is re-recovered by turning on the valves 7 (P and 12 (2).) of the output voltage, this current direction will be the recovery current (1), and the counter current will be the consumption current. Therefore, both current pulses and when the valves 7 (2) and 12 (1) and 7 (1) and 12 are turned on (2 are current pulses recovery and blackened. After shutdown valves 7 (1) and 12 (2) to accelerate the charge of the capacitor can be re-enabled the same valves 7 (2) and 12 (2). but in the opposite direction, to recover energy to the source. Then HAPPENS to the current loads and changing its direction, valves 9 (2) and 12 (I) are turned on to charge the capacitor, and then valves 8 (1) and 12 (2) according to the diagram.

By varying the ratio between the energy consumed and the energy recovered by the capacitor, the average value of the voltage over the half period is regulated. As the output frequency of the converter grows, you must increase the voltage. At frequencies exceeding the frequency of the supply voltage, the capacitor can be simultaneously connected to a power source for charging with three valves. The valves conducting the current in one direction are separated by input chokes 1, and one of them is turned off first, and then, after charging the capacitor before a voltage higher than the amplitude of the line voltage, the other two turn off.

To illustrate this mode in FIG. Figure 3 shows time diagrams (the same as in Fig. 2) for an output voltage frequency that is more than two times higher than the supply voltage frequency. FIG. 3 shows the inclusion of valves

7 (1), 10 (2) and 11 (1). After some time, the valve 11 (1) is turned off, and several

others later: 7 (1) and 10 (2). If the reduction of voltage due to partial energy recovery is not required, then during one time Lgp no valve is turned on, and the load is supplied from the capacitor due to the energy stored in it. As time passes, the valves are turned on.

8 (1), 9 (2), 11 (2) to the linear voltage, the instantaneous value of which is maximal, and the capacitor is recharged.

The limiting frequency of the converter inverter will be such that it decreases to zero, and in - the conduction time

the valve will be equal to the half-period of the output frequency, i.e. / pi (max) 1/2-time / v is equal to the half-period frequency f, the L-C oscillations of the circuit with the load, and fun is always slightly higher than the frequency (IC.

The value "k" is determined by the inductance of the chokes and the capacitance of the capacitor in accordance with expressions (1) and (4).

When performing a converter according to the present invention with a multi-phase output, the number of capacitors is equal to the number of phases at the output. In this case, in relation to (1), the total reactance of the output capacitors is involved. So,

9

with three-phase output Xc, where X, -

ABOUT

capacitive impedance of each of the capacitors included on the output.

Testing of this converter when powered from a source with a constant action

voltage value and constant frequency f showed the possibility of adjusting the output frequency in the range from 0.005 / to (2.8-3.3) / and the effective value of the output voltage from (0.07-0.1) U at frequencies ( 0.005-0.5) / and up to (1.8-2.5) U at frequencies close to the upper limit.

Claims (2)

1. Patent Czechoslovakia No. 136331, cl. 12/03 (H 02d, ord. 1971). 2. Grabovetsky G.V. et al. "Development and research of a frequency converter to regulate the speed of a short-circuited asynchronous motor. Report at the scientific and technical conference "The state and prospects for the development of production and the introduction of power semiconductor valves and converters on their basis, VNIIEI, Moscow, 1966. : I rwn VJnJ 1 (2} 7 (2} 1Sh} 2fz I iztz) Sh / gL Shi ,, Sh ,, W1 ;; 7 //; Sh W) GSH  Ji2n 131211 I case I / ch I / g / 7 l 1 / g // l I gffl I igffl I F