SU530281A1

SU530281A1 - Circuit integrity device

Info

Publication number: SU530281A1
Application number: SU1878417A
Authority: SU
Inventors: Петр Вениаминович Офин; Александр Иванович Прошин
Original assignee: Предприятие П/Я А-7779
Priority date: 1973-02-02
Filing date: 1973-02-02
Publication date: 1976-09-30

Description

1one

Изобретение относитс к области электротехники , а именно к устройствам дл автоматической проверки целостности электрических цепей, например соединительных проводов многожильного кабел .The invention relates to the field of electrical engineering, in particular, to devices for automatically checking the integrity of electrical circuits, such as connecting wires of a multicore cable.

Известны устройства дл проверки целостности цепей, содержащие элементы, обеспечивающие последовательный опрос контролируемых цепей с индикацией состо ни контролируемой цепи. Такие устройства сложны и не обеспечивают быстрого контрол состо ни цепей.Devices for checking the integrity of the circuits are known, comprising elements that provide a sequential polling of the monitored circuits with an indication of the state of the monitored circuit. Such devices are complex and do not provide fast monitoring of the state of the circuits.

Также известны устройства, содержащие схему опроса и индикаторы состо ни контролируемой цепи, обеспечивающие автоматическую проверку состо ни цепей с индикацией неисправной цепи. Однако такие устройства имеют низкое быстродействие.Devices are also known that contain a polling circuit and monitored circuit status indicators that provide automatic verification of the condition of circuits with indication of a faulty circuit. However, such devices have low speed.

Целью изобретени вл етс повыщение быстродействи устройства. Поставленна цель достигаетс введением схемы ИЛИ.триггера управлени схемой опроса, ключей индикаторов и схем И, число которых равно числу кoнтpoлиpye a)IX цепей, подключенных своими первыми входами к провер емым це- The aim of the invention is to increase the speed of the device. The goal is achieved by introducing the polling circuit OR.trigger control scheme, indicator keys and AND schemes, the number of which is equal to the number of control a) IX circuits connected by their first inputs to the test

п м, вторыми входами - к выходам опроса, а выходами - к управл ющим входам ключей и входам схемы ИЛИ, соединенной выходом с одним из входов триггера.p m, the second inputs - to the polling outputs, and the outputs - to the control inputs of the keys and the inputs of the OR circuit, connected by an output to one of the trigger inputs.

Такое выполнение устройства дл проверки замкнутости цепей позвол ет упростить и ускорить процесс проверки состо ни контролируемых цепей.Such an embodiment of the device for checking the closure of the circuits makes it possible to simplify and speed up the process of checking the state of the monitored circuits.

На чертеже приведена структурна схема предложенного устройства.The drawing shows a block diagram of the proposed device.

Устройство содержит разъемы 1 и 2, жгут проводов 3, схеь4ы И 4-7, наборное поле 8, дешифратор 9 и счетчик импульсов 10, образующие распределитель импульсов опросной схемы, щуп 11, привод 12 исследуемой цепи, триггер 13 управлени опросной схемой, схему И 14, генератор импульсов 15, схему ИЛИ 16, ключи 17-20 индикаторов , источник 21 питани индикаторов, цифровые индикаторы 22 и 23, схемы И 24 и 25, инверторы 26, 27 и схему ИЛИ 28.The device contains connectors 1 and 2, wiring harness 3, scheme 4-7, dial pad 8, decoder 9 and pulse counter 10 forming the pulse distributor of the interrogation circuit, probe 11, actuator 12 of the circuit under study, trigger 13 14, pulse generator 15, circuit OR 16, keys 17-20 of indicators, indicator power supply 21, digital indicators 22 and 23, circuits AND 24 and 25, inverters 26, 27 and circuit OR 28.

Устройство работает следующим образом.The device works as follows.

Claims

To test the closure of any circuit, the probe 11, for example, is connected to the wire 12, which ensures that the test voltage Ч f is supplied to the circuit under test. If the circuit is closed, the voltage will enter the input of the AND 7 circuit through the dial field 8 and will provide preparation of the scheme And 7 for opening. By pressing the Start button, trigger 13 is triggered, from the output of which high potential arrives at circuit 14 and enables the latter to pass pulses from generator 15 to counter 10 input. Triggering counter 1 o ensures unlocking circuit 7 and flashing trigger 13 the initial state, which stops the supply of pulses to the input of the counter 10. A high potential, having passed And 7, opens the key 17, through which the source 21 to the electrodes of the indicators 22 and 23 will be energized, which will ensure the display and the circuit under test when its serviceable state as a digit or symbol. After that, the Reset button records information from pulse counter 1O. In the case of the automatic indication of a loop at the same time, several wires to the inputs of these wires or contacts of connector 2 through the switch Automat supplies voltage + Е. In addition, this voltage is applied to the input of the inverter 26, which ensures the locking of the AND 24 circuit and unlocking the AND 25 circuit. When interrogating the wires 3 after pressing the Start button, they are successively displayed from the digit of the indicators 22.23. If there is a break in any circuit at the output of the OR 16 circuit, there will be no high potential, as a result of which the potential will be developed at the output of the inverter 27. Passing the AND 25 circuit (unlocked when the Automatic button is turned on), this signal through the OR 28 circuit will ensure that trigger 13 returns to its initial state and stops the polling circuit. The absence of luminescence of any number on the indicators 22 and 23 indicates the number of the chain in which there is an open circuit. The dial box B, connected between connector 1 and And 4,5,6 and 7 circuits, provides for checking various types of connectors or circuits with different numbering without rearranging the interrogation circuit and display circuit. Apparatus of the device for checking the integrity of the circuits, containing a polling circuit and indicators, characterized in that, in order to increase speed, it is equipped with an OR circuit, a trigger for controlling the polling circuit, And indicator keys and circuits, with the number equal to the number of monitored circuits In this case, the first inputs of the AND circuits are connected to the outputs of the interrogation circuit, the second are intended for connecting monitored circuits, and the outputs are connected to the control inputs of the indicator keys and the inputs of the AND / 1I circuit connected to one of the inputs s trigger.