SU519715A1 - Device for processing expressions of programming languages - Google Patents

Description

5, indicator zero 6, block of stack memory of control characters 7, counter of operands 8, indicator zero 9, block of stack memory of operands 10, first register of operand 11, second register of operand 12, triggers of test 13, 14, arithmetic block 15, the index position counter 16, the array number register 17, the information input 18 and the output 19 of the device, controlling the output 20 and the input 21 of the device. The device works as follows. The addressing of the main memory (not shown in the drawing) is made to mathematical addresses. A mathematical address consists of an array array and an element number in the array. At each time, only 32 arrays are available for direct addressing, which are assigned numbers from 0 to 31. For each array there is a passport containing information about the location of the array, its length, the number of the current element, etc. The functions of storing passports and math to physical address mapping is entrusted to the memory. The elements of the arrays can be operands with a fixed comma (one word) and two handrafts with a floating comma (two words). The type of the element is recorded either in the passport of the array or in the first category of the element itself. The device works with both one-dimensional and multi-dimensional arrays. Multidimensional arrays are normally expanded into one-dimensional. The passport of the multidimensional array contains information on the size of the array for all dimensions. The size of the array for the corresponding dimension is determined by referring to the memory by the array number and the dimension number. The main memory (not shown) contains a high-speed portion of 32 registers in which the most frequently used information is stored. The addressing of the high-speed part is carried out by register numbers. The basis of the language is elementary records. There are eight kinds of elementary records. The view number is recorded in the first three bits of each record. Each view is either an immediate operand, or a control character, or address. The formats of the types of elementary records and their functional purpose are discussed below. Type O - the first three bits contain the code 000, the next 5 bits - the register number code. One of the 32 high-speed part registers of the main memory is addressed. Type I - three bits - code 001, five bits - code number of the array, twenty four bits - code of the element number. Sets the address of the array element. View II - three bits - code 010, thirteen bits - operand. Specifies the immediate operand. Type III - three bits -011, thirteen bits - the number of the element. Appeal to array number 0. The number of the array element is reported. Type IV - three bits-100, five bits - the number of the array. The current array element is addressed. Type V - three bits D-101, five bits - the number of the array. This type is equivalent to a pair of characters ALGOL a: M, i.e. it indicates the number of the array and at the same time serves as the left border of the index expression. Type VI — three bits -110; five bits — register number. This view performs indexing when referring to the array No. 0, i.e., is equivalent to the following sequence of ALGOL characters: M R (M is the identifier of the zero array, is a register). This element is followed by the continuation of the index expression. Type VII - three bits - 1H, five bits - a control character. This view denotes control characters. The basic constructs of the language are arithmetic and logical expressions. Their syntax is similar to the syntax of similar constructions in the ALGOL language, single variables are represented using the types O, 1, III and IV, variables with indices using types VI and V, and signs of the iterations using type VII. Instead of the symbol "the symbol is used". In addition, there is no apparatus for addressing procedures — functions (it can only be replaced to some extent by a return transition operation). The general structure of a program in the formulas language is described as follows: program:: (operator) operator:: arithmetic expression (logical expression) assignment (cycle) operator, operator. The “loop” operator has the following form: do statement is a while boolean expression. The inner statement is executed as long as the condition represented by the logical expression is met. The assignment operator has the same form as the analogous operator in AL GOL e. Conditional transition: if a logical expression, program address. If the logical expression is false, then a transition occurs to the program address (the program address is not a form and is not flagged in any way; it consists of an array number and a byte number). Unconditional transition: go to program address. Migration with return: call program address. This operation remembers the return address and navigates to the program address. The return is caused by the operation ret.

The program reading unit I sequentially reads the program in the language of formulas from the main memory (not shown in the drawing). The next program byte arrives at the output of the program 1 reading unit. The first three bits of the next byte go to the control unit 3 and from them the type of each new elementary record is determined. Depending on the type of elementary recording, the following operations are performed.

If the elementary entry is a direct operand (type II) or an address (types O, I, P1), then it is sent to the address and operand 2 generation unit, where the operands and addresses are converted to the appropriate format (see below).

The generated operand or address is transferred to the second register of operand 12.

In the case of an elementary record of the type IV (access to the current array element), the number of the addressed array is sent to register number of the array 17. Next, the array passport is called for the address of the current array element. The read address along with the array number is sent to the second register of operand 12.

In the case of an elementary record of the type V, the number of the addressed array is sent to the register number of the array 17, and the contents of this register and the index position counter 16 are sent to the stack of control characters 7. Then the stack of memory of control characters from the control block the control symbol and index position counter 16 are reset to zero.

In the case of an elementary record of type VI, the same is performed as in the previous case, but zero is entered in the register number of array 17. After that, the second register of operand 12 from the output of block 2 is entered in the register number specified in the elementary record.

The operand is entered in the second register according to the following rules. If the trigger 13 of the second operand register is set to "O (the second register of operand 12 is free), then the second register of the operand 12 is written. After that, the state of the trigger 14 of the first register of the operand is analyzed. If the trigger is in the state "1 (the first register of operand 11 is occupied), then the trigger 13 of the second register of the operand is set to" 1. If the occupancy trigger 14 of the first register of the operand is in " 0, then the second register of operand 12 is rewritten into the first register of operand 11 and the occupancy trigger 14 of the first operand register is set to " 1.

If the trigger of the second operand register is set to "1", the contents of the first register of operand P are pre-recorded in the stack memory of operands 10 and the contents of the second register of operand 12 are overwritten in the first register of operand P ...

The information in the first and second registers of operands 11 and 12 can be of four types (the type number is written in the two left register bits): the operand with a fixed comma takes half of the register (one machine word); floating point operand, occupies the entire register (two words); the address (number) of the register, the number of the register is recorded in the right five bits of the left half of the register; the address of the array element, which consists of the element number and the array number, the array number is written in the right five bits of the left half of the register; the remaining bits contain the element number.

Logical values are represented using type I true - all ones, alse - all zeros.

The cell length of the stack memory of operands is one soft word (four bytes).

When writing the contents of the first register of operands 11, the stack memory of the operaids 10 in the case of the first, third and fourth types records the contents of only the left half of this register, and in the case of the second type, first the contents of the right and then the left half. Before writing each word, one is added to the counter of operands 8. The entry is made in a cell whose address is contained in this counter.

Similarly, before being written to the stack memory of control characters 7, one is added to the counter of control characters 5.

If the elementary record is a control character (type VII), then the operation of the processor is entirely determined by the read control character and the control character located at that time at the top of the control stack, i.e. in the cell of the control stack memory The symbol 7, whose address is contained in the counter of control characters 5.

Both of the above control characters are fed to the input of the control character analysis block 4. This block is an associative memory in which the language deciphering rules are written. Both control characters are sent to associative memory polling. From the output of the control character analysis block 4, a control code is read, which is fed to the control block 3 and causes a transition to the firmware corresponding to this pair of control characters.

Claims (2)

Processor actions can generally be as follows: perform an operation corresponding to a control character in the control stack vertex, subtract a unit from the counter of control characters 5, and return to phase a alise; enter the read control character into the stack of control characters 7 and continue reading the program. The selection for each pair of control characters of one fault of the two specified options is made in accordance with the priorities of the control characters. For the pair of “a,” in (“a is the control character from the top of the control stack,“ c is read from the program); if priority "a is greater than priority" is equal to or equal to it, then option I is selected; if priority is "higher than priority", then option 2 is selected. For example, in the case of a pair, the first option is chosen, in the case of a pair "(the second option is chosen. Note that some control characters in the character read from the program have one priority and in the position of the symbol from the top of the control stack is another (stack). In some cases, the actions may differ from the above options. For example, if the symbol read from the program is a transition type symbol (go to, call), then appropriate the transition, i.e., the reading unit of program 1, continues further reading of the program, starting with the address reported in the transition operation. In the case of a call operation, the return address from the program reading unit 1 is also recorded in the stack memory of control characters 7 (in sequential cells). When performing the operation ret (return), information from the cells of the managed stack is entered into the reading block of program 1. The arithmetic block 15 is called to perform arithmetic and logical operations. These operations are always performed on the values in the first and second registers of operands 11 and 12, which are used as internal registers of the arithmetic unit 15. For most arithmetic and logical operations (for two-place), both registers must be occupied. Therefore, if the trigger 13 of the second operand register is in "O (the second register of operand 12 is empty), and the occupancy trigger of the first register of the operand is in" 1, then the first register of the operand I1 in the second register of operand 12 is rewritten from the stack memory block of operands 10 to the first register of operand 11 (from the cell whose address is contained in the counter of operands 8) and the occupancy trigger of the second register of the operand is set to "1. At the same time, if the information read from the stack unit of tee operands 10 is of types 1, 3 or 4, then one word is read, which is entered in the left half of the first register of the operand, but if it is related to Twny 2. then the word L is read: . qn-: fuck: anos tc to the left and to the right 1) .1: well, this is the case. After reading each word, one is subtracted from the operand counter 8. If both the occupation triggers 13 and 14 are in " O, then the above operation is repeated two times until the first and second registers of operands 11 and 12 are filled, after which these triggers are set to " 1. If, when performing an arithmetic or logical operation, an address is found in the nerve register of operand II or the second register of operand 12, then the operands in these registers are pre-sampled from the main memory. The address is fed to the information output 19 and the operand read from the main memory is fed to the information input 18. The operation of the main memory and the proposed device is coordinated and produced by the control output 20 and the control input 21 of the device. The result of the operation is placed in the first register of the operand 11. The trigger for the second register of operand 13 is set to “O. The result type coincides with the type of the operands, if one operand is of type 1 and the other type is 2, then the result is of type 2. During the assignment operation, in the first register of operands 11, the address must be found, and in the second register of operands 12, the recorded value. After writing the value at the above address, both values are deleted (the occupancy trigger of the first operand register and the occupancy trigger of the second operand register are set to "O"). The addresses in the registers And and 12 fall either from the program (types O, I, III and IV) or as a result of some computation in the case of an array with an index expression (V & A). In this case, the array number is entered in the register number of the array 17, and in the stack memory block of control characters 7, a symbol indicating the beginning of the index expression. Next, all indices are computed (as usual arithmetic expressions) and the number of the array element is calculated by indices and array sizes by all dimensions, if the array is multidimensional. After calculating each index (the final; and the index calculation is indicated by a pair, "(access to the memory is made (to the array passport), after the size of the array according to the corresponding measurement. To do this, the array number from the register is fed to the memory buses) array 17 and the index position number from the index position index 16. The read value is entered into the second register of operand 12 and further multiply and add are performed. As a result, after processing the last index (the pair “)), in the first register The value of the array is equal to: I /. A / g is the index's t-ro value, Di is the size of the array according to the t-th dimension. This value is the element number of the array. In the corresponding field of the first register of operand 11 and the information in this register is marked as the address of the array element. If, during the calculation of the index, the array is again addressed with an index expression, then the register number of the array 17 and the index of the index positions 16 are written to the stack memory module. These characters are 7. After the processing of the enclosed call is completed, the old contents of this register and counter are restored. In the event that the stack memory of control characters 7 or the stack memory of operands 0 overflows, the corresponding stack is transferred to the main line. The overflow time is set using a signal from the indicator zero 6 or the zero indicator 9. If, when accessing the stack memory of operands 10 or the stack memory; Since the control characters 7 after the operand or the control character are empty (this is also set using a signal from indicator zero 6 or indicator zero 9), then its old contents are copied from the memory into this block. An apparatus for processing expressions of programming languages, comprising a control unit, the control input and the output of which are connected to the device input and output of the same name, an arithmetic unit, the control input of which is connected to the first output of the control unit, the first control output is connected to the first input of the block control, two triggers of occupation, the installation inputs to zero of which are connected to the second control output of the arithmetic unit, the installation inputs to the unit connected to the second output of the unit control, the outputs are connected to the second input of the control unit, the stack unit of operand memory, the control input of which is connected to the third output of the control unit. operand calculator whose counting input is connected to the third output of the control unit, output to the address input of the operand stack memory block, the first operand register, whose input is connected to the information output of the operand stack memory block, with information output of the arithmetic unit, to the device information input , the first control input is connected to the third control output of the arithmetic unit, the second control input is connected to the third output of the control unit, the output of the feature is connected to the third in ode control unit, information output is connected to the information input of the operand stack memory unit, to the information output of the device and the first information input of the arithmetic unit, the second operand register, whose information input is connected to the information output of the first operand register, to the information input of the device, the first control The input is connected to the third control output of the arithmetic unit, the second control input is connected to the third output of the control unit, the output of the connection sign n with the fourth input of the control unit, the information output is connected to the information input of the first register of the operand, the information output of the device and the second information input of the arithmetic unit, the program reading unit, the first information input of which is connected to the information input of the device, the output output is connected to the information output of the device , the information output is connected to the fifth input of the control unit, the control input is connected to the fourth output of the control unit, which is connected with then, in order to simplify the translation of high-level languages and reduce the broadcasting time, an address and operand shaping unit was entered into it, whose information input is connected to the information output of the Miji reading unit, the control input is connected to the fourth output of the control unit, the first information output connected to the second information input of the program reading unit; the second information output is connected to the information input of the second operand register, the stack of control characters, the control the input of which is connected to the fifth output of the control unit, the information input is connected to the information output of the program reading unit, the information output is connected to the third information input of the program reading unit, the control character counter, the counting input of which is connected to the fifth output of the control unit, the output - with the address input of the stack memory of control characters, the first indicator zero, the input of which is connected to the output of the counter of control characters, the output to the sixth input of the control, the analysis analysis control of their characters, the first information input of which is connected to the information output of the program reading unit, the second incbopMauiOHHbui input is connected to the information output of the stack of the CHARACTERS control, the output is connected to SDD1. WE input of the control unit, the second zero indicator, the input connected to the output the operand of the operand, the output is connected to the eighth input of the control unit, the counter eleven index positions, the counting input of which is connected to the third output of the control unit, the information input is connected to the information output of the program reading unit and the information output of the stack of control characters, the output is connected to the information output of the device and to the information input of the stack memory control characters 12 The register of the array number, the input of which is connected to the information output of the program reading unit and to the information output of the stack of control characters, the output is connected to the information output of the device, to the information input of the stack of control characters and to the information input of the first operand register.