SU518011A1 - Device for adaptive reception of signals - Google Patents

Description

(54) DEVICE FOR ADAPTIVE SIGNAL RECEPTION

one

This invention relates to telegraph communication.

A device for adaptive reception of signals is known, comprising an adaptive equalizer in which the output of the transducer is connected to the first input of the harmonic corrector via an intersymbol interference sign detecting node, and a receiver in which the first output of the amplifier-limiter is connected to the input of the lower level register, the second output which is connected to the first input of the decoder and through the delay line to the first inputs of the clock selection node, the deviation sign forming node and the second input of the decks Odera, and the output of the clock selection node is connected to the third input of the decoder and the second input of the deviation sign forming node, as well as a pulse sequence generator connected to the second inputs of the delay line, clock selection node and the second input of the harmonic corrector of the adaptive equalizer to the second input of the detection node the sign of intersymbol interference and the first input of the relativity converter of which is connected to the output of the receiver clock selection node, the outputs of the underreporting node and whose decoder Connect respectively to the third and second inputs of the node detecting the sign mezh2

symbolic interference and converter of relativity adaptive corrector.

However, the known device does not have sufficient noise immunity for the transmission of discrete information.

In order to improve the noise immunity of discrete information transmission in the proposed device, we introduce a reset signal generating node into the adaptive equalizer, the second output of the receiver clock selection node being connected to the third input of the harmonic equalizer of the adaptive equalizer through the generating unit of the reset signal, and the output of the harmonic equalizer to the receiver amplifier limiter , the output of the node forming the sign of the deviation of which is connected to the fourth input of the node detecting the sign of the symbol number .

The drawing shows a block diagram of the described device, comprising an adaptive equalizer 1 and receiver 2. The corrector 1 includes a harmonic equalizer 3, an intersymberal) interferences sign node 4, a relative-to-pin converter 5 and a reset signal generating unit 6. The receiver 2 includes a lower level registration unit 7, a limiter amplifier 8, a pulse sequence generator 9, a delay line 10, a decoder 11. a clock selection unit 12 and a sign generation unit 13

rejection. The output of the converter 5 is connected to the first input of the corrector 3 through node 4. The first output of amplifier 8 is connected to the input of the Ursvp registration unit 7, the second output of which is connected respectively to the first input of decoder 11 and through the delay line 10 to the first inputs of node 12, node 13 and the second input of the decoder I. The output of the node 12 is connected to the third input of the decoder 11, the second input of the node 13, the second input of the node 4 and the first input of the converter 5. The generator 9 is connected to the second inputs of the delay line 10, the node 12 and the second input of the corrector 3. Outputs node 7 decoder 11 are connected respectively to the third and second inputs of the converter unit 4 and 5. The second output node 12 through node 6 is connected to the third input of the equalizer 3. The equalizer output 3 is connected to the input of limiting amplifier 8. The output node 13 is connected to a fourth input node 4.

The proposed device works as follows.

The received signal with a double relative phase modular is fed to the input of a harmonic equalizer 3, made, for example, in the form of an analog delay device (not shown) with taps through

/ -, where B is the modulation rate. In chain B

Each of the taps of the delay line, except for the central one, consists of adjustable amplifiers, the transmission coefficient of which is corrected by node 4 of the intersymbol interference sign detection. Due to the fact that two-fold relative phase modulation is applied in this device and the correction should be made in two planes: in-phase and quadrature, the adjustable amplifiers and adders (not shown) are included in the harmonic equalizer 3. in-phase and quadrature components of the received signal. The inputs of each of the adders receive signals from the outputs of the adjustable amplifiers, respectively, of the in-phase and quadrature components. The signals from the outputs of these adders are combined in a common adder, the output of which is connected to the input of the amplifier-limiter 8, which is part of receiver 2.

Since at the receiver a signal is recorded at one point, to increase the accuracy of registration in the harmonic equalizer 3, the frequency spectrum of the received signal is transferred to a higher frequency region. Simultaneously with the transfer of the spectrum, the creation of the in-phase and quadrature planes is carried out by supplying two phase-shifted harmonic equalizer 3 frequency converters to the PA.

between themselves on the conversion frequencies coming from the oscillator 9. The implementation of the transfer of the frequency spectrum directly in the harmonic equalizer facilitates the construction of the knots of the receiver 2. The frequency of the carrier oscillation at which the signal processing is performed is 9 kHz. In receiver 2, the autocorrelation method is used. In this method, decoder 11 compares the phase of the received signal with the phase of the delayed signal for a time equal to the duration of the linear transmission. The delay of the received signal that has passed 10 through the limiting amplifier 8 is carried out in the delay line 10, in which the divider is used. The setting of the trigger triggers is made depending on the phase of the received parcel. 15 The high-frequency pulse sequence, necessary for triggering the divider, comes from generator 9. The phase information of the received signal is given by a single carrier transition through the time axis in the middle most protected part of the package. To determine the midpoint of sending, receiver 2 requires a clock frequency, synchronous and in phase with the transmitter frequency of the remote station. In reception 2, a method of obtaining a clock frequency with discrete phase-locked loop was applied. The adjustment is made to the significant moments of the signal received by the decoder 11, which consists of two phase detectors with devices for reading information from these detectors. In decoder 11, one carrier transition is selected through the time axis closest to the middle of the parcel. The decoder compares the 5 phase of the received parcel with the phase of the delayed parcel. The decoded information is output to the device.

The clock oscillation required for the operation of the decoder 11 comes from the evil 12 time warping.

If there are intersymbol distortions in the received information, the carrier vector deviates from the nominal value. The deflection mark is registered by the deflection mark forming unit 5-13.

Since the harmonic equalizer 3 is turned on at the input of the receiver 2, the received signal is corrected at the carrier frequency, to control the taps of the harmonic equalizer 3 it is necessary to know the absolute phase of the in-phase and quadrature components of the received signal. Since relative phase modulation is used, knowledge of the manipulation code of the transmitting station is sufficient to generate these signals. The necessary transformation of the output information sequence of receiver 2 is performed by the converter 5 of relativity. The clock oscillation necessary for the operation of the converter 5 of relativity comes from the node 12 for the extraction of the clock.

The converted output information sequence comes from the output.

converter 5 relativity to the input node 4 detecting the sign of intersignal interference.

In node 4, by comparing the absolute value of the phase of the in-phase and quadrature components of the received signal and the sign of the phase deviation from the nominal value arising due to intersymbol interference and generated in node 13, control signals are generated that measure the transmission coefficients of adjustable amplifiers of the harmonic delay line taps corrector 3, and thereby continuously adaptive correction of intersymbol interference in received signals.

The clock oscillation required for the operation of node 4 comes from node 12.

Due to the fact that the adaptive equalizer 1 is located at the input of the receiver 2 and the sync signals are extracted from the received signal, the adaptive equalizer 1 optimizes the synchronization systems of the receiver 2, which in turn improves the working conditions of the equalizer to data channel distortion steady state. When the characteristics of the communication channel change, the adaptive equalizer 1 and the synchronization system of receiver 2, working together, find their new optimal position.

In the event that the fault of the receiver 2 does not occur due to the fault of the corrector for a sufficiently long time, then a signal comes from the output of the reset signal generation unit 6, which resets all harmonic equalizer controls.

When the signal level at the input of the receiver 2 is critically underestimated in the understatement unit 7, the signal is input to the input of node 4 and terminating the adjustment process of the adaptive equalizer 1. This is necessary so that in the absence of the useful signal level the corrector does not change under the influence of noise .

Claims (1)

Invention Formula A device for adaptive reception of signals containing an adaptive equalizer, in which the output of the converter of relativity is connected to the first input of a harmonic corrector via an intersymbol interference sign detection unit, and a receiver in which the first output of the amplifier-limiter is connected to the input of the lower limit amplifier, the second output of which connected respectively to the first input of the decoder and through the delay line to the first inputs of the clock selection node, the deviation sign forming node and the second input of the decoder, and you the stroke of the clock selection node is connected to the third input of the decoder and the second input of the deviation sign forming node, as well as the generator pulse sequences connected to the second inputs of the delay line, the clock selection node and the second harmonic equalizer input of the adaptive equalizer, to the second input of the intersymbol interference sign detection node and the first input of the relativity converter which is connected to the output of the understatement recorder and decoder which are connected respectively to the third and second inputs of the node of the intersymbol interference sign detection and the relativity converter are adaptive A corrector, characterized in that, in order to improve the noise immunity of discrete information transmission, a reset signal generating unit was inserted into the adaptive equalizer, the second output of the receiver clock selection node through the reset signal generating node connected to the third input of the harmonic equalizer of the adaptive equalizer, and the output of the harmonic equalizer connected to the input of the amplifier limiter of the receiver, the output of the node of the formation of the sign of the deviation of which connected to the fourth input of the intersymbol interference sign detection node. R