SU512440A1 - Semiconductor device capacitance meter - Google Patents

Description

the high-pass filter 7 is connected to the inputs of two analog storage devices 8 and 9. The outputs of the storage devices are connected via switch 10 to the second input of differential limiting amplifier 4, the output of the latter is connected to the control input of switch 10. The reference time former 11 is connected to one the input of the coincidence circuit 12, its second input with the output of the differential amplifier-limiter 4, and the output with the input of the counter 13.

Before the start: a measurement on the p-junction of the semiconductor device 1, connected to the negative feedback circuit of the operational amplifier 2, is supplied through the resistor R the bias voltage from the source 3 of the direct voltage reference. This offset determines the mode of operation of the p - «- DC transition under study. The equivalent p- / g-junction of a semiconductor device in the case of supplying a locking voltage to it can be represented by parallel connection of a resistor / arr with a resistance value equal to the inverse resistance of the p- junction and capacitor C with a capacitance value equal to the full capacitance p- -transition.

In steady-state mode, the output of the differential amplifier-limiter 4 removes the voltage U ± Eo, which is fed to the input of the integrator 5 and through the reference capacitor 6 to the input of the operational amplifier 2. The voltage at the output of the operational amplifier 2 varies in time

i

U2 0 - -T EO -, RIC

where and o is the value of the voltage at the output of the source 3 of the reference voltage of the direct current;

arr - the value of the resistance; C is the value of the measured capacity

p-junction;

Co is the value of the capacitor capacitance G.

The mains signal from the output of the onsphragus amplifier 2 is fed to the input of the high-frequency filter 7, the output of which removes 11ap)

f

With

J ,,.

This voltage is applied to the input | 1 analog storage devices 8 and 9.

At the output of the storage device 8

.

a voltage U is formed, and

WITH.

the output of the memory device 9 - input / output 5 + These voltages are supplied to the analog inputs of the switch 10, controlled by pulses from the output of the differential limiting amplifier 4.

From the output, switch 10 is removed at /

us,

This voltage is fed to one input of the differential amplifier-limiter 4, to the other input of which from the output of the integrator 5 passes the voltage

and, E, ± E,, Art and

where m is the time of the integrator 5.

The equation for deriving the oscillation frequency formula can be written, equating to the voltage at the inputs of the differential amplifier-limiter 4.

The frequency of the square-wave limiter generated at the output of the limiting amplifier is determined by

WITH

t

4CoT „

Shaper 11 of the reference time interval forms the reference time interval Go, at which time the coincidence circuit 12 opens and the number 13 is recorded in the counter 13

7V /. T, -. 4So-Guy

This number is unambiguously determined by the value of the measured capacitance of the C p-nexus. The described device can be used to measure capacitors with large values of loss tangent.

FORUMUA AND 3 ABOUT AND

A semiconductor capacitance meter, containing a bias voltage source, a resistor connected in series with the device under test, a switch and a capacitor, characterized in that, in order to improve measurement accuracy, it contains an operational amplifier, a high-frequency filter, analog memory devices, a differential limiting amplifier , integrator, time shaper, coincidence circuit, counter, p) 11Which clamps for connecting to a host, are included in the feedback circuit and an operational amplifier whose input is connected via a resistor with a bias voltage source and through a capacitor with an output of a differential amplifier limiting device, an integrator input and a switching input of the switch, and the output is connected to the input of a high-frequency filter, to the output of which analog inputs of memory devices are connected, the outputs of which are connected to the inputs of the switch, the output of which is connected to the first input of the differential amplifier-limiter, the second input of which is connected to the output of the integrator, with In this case, one input of the coincidence circuit is connected to the time inter forge driver, the second input is connected to the integrator input, and the output is connected to a counter.