SU474114A1 - Wiring speed device - Google Patents

Description

one

The invention relates to the field of measuring telegraph technology.

A device for determining the telegraphic counting rate from a number of speeds is known, in which the input and information sequence is via a key, the synchronization node with the first clock frequency n the initial start node is simultaneously fed to the installation input of the second clock frequency counter, the decoder code input, corresponding) inputs the gate signal node of the characteristic points of recovery and the OLros node, and the second clock frequency is fed through the initial start node to the counter clock input second clock part ota and simultaneously to the polling input of the decoder, the outputs of which through other inputs of the gating node of the zone of characteristic recovery moments, other inputs of the polling node, counters of elementary parcels and the OR circuit are connected to the second input of the key.

However, the known device is designed to receive an information sequence containing distortions of the type of dominance. When crushed, there are parcels of any duration, including shorter than the elementary. Depending on the duration and intensity of crushing, the time for determining (searching) the speed or

it may be found erroneously, since the meter's device is configured to send a minimum duration.

In order to increase the reliability in the proposed device, the outputs of the decoder are connected to the inputs of the gating node of the fragmentation zone signals of the additional introduction of the fragmentation protection unit,

in which the output of the node of the gating signals of the crushing zone through a key connected, in turn, with the corresponding inputs of the interrogation node is connected to the input of the counter, and the output of the counter is connected to the circuit

setting the device to its original state via the second key, to the other input of which the second clock frequency is applied.

FIG. 1 shows a functional diagram of the proposed device; in fig. 2-time diagram.

The proposed device for determining the speed of wiring can reveal one speed from a range of 5 52, ..., 5 ". As an example, consider the work at

You are making the speed of wiring from a range of 50, 75, 100, 200 baud).

Assume that a zone of characteristic moments of the recovery of HMV is admissible.

After the installation of the proposed device to its initial state (the setup chain in Fig. 1 is not shown), the input information sequence (Fig. 2a) starts to send to the node 2 the synchronization of the first clock frequency through the public key 1, where the signals of the HMV signals are generated (Fig. 2 , d), tied to the clock frequency f (Fig. 2, c).

The characteristic moment of recovery (HMV), corresponding to the beginning of the first parcel, triggers trigger 3 of initial start node 4 (Fig. 2, d), resets the second clock frequency counter 5, triggers 6–9 of node 10 of GVM zone gating and through the “OR 11 triggers 12 knots 13 splitting zone gating signals.

As a result, the clock frequency (Fig. 2, b) through the circuit “AND 14, starts to arrive at the counter 5 and at the poll of the decoder 15 (the clock frequencies / 1 and / 2 are shifted by 1/2 period). The outputs of the decoder 15 through the other inputs of the node 10 of strobe sigpal of HMV ash, the control inputs of the keys 16-19 of the polling node 20, the counters 21-24 of the elec-plating sendings and the OR 25 circuit are connected to the second input of the key 1. From the decoder 15, pulses arrive (Fig. 2, e), corresponding to; Pachalu and the end of the allowable zone of displacement of HMV for elementary speed packages of 50, 75, 100, 200 baud.

The first impulse through the circuit "OR 26 resets trigger 12 and triggers trigger 6 (Fig. 2, g), which produces a strobe sigal 26 in width (24%) of the duration of an elementary 200 baud rate signal input and control key input 16 The second pulse from the deflector 15 resets the trigger 6 and, through the “P4LI 11” circuit, triggers trigger 12 (Fig. 2, L), which produces a strobe signal for the crushing zone.

The impulse from the decoder 15, corresponding to the beginning of the allowable displacement zone of HMV for an elementary parcel at a speed of 100 baud, through the P1LI 26 circuit resets trigger 12 and triggers trigger 7 (FIG. 2, h), the gating potential of which is received by control input of key 17.

The HMV signal of the first parcel from the synchronization node 2 polls the keys 16-19 and 27. The duration of the first parcel is approximately 10% shorter than the duration of the elementary parcel for a speed of 100 baud (Fig. 2a), therefore the HMV end of the first parcel falls into the allowable the offset zone HMV and through the key 17 enters the counter input 22 of the elementary parcels (fig. 2, m).

At the same time, trigger 12 is triggered, and triggers 6-9 and counter 5 are reset.

The end of the transmission is at the same time the beginning of the second transmission. Therefore, the clock pulses continue to flow on counter 5. Similarly,

The second parcel produces strobe signals from the HVM donable zone and fragmentation zones for elementary parcels of speeds of 200, 100, 75 and 50 baud. At the same time, triggers 6–9 are sequentially triggered, and in the intervals between them, trigger 12 (Fig. 2, WL).

The second parcel is an example of 93% of the duration of an elementary parcel of a 50 baud rate, but this means that the HMS corresponding to the end of the second parcel falls into the allowable HMV zone for 50 baud and through the public key 19 enters 24 elementary parcels (fitting 2, n ). One time, trigger 12 is activated at the same time, and triggers 6-9 and counter 5 are reset. The third and fourth parcels are narrow (d. Splits) and do not correspond to any elementary order from the analyzed p 0. yes speeds

The parcel is about 25% shorter than the elementary parcel of 100 baud and about 50% longer than the elementary parcel of 200 baud, so the third, fourth and fifth HMV signals go to the crushing zone and through the public key 27 arrive at the crushing counter 28 ( Fig. 2, o). At the same time, the counter 5 returns to the initial state and the state of the triggers 6-9, 12 is confirmed.

The sixth parcel is approximately 10% longer than the elementary parcel for a rate of 100 baud, therefore, the 3 process of its analysis produces the same signals as in the 5th analysis of the first parcel.

The seventh parcel is analyzed in the same way as the second.

However, it is approximately 25% longer than 50 bauds and does not end within the allowable zone for 75 bauds. Therefore, the pulse of the end of the allowable displacement zone HMV for 50 baud from the decoder 15 (Fig. 2, p), the counter 5 and the trigger 3 are reset to their original state, which prevents the counter from completing the counter and eliminates false counts in the case of receiving parcels longer than the allowed elementary parcels minimum speed of 50 baud.

By the same algorithm, all the parcels of the information sequence are processed.

Suppose that the signal for the end of the th message is counted by the counter 22, and the true value of L is reached. In this case, a 100 baud detection signal is generated (Fig. 2, p), the indicator light 29 is turned on, and the potential from counter 0 through the OR 25 circuit closes key 1, disconnecting the information sequence receiving circuit.

The HMV signals that fall into the fragmentation zone are counted by a counter 28. When 5 the threshold value M of the counter is reached

the indicator lamp 30 is turned on, and the potential from counter 28 opens key 31. As a result, the clock frequency pulse through key 31 returns the counter 21-24, 28 and trigger 12 to the idle state, the speed search is resumed, the lamp 30 goes out in case of speed detection transfer.

The device for determining the speed can operate both autonomously and as part of a complex, which, by a speed detection signal, switches to receiving and processing information according to the found speed.

Subject invention

The device for the speed of telegraphing from a series of speeds, in which the input information sequence through the key, the synchronization node with the first clock frequency and the initial start node is fed simultaneously to the installation input of the second clock frequency counter, the code input of the decoder, the corresponding inputs of the gate node of the recovery moment and the polling node, and the second clock frequency through the initial start node is fed to the counting input of the counter of the second clock frequency and alternately to the polling input of the decoder, whose outputs through other inputs of the gate node of the signals of the characteristic moments of the restoration, other inputs of the polling node, counters of elementary locations and

An OR circuit is connected to a second key input, characterized in that, in order to increase the reliability, the outputs of the decoder are also connected to the inputs of the zone gate forming unit

crushing of an additionally introduced block of protection; ity from crushing, in which the output of the gate signal node of the crushing zone is connected via a key connected in turn to the corresponding inputs of the interrogation node, connected to the counter input, and the counter output is connected to the device installation circuit through the second key, on the other input of which the second clock frequency is fed.

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