SU466687A3 - Magnetic random access memory - Google Patents

Description

(54) MAGNETIC OPERATIONAL STORAGE DEVICE

one

A two-core magnetic random access memory (MOZU) for storing one binary unit of information is known, containing memory elements stitched with pairs of read wires connected to differential read amplifiers and pairs of numerical wires with chains of counter-switched diodes, resistors connected to pairs of wires a readout, conducting card connected to the reference potential bus.

However, such a device is not fast enough.

The described device differs from the known one in that between the common ends of each pair of read wires and the reference potential bus there is a resistor with a resistance equal to half the wave resistance of one read wire. Between the separate ends of each, a pair of read wires, a resistor with an average tap is included, the resistance of which is equal to twice the wave resistance of one read lead. The middle taps of the resistors of two adjacent pairs of Read wires are connected respectively to

the two inputs of the corresponding differential read amplifier.

This makes it possible to increase the speed of the device.

In addition, the described device differs from the known one in that the conductive card is made up of two parallel cards, each of which is connected to the respective pairs of read wires.

This makes it possible to increase the reliability of the device.

FIG. 1 shows a basic circuit comprising a pair of wires for reading, as well as devices for excitation and reading for use in a random access magnetic storage device; in fig. 2 is a diagram of a one-bit memory node with direct sampling (the node contains two main circuits shown in Fig. 1); in fig. 3-- a single-bit diagram of a two-wire memory unit with a dimension containing two main digital circuits shown in FIG. one; in fig. 4 is a one-bit three-dimensional (3D) three-wire memory circuit comprising two main circuits shown in FIG. I; in fig. 5 is a diagram of a two-bit memory unit with two cores per binary unit and with direct sampling, containing

The four circuits shown in FIG. 1, numeric lines, as well as means for exciting reading and writing; in fig. 6 is a variant of the numerical line diagram of the device shown in FIG. five.

A pair of wires 1, 2 connects a plurality of memory elements or magnetic cores 3 for reading. Both wires of the pair are located in close proximity to the conductor board 4 connected to the reference potential bus 5, for example, ground. The wires may be located on both sides of the board 4 (see FIG. 2) or be on the same side. The cores 3 are connected by numerical wires (not shown in Fig. 1). Both wires 1, 2 are interconnected at one end at point 6, which through a resistor 7 is connected to the bus 5 of the reference potential, such as ground. The resistance of the load resistor 7 is equal to Zo / 2, where ZQ is the characteristic impedance of wire 1 or 2 with respect to the grounded board 4 or with respect to the system ground if the board 4 is absent. Wires 1, 2 have separate ends 8 and 9 for exciting the readout, which are connected to each other through series-connected resistors 10 and 11, having an average tap 12. The resistance of each resistor 10 and I is equal to ZQ.

Each end of the excitation and reading 8, 9 of the wires 1, 2 is connected through the respective diode links 13 and 14 to the ends of the secondary winding 15 of the transformer 16. The diode link 13, 14 consists of two diodes connected in parallel and opposite to each other. The diode links allow current to flow In either direction between the secondary winding of the transformer 15 and the pair of wires 1, 2. The diode links 13, 14 are switched on in order to restore the direct current in the transformer 16.

Transformer 16 contains the primary winding 17 connected to the exciter 18. Transformer 16 and the exciter 18 are structurally made and mounted in the usual way and serve symmetric push-pull current pulses at the ends 8, 9 of the wires 1, 2.

Since the secondary winding 15 and the wires 1, 2 are connected to earth only through a resistor 7, currents of the same magnitude are passed in both directions 1, 2 in opposite directions.

Let during the writing of a binary unit of information “1 current in the upper wire 1 passes from left to right, and in the lower wire 2: the same current - from right to left. Recording of a binary unit of information “O can be made in the absence of pulses supplied by the pathogen 18, or by applying push-pull pulses with a polarity PROTIVOne to the polarity that provided the recording“ 1. Over the entire length of the wires 1, 2, the voltages are equal, opposite, and symmetrical with respect to the ground plane 4. As a result, the equal and opposite currents

excitations in two wires 1, 2 do not cause a voltage to appear at common end terminal 6 and therefore no current passes through the load resistor 7.

When equal and opposite excitation current pulses are applied to terminals 8 and 9, one half of the current passes through wires 1, 2, and the other through resistors 19 and 11. Since equal and opposite currents pass through identical resistors 10 and 11, the average tap 12 remains at zero potential.

Wires 1, 2, to which the pulses of the exciter 18 are applied when writing information to the core, are also used when information is read from the core to provide a read signal to the read amplifier

19, the input of which by wire 20 is connected to the middle tap 12 of resistors 10 and I. The other input 21 of the differential read amplifier 19 is connected to the reference potential bus 5. Therefore, the read amplifier 19 responds to signals applied to the input

20, which differ in voltage from the reference potential, or earth. Since the midpoint 12, to which the input of the read amplifier 19 is connected, is the point remaining at zero potential during the supply of a digital pulse from the exciter 18, the large read voltage pulses on the wires 1, 2 are almost not affected by the read amplifier. time recording information. Such a circuit can greatly reduce the time required to restore the read amplifier after writing information. This makes it possible to shorten the duration of the read-write operation cycle in memory.

Information is read by recognizing the presence or absence of a read signal on one of the wires 1, 2, when a read pulse is fed through a numerical wire (not shown in the drawings) connecting at least one of the cores 3. If the read pulse causes a core 3 along wire 1, a read signal 2 is generated and in the selected core, as a result, the signals -) - and -V appear, propagating in opposite directions along wire 1. If polarities are chosen arbitrarily, then positive Part read signal propagates to the left along the wire 1, and the negative part of s - right.

The part of the ciphering signal, propagating from the right, encounters discontinuity at point 6 due to the presence of a resistor 7 with a resistance of 2/2. This non-uniformity causes the 4-U / 2 signal to be reflected back along wire 1, and the y / 2 signal transmitted along wire 2. When these two active and opposite signals reach points 8 and 9, they are mutually destroyed by resistors 10 and 11 and the voltage on the middle tap 12 does not appear,

5 A part of the read signal + o, spreading to the left, encounters a non-uniformity in the form of an oesistop at point 8, since there are two pezystools 10 and II, which are connected sequentially. This non-uniformity causes the appearance of a 4-O / 2 signal, reflected back along trigger 1, and a + and / 2 signal, propagating to the right from point 9 along wire 2. When these two signals –iv / 2 of co-polar polarity reach the resistor 7, they are completely absorbed. Let us now return to the moment when the propagating part of the readout signal reaches point 8. Part + v is at point 8 at the same moment when the signal is reflected back along wire 1. Therefore, the instantaneous value of voltage at point 8 is + l, 5t) . At the same time, since there is no propagation delay in resistors 10 and 11, a voltage of 4 appears at the middle branch 12, and the voltage 1 across appears at terminal 9, from which it propagates along wire 2. Read signal + and, currently present at the middle tap 12, represents the voltage to ground, which is fed to one input of the read amplifier 19 via wire 20. The read amplifier is gated and operated in the usual way. Thus, the read amplifier does not respond to possible noise abnormalities that occur at other points in time. FIG. 2 shows one bit of the bottom of a numeric or two-dimensional C2D) storage device containing two pairs of read wires 1 and 2 shown in FIG. 1. One pair of these t occasions consists of WIRES 1 and 2, and the other is from wires 1 and 2. A number of storage elements or magnetic cores 3 connected by the readout lead are also connected by corresponding numerical lines 22. Average tapping 12 pairs of WIRES 1, 2. served for reading pi (lp. is connected to the ofTTTOMy input of the diffyGevent.d amplifier of reading 19. a lateral tap 12 of daddy of WIRES T and 2 - to another input of this amplifier. The bottom of which is shown in Lig.2, at each moment of time, only There is one of the lines of words 22, first for reading and then for writing. If the word line 22 is selected, then an impulse of one polarity is sent through it. There is a reading of the inLormapine stored in the 1Т-THREAD core 3. If necessary, write to the magnetized core 3 (Fig. 2), then on the line of words 22, the PULSES of the record of the opposite section are fed. At the same time, the push-pull signal of level excitation is fed from the SECONDARY winding 15 to a pair of WIRES I and 2 to record "1. Coincident recording pulses and digital signals cause a reversal of the core 3. Recording "O is produced by lowering the push-pull excitation signal. FIG. Figure 3 shows a diagram of a one-bit unit of the 2.5D device, which is similar to the scheme shown by Lig. 2, except that the wires of the columns 23. 24 25 and 26 connect all magnetic cores 3 to the respective columns. When the 2.5D charger is operated (Fig. 3), the inLormapia stored in the magnetic core 3 is read by pushing two-stroke pulses in the direction indicated by the letter R from the secondary winding 15 over a pair of wires 1 and 2. After a short delay, which can be very short, in the direction R, a read pulse is applied along the vertical wire 23, which causes the core 3 to be re-magnetized if "I. In this case, a read signal is induced on the wire 1, extending to the middle tap 12 and from it to the input of the read amplifier 19. To record "1 in core 3 (Fig. 3), push-pull signals are written to the pair of wires 1 and 2 in the direction indicated the letter W. For the entry "O push-pull excitation is removed. FIG. Figure 4 shows a three-dimensional one-bit node (3-D) memory unit or memory unit with coincident currents of the three-wire type, in which one set of wires is used both for prohibition and for reading. The circuit in FIG. 4 differs from that of FIG. 3 in that it contains an additional set of wires 27-30 arranged parallel to the wires pairs 1,2, G and 2. Access to a separate core 3 for reading is provided by applying a pulse in the direction R along the vertical wire 23 simultaneously with the horizontal pulse supply wire 27 in direction R. Access to core 3 can be provided for reading by driving Wires 23 and 2B in directions R. Writing Record 1 in core 3 IMPULSE is fed through vertical WIRE 23 in direction V. and also given a pulse from mountains izonalnogo WIRE 27 in this direction W. When recording “About push-pull prohibiting pulses are fed in direction C of the SECONDARY winding 15 through a pair of wires 1. 2 to prohibit the remagnetization of the core 3. In any case, core 3 does not experience any effects, since PULSES in wires 23 and 9 are oppositely opposed and mutually destroyed. On grng. Figure 5 shows a two-bit unit. The memory unit is a sample to two cores per BINARY unit containing reading devices in accordance with League. I. Pair of wires 1. 2 for reading the pythfre connects the cores 3, located above and below the conductive grounded board 4. The pair of wires 1 and 2 are similarly mounted and distributed relative to the magnetic cores placed above and below the grounded board 4. Differential read amplifier 19 is connected to two pairs of read wires in the same way as in the device of FIG. 2. An additional pair of wires for reading the numbers 31, 32 is similarly located relative to a conductive grounded board 4, and an additional pair of wires for reading the numbers 31, 32 is similarly located relative to a conductive grounded board 4. These additional pairs of wires are connected to the second differential read amplifier 19 is similar.

FIG. 5, each line of words 22 consists of a pair of wires interconnected on one end 33 and having separate excited opposite ends 34 and 35. The excited ends 34 and 35 are interconnected through two resistors 36 and 37 connected in series, the resistance value of each of which is the impedance ZQ with respect to the ground of each individual wire of the pair, and having an average tap 38 associated with the reference topotipial bus, for example ground.

FIG. b shows a variant of a separate line of words 22, for which the average tap 38 is not connected to ground, but the common end of 33 numerical wires is connected to ground through a resistor 39, the resistance of which is equal to half the characteristic impedance of a separate wire of a pair.

Each pair of numerical wires is driven by a push-pull circuit by the secondary winding 40 of a transformer 41. A pair of diodes 42 is connected in series with the secondary winding 40 to restore the transformer's direct current.

The primary winding 43 of the transformer 41 with an average output is connected in the usual way with the word selector and the pathogen. The latter contains a read pathogen 44, peeplechuchatelyami 45 and the pathogen write 46

All other lines of words in FIG. 5 are mounted in the same way (connections with non-apochic lines of words are not shown in the diagram). The lines of words 22 are mounted in such a way that the excited ends are alternately arranged on one and the other side of the grounded board 4, as shown in the diagram, in order to alleviate the problems of spatial placement and installation.

FIG. 5, 16 lines of words 22 are shown, along with each of which two binary information units are stored. Only one line of words is readable and readable at a time.

The operation of the two-dimensional memory device shown in FIG. 5 is similar to the work of a known two-dimensional memory device with two cores per discharge.

Subject invention

Claims (2)

1.L Agnitive two-core random access memory for storing one binary unit of information containing memory elements, readable with read wire pairs, connected to differential read amplifiers, and numerical wires with chains of counter-connected diodes, resistors connected to read wire pairs, conducting board connected to the reference potential bus, characterized in that the purpose of improving the speed of the device, between the common ends of each a pair of read wires and a reference potential bus include a resistor with a resistance equal to half the wave resistance of one read wire; between the separate ends of each pair of wires the readout includes a resistor with an average tap, the resistance of which is equal to twice the characteristic impedance of one read wire; middle taps of resistors of two adjacent read wire pairs are connected respectively to the TWUM inputs of the corresponding differential read amplifier. 2. A device according to claim 1, characterized in that, in order to increase the reliability of the device, the conductive board is made of two parallel boards, each of which is connected to the corresponding pairs of wires. 4t5 H-5W  TJ2f / r / f /. ic i Fig.Z, . 35 . .b o-wW 0-LLL o-LLL 3V