SU364031A1 - DEVICE FOR CONTROL OF ADDRESSES CURRENTS - Google Patents

Description

one

The invention is intended to control address currents and can be used both in magnetic random access memory and in other electronic devices.

A device is known for controlling address currents using the full-address code encoder.

With repeated read cycles for this device, it is necessary, starting from the second cycle, to send a zero number write cycle to the selected address, and with repeated write cycles before writing a number, a read cycle to switch the cores of the magnetic encoder.

Such a control circuit requires an increase in electronic equipment and an access time. In addition, it does not respond to the excess of one address current compared to another if the latter corresponds to the field of moving the core.

The purpose of the invention is to increase the speed of the device.

This is achieved by the fact that all four cores of the device are stitched oppositely by two common windings, a third winding passes through the first and second cores are consistently connected to the first winding, and a fourth winding passes through the third and fourth cores consistently and connected to the second winding, and each from cores wrapped by separate output winding.

FIG. 1 shows schematically a device for monitoring address currents; in fig. 2 - time diagram of his work.

The device contains four I-4 cores, which are shared by common windings 5 and 6, which are connected to a common coordinate

points of the magnetic cube. Winding 5 is turned on according to and consistently with winding 7 of cores 1 and 2, and winding 6 is turned on according to and consistently with winding of 8 cores 3 and 4. All cores each have one different, one output winding: 9, 10, 11, 12.

The proposed device works as follows. (The initial state of the cores 1-4 is indicated in Fig. 2 by a-g points L, -A,).

R e f i m s ch i t i v a n i. When appearing

the read currents in the coordinate wires, a current arises in the windings 5 and 6, and a double amplitude magnetic field is induced in the core / from the influence of

current of one coordinate, for example, coordinate A, and magnetic field strength of a single amplitude from the effect of current on the second coordinate, such as coordinate Y (see Fig. 2, a), as a result of which the core does not switch. In core 3, a double amplitude field is induced by the effect of the current in the second coordinate and a single amplitude field by the effect of the current of the first coordinate. Switching of the core is also not observed. If there is no current in the second coordinate, the core switches from / to the state L to state A}, a. if there is no current in the first coordinate — the core 3 from the state Lz to the state AZZderezniki 2 and 4 in both cases does not change its position.

Recording mode When recording currents occur, the coordinate wires in the core 2 induce a double amplitude field from the effect of the current on the first coordinate and a single magnetic flux from the current on the second coordinate, as a result of which switching of the core 2 does not occur. In the core 4, a double amplitude field is induced from the effect of the current on the second coordinate and a single amplitude field from the influence of the current on the first coordinate. Switching of core 4 is also not observed. If there is no current in the second coordinate, the core 2 is switched from the state L2 to the state Ar, and if there is no current in the first coordinate, core 4 from the state L4 to the state Al

The cores can control not only the absence of currents along the coordinate wires in both modes, but also the excess of any address current compared to the other in both modes, if the latter corresponds to the moving field. This inequality is reinforced not only because of the nonlinear characteristic of the cores (I), but also because a double current passes through the cores each time from the coordinates in both modes. In this case, there is a partial switching of the cores. This disadvantage can be overcome by increasing the sensitivity of the playback enhancer.

Thus, the core / allows you to control the absence of current on the second coordinate or current deviation on the first coordinate in read mode, core 2 - no current on the second coordinate or current deviation on the first coordinate in write mode, core 3 - no current on the first coordinate or current deviation along the second coordinate in the read mode; core 4 — absence of current along the first coordinate or

current deviation on the second coordinate in the recording mode.

Subject invention

A device for controlling address currents containing four cores and windings, characterized in that, in order to increase speed, the cores are stitched oppositely by two common windings, a third winding passes through the first and second cores and is connected in series with the first winding, and the fourth winding passes through the third and fourth cores are consistently and consistently connected to the second winding, each of the cores is wrapped by a separate output winding.