SU301863A1 - DEVICE FOR ALLOCATION OF DIGITAL INFORMATION AT PSEUDO-DUDENT SIGNAL MODULATION - Google Patents

Description

The present invention relates to the field of radio communications, in particular, to a technique for receiving and extracting digital information transmitted with a number of high-frequency electromagnetic waves.

Devices for extracting digital information are known in the case of a non-noise modulation of a signal transmitted by inverse modulation: a pseudo-random sequence containing a multiplier of the received and reference pseudo-random sequences.

In order to reduce the effect of path gain factors on the accuracy of receiving digital information, in the proposed device, the output of a pseudo-random sequence multiplier that is shifted in time relative to each other by half-time in synchronism mode is connected through a filter tuned to a clock frequency, a limiter and a band-pass filter with an input phase detector, the second input of which is connected to a coherent clock voltage source.

FIG. 1 shows a functional diagram of the proposed device; in fig. 2 is a schematic diagram of the distinctive part of the device.

multiplier 3 of the received and reference POP, narrowband filter 4, tuned to the clock frequency and transmitting information spectrum, two-sided limiter 5, band-pass filter 6, phase detector 7, input 8 of the received signal, input 9 of the reference signal of the carrier frequency, input 10 of the reference bandwidth, input // reference signal clock frequency and output 12 information. In addition, the device includes elements 13-18 of the input emitter follower, elements 19-29 of the received and reference PF multipliers, elements 30-34 of the clock frequency amplifier, elements 35-38 of the quartz filter, elements 39-46 of the two-way limiter, input 47 of the received PSP, Power ratio 48-50, inputs 51-52 of the reference bandwidth and 53 clock frequency output. Synchronous detector / received PSP,

the output of which through a low-pass filter 2 is connected with a multiplier 3 of the received and reference SRP, shifted in synchronism mode by 0.5 To. The output of the multiplier 3 through the narrowband filter 4 configured to

The first clock frequency harmonic and bandwidth-passing information, double-sided limiter 5 and band-pass filter 6 are connected to the input of phase detector 7. To eliminate the parasitic amplitude synchronization system in time delays, FWD, the voltage from the output of filter 4 is fed to phase detector 7 through double-sided limiter 5 and the band-pass filter 6. The phase of the clock component is compared with the phase of the reference clock voltage on the phase detector 7, the output data of which is formed on the output voltage. Subject of the Invention A device for extracting digital information during pseudo-noise modulation of a signal, comprising a synchro pseudo-random sequence detector, a low-pass filter, a received multiplier and an on-off pseudo-random sequence, a clock-tuned filter, and a phase detector, characterized in that, in order to reduce the effect the instabilities of the path gains on the reliability of the reception of digital information, the output of the pseudo-random sequence sequences shifted of time relative to each other in synchronism poltakta mode is coupled through a filter tuned pas clock rate limiter and a band pass filter to the input of the phase detector, a second input coupled to a voltage source of coherent zhepi clock.

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