SU1760618A1 - Half-bridge inverter - Google Patents

Abstract

Use: Conversion of direct voltage into alternating sinusoidal voltage for secondary power supply and electric drive systems. The power switches 1, 2 are made in the form of SIT transistors and are controlled by the output signal of the intermediate amplifier 10. When the unlocking 17 or locking 18 transistor is turned on, the output of the unlocking voltage source on the diodes 15, 16 or a source of blocking voltage on diodes 12, 13, respectively. The unlocking delay nodes 8 and 9 ensure the exclusion of through currents during the dissipation of electric charge in the gate-source junction of power switches 1, 2. 2 Cp. f-ly, 2 ill.

Description

The invention relates to electrical engineering, in particular, to converter technology, and can be used mainly in creating transistor converters with a sinusoidal output voltage.

Transistor converters with a sinusoidal output voltage 1.2, are made according to bridge and half-bridge inverter circuits, containing power switches and a control unit, each of the paraphase outputs of which are connected to the control circuit of the power switch. The disadvantage of these converters is the occurrence of through currents through the power switches-transistors - due to the accumulation of electric charge in the base region of semiconductor probes by the time of their switching.

The closest essentially technical solution to the device is a half-bridge inverter 3 comprising two power switches and a control unit, each of the paraphase outputs of which are connected to the input of the unlocking delay unit, output connected to the control circuit of the power switch.

The disadvantage of this inverter is the presence of through currents due to the accumulation of charge in the base region of semiconductor devices. When one of the transistors is unlocked, the load current and the collector current of the second transistor flow through it, the base of which accumulates excess charge. An obvious way to reduce the power of the dynamic losses caused by through-currents is to use high-speed power devices to reduce the amount of accumulator

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lent charge. The use of field-effect transistors for this purpose is especially effective. However, the feature of operation of inverters with a sinusoidal output voltage does not allow thus to achieve a significant increase in efficiency. Since inverter diodes are used in the inverter, operating during the entire interval of the non-conducting state of the transistor, by the time of unlocking the latter, through-currents occur due to charge accumulation in the base region of semiconductor diodes, which causes overloading of field-effect transistors, reduces efficiency and reliability devices.

The aim of the invention is to increase the efficiency and expansion of the field of use by providing pulse width control of the output voltage.

The goal is achieved by the fact that in a half-bridge inverter containing two power switches and a control unit, each of the paraphase outputs of which are connected to the input of the unlocking delay unit, the output connected to the control circuit of the power switch, the sequentially inserted intermediate amplifier is connected to the power switch circuit, and SIT-transistor is used as a power switch, and the intermediate amplifier is made in the form of consistently connected sources of unlocking and locking voltage, connected to the control input of the SIT transistor through respectively the unlocking and locking transistor, the last of which is shunted back by the switched on diode, the sources of the unlocking and blocking voltage are used as sources of the locking voltage, and the output of the locking voltage source is shunted by the injected filter capacitor .

The drawing shows a block diagram of the following inverter,

The inverter contains two power transistors 1.2, two capacitors 3.4, half-bridge LC-filter 5 and load 6, control unit 7, each of the paraphase outputs of which are connected to the input of nodes 8.9 unblocking, output connected through intermediate Amplifiers 10,11 with a control circuit of a power switch, each of the intermediate amplifiers containing a source of blocking voltage in series-connected, made in the form of a transformer-rectifier assembly on diodes 12, 13, shunted at the output of the cond by sensor

14, a source of unlocking voltage, made in the form of a rectifier diode

15,16, unlocking (17) and locking (18) transistors, one of which (locking) is shunted by the back-on diode 19. A pulse-width modulator is used as a control unit, at the output of which a two-pole pulse signal with a coefficient 0 is generated filling rate from 0 to 1; as a node of the unlocking signal, a one-shot circuit and a logic mismatch circuit.

Claims (3)

The next inverter works as follows. The power section is characterized by two modes of operation of the LC chokesel; the mode of accumulation and the mode of return of energy to the load. In the case when the direction of the current in choke i coincides with 0 shown in Fig. 1, the energy storage mode corresponds to the closed state of transistor 2 and the open state of transistor 1, Figure 2 shows timing diagrams of the pulse voltage of PWM-5 signal Uy, control signals FI of the power transistor 1 and FZ of the power transistor 2, the voltage Kim at the terminals of the filter 5 and the current of the throttle i. After the transistor 1 is locked by the control signal Pr, the transistor 2 is unlocked with a time delay ta specified by the delay node 9. The value of T3 is chosen from the condition where Tp is the absorption time of the electric charge in the gate – source junction after the locking 5 of the transistor 1. After the complete resorption of charge in transistor 1 begins the mode of return of the energy of the throttles to the load through a source of blocking voltage for transistor 2 and the gate-drain transition of the transistor 40 of the transistor 2. In this state, the circuit is in flow T3-TP and the unlocking signal to the transistor 2, the latter operates in the inverse mode at negative drain currents. 45 This interval of operation — the mode of energy output — continues even after a blocking signal is applied to it by transistor 2. This interval is accompanied by the transfer of energy through the source of the blocking signal 50 of transistor 2 and the gate-drain transition of transistor 2. The process of energy storage begins when the unlocking signal arrives at transistor 1. Then this process is repeated. The processes in the inverter and in opposite directions of the current of the throttles are similarly proceeded. Claim 1. A half-bridge inverter comprising two power switches and a control unit, each of the paraphase outputs of which are connected to the input of the unlocking delay unit, an output connected to the control circuit of the power switch, in order to increase efficiency and expand the area use by providing a pulse-width control of the output voltage, a sequentially inserted intermediate amplifier is included in the control circuit of the power switch, and a SIT transistor is used as the power switch. 2. The inverter according to claim 1, characterized in that the intermediate amplifier is made in the form of a series-connected connection the unlocking and blocking voltage sources connected to the control input of the SIT transistor through the unlocking and blocking transistor, respectively, the latter being shunted by a reverse-connected diode. 3. The inverter according to claim 2. characterized in that transformer-rectifying units are used as sources of unlocking and blocking voltages, and the output of the blocking voltage source is shunted by an injected filter capacitor. Ft U them