SU1737680A1 - Device for controlling and protecting inverter - Google Patents

Abstract

The invention: the device contains power transistors 1.2, capacitors 3, 4, output transformer 5, master oscillator 6, control transformer 7, current limiting resistors 8, 9. T4, auxiliary control switches 10, 11, optocoupler 13, elements I 18, 19, 20, current sensor 16, start-up timer 17, elements OR 21, 22, frequency divider 23.2 Il.

Description

The invention relates to a converter technique and can be used in DC converters for protection against overloads.

There are known devices for protecting an inverter against current overloads, which contain current sensors included in the corresponding shoulder of the inverter bridge in series with power switches, three AND elements OR specifying a generator, a threshold element, a control device (executive-switching unit).

The disadvantage of the devices of the specified type is the lack of automatic recovery of the device when the over-current is removed.

The closest to the claimed technical essence and the achieved result is an inverter containing power transistors and half-bridge capacitors, an output transformer, the circuit of which includes a current sensor, the input of which is connected to the start-up timer, and

control auxiliary switches that shunt the control inputs of the power transistors. A device of this type allows restoring operability when the protection device of the inverter is triggered after the expiration time of the pre-start pause timer.

The disadvantage of these inverters is the fixed residence time of these inverters in the disconnected state when an overcurrent signal appears, and if during this time the overload has not been eliminated, the inverter will operate in the current limiting time during the starting time timer, and only then will be disabled. If the overload has been eliminated earlier, it will still be turned on only after the activation time of the pre-start pause timer. This leads to a decrease in the reliability of the inverter. In addition, the protection is triggered only when the current overload in the load circuit.

ate

SA) J O 00 O

The purpose of the invention is to increase the reliability of the inverter in emergency mode by limiting its residence time in overload mode,

This is achieved by connecting an inverter containing two power transistors connected by one of the power electrodes to the input terminals, and the other to the winding of the power transformer, and the control transitions of these transistors are connected through current limiting resistors and the control transformer to the master generator of the control unit and are shunted by the power circuits of auxiliary controlled switches, the inputs of which are connected to the output of the start-up timer, the input of which is connected to the current sensor, the optocoupler, current limiter third resistor, three AND elements, two OR elements, N divider circuit, the optocoupler's light-emitting element in series, the limiting resistor and the control transformer winding are connected in parallel with the load, and the photodetector of the optocoupler is connected to the first input of the first element And, to the second input of which the inverse output of the start-up timer is connected, the direct output of which is connected to the first inputs of the second and third elements AND, the second inputs are cat connected to the first and second secondary windings of the control transformer, the third inputs are connected to the current sensor output, and the outputs are connected to the first inputs of the first and second OR elements, respectively, the second inputs of which are connected to the output of the first And element, the third inputs of which are connected to the inverse the output of the divider to N, the input of which is connected to the output of the timer, and the outputs of the elements OR to the inputs of the auxiliary controlled keys,

FIG. 1 shows the electrical circuit of the device; in fig. 2 shows timing diagrams of current and voltage at the inputs and outputs of the elements of the device for controlling and protecting the inverter.

The device contains the first and second power transistors 1 and 2, capacitors 3 and 4 and the output transformer 5 connected in a half-bridge circuit. The output of the control unit containing the master oscillator 6, the input of which is connected to the load, is connected to the primary winding of the control transformer 7, the second secondary windings of which through the first and second current-limiting resistors 8 and 9, respectively, are connected to

the control transitions of the power transistors 1 and 2, which are shunted respectively by the first and second controlled auxiliary switches 10 and 11.

The third secondary winding 12 of the control transformer 7 through the light-emitting element of the optocoupler 13 and the third current-limiting resistor 14 is connected in parallel with the load 15 Sensor output 16

0 current, included in the negative bus circuit of the inverter DC current, is connected to the input of the start-up timer 17, the inverse output of which is connected to the input of the first element I 18, the other input of which is connected to the photoreceiver of the optocoupler 13 The forward output of the start-up time timer is connected to the input a divider of N 23, with the first inputs of the second and third elements And 19.20, the second inputs of which are connected respectively with the first and second secondary windings of the control transformer 7. and the third with the output of the current sensor 16. The outputs of the second and third elements And 19 and 20 are connected respectively to the first inputs of the first and second elements OR 21 and 22, the second inputs of which are connected to the output of the first element And 18, and the third to the inverse output of the divider on N 23.

0 An example implementation of the invention is based on the use of power transistors 1, 2 of the type KT841, capacitors 3, 4 of the type "73-16, output transformer 5 on the ferrite core H2000HMC-1

5 K32x20x9 control transformer 7 on the ferrite core H2000NMS-1 K7x4x2, optocoupler 13 of the SEP-1 type, resistors 8.9, 14 of the MLT type, current sensor 16 on a potentiometer of the C15-9 type, setting the generator of the control unit 6 on the 155HAZ type microcircuit , start-up timer 17 on a 155AGS type microcircuit, And 18, 19, 20 elements on a 155L1 type microcircuit, OR 21, 22 elements on a 155LL1 type microcircuit

5 auxiliary controllable keys 10, 11, for example, on transistors of type KT630, optrons of type AOU103, relay of type RES 55A, a divider by N 23 on a microcircuit of type 155ТМ7.

0 Turning the inverter on and off when the overcurrent is detected and removed is as follows.

When turning on the voltage supplying the inverter, the control node with the master

5, the generator 6 starts operation, having carried out the stable switching of transistors 1 and 2. In this case, if there is no overcurrent, the duration of the on state of the switching transistors 1 and 2 is set in accordance with their operating

mode. If the inverter is turned on to a load with a significant starting current, then in each half-cycle from the current sensor 16 to the inputs of the timer 17 of the starting time of the second and third elements And 19, 20 an overload signal is received. In this case, a pulse of positive polarity appears at the output of timer 17, the duration of which is determined in accordance with the preset starting torque duration.

Thus, at the outputs of the cells 19, 20 synchronously with the voltage of the secondary windings of the controlled transformer 7, which are connected to the first inputs of the indicated elements, at the moment of exceeding the set permissible current value of the collectors of the switching transistors 1 and 2, a signal appears that through the elements OR 21,22, includes controllable auxiliary switches 10,11, shunt the control transitions of the power transistors 1, 26 preventing an increase in the current through them beyond the allowable one. If the load current is established within the working period within the set period of the starting time, the protection will cease to operate and the inverter will return to the operating mode. In this case, the voltage and current diagrams in the inverter circuit when switched on without overloading are shown in FIG. 2 and correspond to the time interval to - ti.

If at the time ti of the operating mode of the inverter it is overloaded, then, as in the start mode, the overload with increased starting current under the influence of a signal from the current sensor 16 during the set starting time period tpv t2 - ti is the amplitude of the collector current of power transistors will be limited by shortening their duration, up to time point t2. Starting overload results in a decrease in the output voltage of the UHS. This cause triggers the optocoupler 13, the resistance of the photodetector of which decreases and the signal with a unit level arrives at the first input of the first element 18. However, its passage will be blocked by a signal with a zero level, which is fed to the second input of the specified element from the inverse output of timer 17.

Starting from the moment of time t2, the inverse output of timer 17 appears on a single-level signal and, if the overload has not been removed, the signal from the output of the first element 18 comes through the OR 21, 22 elements, includes controlled auxiliary switches 10, 11, bypass the control transitions of the power transistors 1 and 2 for a period of time overload in the load circuit.

Let us consider in detail the operation of the circuit consisting of the third secondary winding of the transformer 7, the light-emitting element of the optocoupler 13, the current-limiting resistor 14, the secondary winding of the output transformer 5.

In the operating mode, the optical current 13 does not flow through the light-emitting element of the optocoupler 13, which is ensured by the choice of the current-limiting resistor 14 from the condition:

I V | l7-V | l5l –Ass13 R14

 I eve 13 min (one)

When disconnecting the power transistors 1, 2 on the secondary winding of the output transformer 5, the voltage Uns is absent. In this case, the current through the LED will be determined by the expression

Vll7 - Usv13

RM + RH and RMS

 I ev 13 min

(2)

and in case of a short circuit

ICB 13 min. ICB 13 kz

V | i7 - usv13

RM

 I eve 13 max

(3)

Thus, choosing the current limiting resistor 14 along with (1) also from the condition:

ICB 13 min

V || - VCB13

Rl4 + R4MHH ext II R | I5

(four)

ensure the required performance of the above circuit.

If at the moment of time the overload in the load circuit is eliminated (RH RH min. Add.), Condition (4) ceases to be fulfilled, the resistance of the photoreceiver of the optocoupler 13 increases, and the first output of the element 18 will receive a zero signal. The keys 10, 11 will be open, the protection will stop and the inverter will go into operating mode.

If overcurrent did not occur due to a decrease in the load resistance, but for another reason, for example, due to the flow of through current through the power transistors 1, 2 at time t.4, then the processes occurring in the time interval t2 - ti and then, starting from the time ts t4 + tpv, the timer 17 will be prepared for operation until the time te of the rise of the overload current to the threshold current value.

At the moment te, at the input of the timer 17, the next pulse will change, which will change the state of the divider to N 23, the inverse output of which will lead to a single-level pulse, the duration of which will be equal to

(five)

 + (1b-g5) Mo.

This pulse is applied to the elements OR 21, 22, turns on the controlled auxiliary switches 10, 11, shunts the control transitions of the power transistors 1 and 2, turning off the inverter.

Thus, before the indicated overload is removed, the inverter goes into relay mode with the duration of the off state, etc. and the duration of

STATES Tpv

Claims (1)

Thus, the proposed inverter with an overcurrent protection unit is distinguished by high reliability, since a long stay in emergency mode during overcurrent of the load circuit and in other circuits is out of order. The invention is a device for controlling and protecting an inverter made according to a push-pull circuit and including power transistors connected by one of the power electrodes to the input terminals and the other to the output transformer winding, which contains auxiliary control keys whose power transitions are intended for shunting control power transitions transistors current sensor. an output connected to the start-up timer input and an inverter control unit, characterized in that, in order to increase reliability, an op5 tron, current limiting resistor, three AND elements, and OR frequency divider are inserted into it, and the inverter control unit includes a master oscillator , a control transformer and two current-limiting resistors, the output of the master oscillator of the inverter control unit being connected to the primary winding of the control transformer, the first and second secondary windings of which are 15, the first and second current-limiting resistors of the inverter control unit are designed to connect the first and second power transistors to the control junctions, respectively, and the third secondary winding through the series-connected optocoupler light emitter and current limiting resistor is connected to the load parallel to the photodiode of the optocoupler connected to 25 with the first input of the first element I, with the second input of which the inverse output of the start-up timer is connected, the direct output of which is connected to the input of the frequency divider and with the first inputs of the second 30 and the third elements And, the second inputs of which are connected respectively to the first and second secondary windings of the control transformer, the third inputs are connected to the output of the current sensor connected 35 into the power bus at the input of the inverter, and the outputs with the first inputs of the first and second elements OR, respectively, the second inputs of which are connected to the output of the first element AND, the third inputs with the inverse 40 by the output of the frequency divider, and the outputs of the elements OR of the supervisory inputs of the auxiliary controlled keys. To r yes / g /