SU1721815A1 - Pulse-width modulator - Google Patents

Abstract

The invention relates to a pulse technique and is intended for use in collector modulators of radio transmitting devices of communication systems and broadcasting, as well as in devices for generating pulse signals for low frequency amplifiers operating in key mode. The purpose of the invention is to increase the reliability of modulation by reducing the distortion of the output signal by introducing amplitude mode.

Description

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l torus 5, subtractive unit 6, tire 7 fixed potential, driver 8 pulses and time comparator 9 connected in series, filter 10 lower

frequency and peak detector is 11. Latitude

The invention relates to the field of pulsed technology and is intended for use in the collector modulators of radio transmitting devices of communication systems and broadcasting, as well as in devices for generating pulse signals for low frequency amplifiers operating in key mode.

Pulse-width modulators are known that contain a series-connected clock pulse generator (GTI), an integrator, a voltage comparator, and a key power amplifier (KUM), with the second input of the voltage comparator being the device input. These modulators differ only in output stage configurations. The principle of operation of modulators of this type is as follows. The rectangular pulses from the GTI output are converted by the integrator into a sawtooth voltage, which is fed to one of the inputs of the voltage comparator, to the other input of which is fed - an input low-frequency signal. As a result of their comparison, rectangular pulses are formed at the output of the comparator, the duration of which is proportional the magnitude of the signal, i.e. carried out by pulse width modulation (PWM). Then this pulse signal is amplified by a highly efficient KUM to the required power level and the low-pass filter included in the KUM extracts the low-frequency component amplified in power from the PWM signal.

A disadvantage of the known technical solutions is that when the amplitude of the input signal exceeds the amplitude of the sawtooth voltage, an overmodulation of the pulse duration at the comparator output occurs, which leads to distortions at the device output.

The closest to the proposed device is a pulse-width modulator containing (1) connected in series generator 1 clock pulses (GTI), integrator 2, comparator 3 voltages and key amplifier 4 power (KUM), the output of which is device output.

the new pulse modulator also contains a clock pulse generator 1, an integrator 2 connected in series, a voltage comparator 3 and a key amplifier 4

A known modulator operates as follows. At the output of the GTI 1, a sequence of square-wave square-wave pulses without a constant component is formed (IT, Fig. 3.1). This signal is integrated by integrator 2, at the output of which a symmetrical sawtooth voltage is formed (Un, Fig. 3.2), whose amplitude

10 .. G | T Un UTy,

(one)

where DT is the amplitude of the clock pulses; T - the period of their following; m is the integration integrator constant 2.

By comparing this voltage with the input signal (UBx, Fig. 3.2), the output of the comparator 3 generates a sequence of pulses, the duration of which is proportional to the magnitude of the input signal (Fig. 3.3). In the absence of an input low-frequency signal, the sawtooth voltage is compared to a level close to zero, and a voltage close to the square wave is formed at the output of the voltage comparator 3, which determines the level of the constant component at the output of the modulator, i.e. . carrier level in a radio transmitter. Next, the pulse signal of the voltage comparator 3 is amplified by the power of the CCM 4, and the low-pass filter included in the CCM is extracted from the pulse signal amplified by the power

useful low frequency component.

The disadvantage of the known pulse-width modulator is that the amplitude of the input low-frequency signal should not

exceed the amplitudes of the sawtooth voltage, because otherwise there is an overmodulation of the pulse duration, which leads to distortion of the signal at the modulator output. therefore

The use of a known pulse-width modulator in broadcast or communicating radio-transmitting devices requires additional manual or automatic gain control at the modulator input when the maximum level of the input signal changes.

The aim of the invention is to increase the modulation confidence by reducing the distortion of the output signal.

The goal is achieved in a device containing a GTI and an integrator connected in series, a voltage comparator and KUM, the second input of the voltage comparator being the input and the output of the KUM being the device output, an amplitude modulator, a subtractor, a pulse shaper and connected in series time comparator, low pass filter and peak detector. In this case, the output of the amplitude modulator is connected to the input of the integrator, its control input is connected to the output of the subtractive unit, and the signal input is connected to the output of the GTI and the input form. pulse bodies, the output of which is connected to the first input of the time comparator, the second input of which is connected to the output of the voltage comparator. The first and second inputs of the subtracting unit are connected to the fixed potential bus and the output of the peak detector, respectively.

The introduction of the listed blocks and connections allows you to adjust the amplitude of the sawtooth voltage when the amplitude of the input signal varies by using information about the pulse duration at the output of the voltage comparator. This eliminates overmodulation and eliminates distortion of the output signal of the modulator for large input signals.

Figure 1 and 2 shows the structural scheme of the known and proposed devices, respectively; Fig. 3 shows diagrams for the operation of devices.

The proposed pulse-width modulator (FIG. 2) contains a GTI 1, an integrator 2 connected in series, a voltage comparator 3, the second input of which is the device input, and KUM 4, as well as an amplitude modulator 5 (AM), subtraction unit 6 (WB) and bus 7 fixed potential. The output of AM 5 is connected to the input of the integrator 2, and the signal input of AM 5 is connected to the output of the GTI 1 and the input of the driver 8 pulses. The control input 5 is connected to output B b, the first input of which is connected to the fixed potential bus 7. The proposed device also contains a serially connected time comparator 9, a low-pass filter 10 and a peak detector 11, the output of which is connected to the second input - WB 6, while the output of the driver 8 is connected to the first input of the time comparator 9, the second input of which is connected to the output of the comparator 3 voltages.

GTI 1 generates a pulse signal 5 of type square wave and can be assembled on the basis of a double-frequency oscillator and a counting trigger.

KUM 4 is performed according to a standard scheme with an LC low-pass filter at the output. KUM is used to increase the signal power from the PWM and to extract from it the useful HF-component in the main.

AM 5 adjusts (in accordance with the voltage Uy at its control input) the amplitude of rectangular pulses fed through it from the GTI 1 output to the integrator 2 input and can be made on the basis of a transistor switch whose power supply voltage changes to 0 according to the voltage coming from the output of VB 6 to the control one, input AM 5. As a result, the amplitude of the voltage UT at the output, AM5i-g iy / 2, where Uy is the output voltage VB 6.

5 The latter can be implemented on the basis of an operational amplifier. If there is no voltage at the input of the WB 6, its output voltage is Uy ERr / R2. The corresponding voltage at the output of the integrator is 0 torus 2

,, 1 T, T E R.1

Uno

1 T, T 2

R2

where m is the integration integrator constant 2.

When a control signal 1) appears at the input 2 of VB 6, the positive polarity from the output of the peak detector 11, the amplitude of the pulses at the output of VB 6 becomes

iw id () + E,

and the amplitude of the pulses at the output of AM 5

UT - 0.5 UA (1 + Ri / R2) + ERi / R2. In this case, in accordance with (1), the amplitude of the sawtooth Un at the output of the integrator 2

Un Y ZTS ERl + Ufl (Rl + R2) - P) Thus, using AM 5 and VB 6, the amplitude of the sawtooth voltage at the output of integrator 2 is increased according to the law (3) from a fixed Uno level (see formula (2) ).

The pulse shaper 8 is used to form short pulses of length At, the front of which corresponds to the pulse decay at the GTI output 1 (Figs. 3 and 4), can be performed on the OR-NOT gates according to the standard scheme.

The pulse duration, At, is determined by the RC time constant.

The time comparator 9 can be made on the basis of a D-flip-flop, the D-input of which receives a pulse signal Uk with PWM from the output of the voltage comparator 3 (Fig.3.3), and to the counting input - short pulses Atf of the length At from the output of the forcing device 8 pulses (Fig.3.4). If the pulse duration at the output of the voltage comparator 3 is greater than 2At, then the voltage at the output of the trigger is zero. If tw becomes less than 2At, then a logic unit signal appears at the output of the trigger.

Peak detector 11 detects the voltage taken from the output of the filter 10 (Fig. 3.6), for a time determined by the constant discharge of the detector capacitance. This time determines the recovery time of the initial amplitude of the sawtooth voltage.

The proposed modulator works as follows.

With a small input signal, when the depth of the At At B modulation is m tmax, i.e.

when the duration of the pulses at the output of the comparator 3 voltage is greater than 2 At ,. the signal at the output of the temporary comparator 9 is equal to a logical zero (Fig.3.5), since at the moment when the short pulse from the output of the driver 8 is pulsed to the counting input of the trigger 9 (Fig.3.4), the signal of the logical unit arrives at the D input of the trigger (Fig .3.3). As a result, there are no signals at the output of the filter 10 and the peak detector 11, and, as follows from (3), the amplitude of the sawtooth voltage at the output of the integrator 2 is minimal and does not change. Therefore, with small signals (t tmax), the proposed device operates similarly to the known device.

When the amplitude of the input signal UBx is higher than the nominal (t tmax) (Fig.3.3), the second input (0-input) of the time comparator 9 receives a logical zero signal and a logical unit signal appears on the inverse output of the D-flip-flop (Fig.3.5 ), which causes a voltage increase at the output of the filter 10 and at the output of the peak detector 11 (Fig. 3.6). This leads, as follows from (3), to an increase in Un of the sawtooth voltage (Fig. 3.2), which continues until

The comparator of the 3 voltages does not appear pulses with so on and 2A t, i.e. overmodulation is eliminated, and therefore, at the output of time comparator 9, the signal becomes

zero (Fig.3.5). After that, the signal at the output of the peak detector 11 begins to slowly decrease, and the amplitude of the sawtooth voltage slowly restores its initial minimum value. If a

exceeding the amplitude of the input signal of a nominal value is of a long-term nature, then the value of the amplitude of the sawtooth voltage is established, corresponding to the absence of overmodulation

at the output of the device.

Thus, the proposed device, compared with the known device, has the limitation threshold invariance for any destabilizing factors and does not have any setting items, since the information on the modulation in the proposed device is removed from the output of the voltage comparator 3, i.e. by the real depth of PWM, and not by the value of the input

LF signal.

Claims (1)

A pulse width modulator comprising a clock pulse generator and an integrator, a voltage comparator and a key power amplifier connected in series, the second input of the voltage comparator is connected to the input bus and the output of the key power amplifier is connected to the output bus, characterized in that, in order to increase the modulation accuracy due to distortion output signal, amplitude modulator, subtraction unit, a fixed potential bus, a pulse shaper and a time comparator connected in series, a low-pass filter and a peak detector, the first input of the subtractive unit being connected with a fixed potential bus, and its second input is with a peak detector output, the amplitude modulator output is connected to the integrator input, its control input is connected to the output of the subtractive unit, and the signal input is connected to the output of the clock generator and the pulse driver input, the output of which connected to the first input of the temporary comparator, the second input of which is connected to the output voltage comparator. zh