SU1721440A2 - Indicating device - Google Patents

Abstract

The invention relates to indicator and recording devices, can be used to indicate fast-changing processes, in particular for visual and automatic analysis and recording of parameters of wideband signals with linear frequency modulation, and is an improvement of the device along. USSR № 1606859. The purpose of the invention is to accelerate and improve the accuracy of the display. The indicator device contains a receiving antenna 1, a broadband amplifier 2, a frequency detector 3, a differentiating circuit 4 and 6, CRT 5, a sweep generator 7, a narrowband filter 8, an amplitude detector 9, elements 10 and 14, counters 11 and 15, and a 12-generator pulses, the valve 13, the arithmetic unit 16 and the block 17 registration. 2 Il.

Description

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The invention relates to indicator and recording devices, can be used to indicate rapidly changing processes, in particular for visual and automatic analysis and recording of the parameters of wideband signals with linear frequency modulation (LFM), and is an improvement of the invention according to the author. No. 1606859.

The known indicator device provides only a visual assessment of the parameters of the received chirp signal and does not allow to measure them automatically.

The aim of the invention is to accelerate and improve the accuracy of the display.

A series-connected narrow-band filter, an input connected to the output of a broadband amplifier, an amplitude detector, the first And element and the first counter, a generator of counting pulses, a valve, a second And element, a second counter, an arithmetic unit and a registration block, the output of the first differentiating circuit is connected through the second element And, the second counter to the first inputs of the arithmetic unit and the registration unit, the second inputs of which are connected to the output of the first counter, the output of the second differentiating center pi is connected through the count pulse generator drugi- E input elements and is connected via a valve to the second input of the counter, and the output of the arithmetic unit connected to the third input of the recording unit.

FIG. 1 shows a block diagram of the proposed device; in fig. 2 - timing diagrams for the operation of the device.

The indicator device contains a series-connected receiving antenna 1. a wideband amplifier 2, a frequency detector 3, a first differentiating circuit 4, a cathode-ray tube (CRT) 5, a second differentiating circuit 6, a sweep generator 7, and horizontal CRT plates 5 whose vertically deflecting plates are connected to the output of the first differentiating circuit 4, and also a narrow-band filter 8 connected in series, an input connected to the output of the broadband amplifier 2, an amplitude detector 9, the first element nt And 10 and the first counter 11, the generator 12 counting pulses, the valve 13, the second element And 14, the second counter 15, the arithmetic unit 16 and the block 17 registration, while the output of the first differentiating circuit 4 is connected through the second element And 14 and the second counter 15 to the first inputs of the arithmetic unit 16 and the registration unit 17,

the second inputs of which are connected to the output of the first counter 11, the output of the second differentiating circuit 6 is connected through the generator 12 counting pulses to other inputs of the elements 10 and 14 and connected through the valve 13 to the second inputs of the counters

11 and 15, and the output of the arithmetic unit 16 is connected to the third input of the registration unit 17.

The device works as follows.

Received chirp signal (Fig. 2a) Uc (t) Vc cos (2 rc fct + lu t + pc),

about t tp,

where Vc, fc, pc, Tn are the amplitude, the initial frequency, the initial phase and the duration of the signal (pulse), respectively;

Afn y - the rate of change of frequency

inside the pulse (Fig. 26);

Ddd is the frequency deviation from the output of antenna 1 through a broadband amplifier 2 to the input of frequency detector 3, the output of which forms a video pulse (Fig. 2c), the shape of which corresponds to the chirp law (Fig. 26). The specified video impulse from the output of the frequency detector 3 is fed to the input of the differentiating circuit 4, the output pulse (Fig. 2d) of which is fed to the vertical electrode of the CRT 5 and the input of the second differentiating circuit 6. At the output of the latter, short polarized pulses are produced (Fig. 2e), a positive short pulse is triggered,. while the negative short pulse closes the sweep generator 7 and the generator

12 counting pulses. The generated sawtooth voltage (Fig. 2e) is used as a sweep voltage and goes to the horizontal deflection plates of the CRT 5. On the CRT 5 screen a pulse (Fig. 2d) is formed, the duration of which is proportional to the duration of the perceived chirp signal, the amplitude is proportional the rate of change of frequency y inside the pulse, and the area of the oscillogram is proportional to the frequency deviation Dtd (D td y Gp) of the received chirp signal.

For a visual assessment of the parameters of the received chirp signal, a time-frequency grid is plotted on the screen of the CRT 5.

The received chirp signal (Fig. 2a) from the output of the wideband amplifier 2 simultaneously arrives at the input of the narrowband filter 8, at the output of which

radio pulse (Fig. 2h), the duration of which is determined by the ratio

Tf y

where Afcfi is the bandwidth of the narrowband filter.

The generated radio pulse is fed to the input of an amplitude detector 9, the output of which produces a video pulse (Fig. 2i). Video pulses (fig. 2d, i) from the outputs of the differentiating circuit 4 and the amplitude detector 9 are fed to the first inputs of the elements 10 and 14, respectively, to the second inputs of which counting pulses are output from the generator 12 counting pulses. At the outputs of the And 10 and 14 elements, counting pulses are formed (Fig. 2k, l), the number of which is y and pa is proportional to the duration of the hp received chirp signal (n tn) and the duration of the Tf of the output video pulse of the amplitude detector 9 (pa Tf). The counting pulses from the outputs of the elements 10 and 14 are counted by the counters 11 and 15 and are fed to the corresponding inputs of the arithmetic unit 16 and the registration unit 17. In the arithmetic unit 16, the deviation of the frequency D | d (A Td y tn) in the digital code is determined and fed to the third input of the recording unit 17. Consequently, in block 17 of registration, the parameters (the rate of change of frequency y inside the pulse, the duration of the pulse mn and the frequency deviation Affl) of the received chirp signal are recorded in the digital code.

The resignable short pulses (Fig. 2d) from the output of the second differentiating circuit 6 simultaneously arrive at the input of the valve 13, which passes only positive short pulses (Fig. 2g). These pulses go to the inputs.

reset the counters 11 and 15, ensuring their readiness for work.

Thus, the proposed device in comparison with the known provides not only visual, but also automatic analysis and recording of the parameters of the received chirp signal. At the same time, the automatic analysis and recording of the parameters of the received chirp signal allows us to accelerate and improve the accuracy of the indication of these parameters. In addition, the presentation of the results of the automatic analysis of the parameters of the received chirp signal in a digital code provides the opportunity for their long-term storage, transmission over long distances via communication channels, and interfacing with computer technology.

Claims (1)

Claims of the invention. Indicator device according to auth.St. No. 1606859, characterized in that, in order to accelerate and improve the accuracy of the indication, a narrowband filter connected in series, an input connected to the output of a wideband amplifier, an amplitude detector, a first And element and a first counter, a counting pulse generator, a valve, a second And element, are introduced into it. The second counter, the arithmetic unit and the registration unit, while the output of the first differentiating circuit is connected through the second element I and the second counter to the first inputs of the arithmetic unit and the registration unit, the second inputs of which connected to the output of the first counter, the output of the second differentiating circuit is connected through the generator of counting pulses to the other inputs of the elements I and connected through a valve to the second inputs of the counters, and the output of the arithmetic unit is connected to the third input of the registration unit. A Uc (t; Fig: 2