SU1706058A1 - Device for automatic focusing of electron beam of cathode-ray storage tube - Google Patents

Abstract

The invention relates to automation, measurement technology and can be used to automatically adjust the focusing current of the storage cathode ray tubes (SELT). The purpose of the invention is to improve the accuracy of electron beam focusing. The device contains a ZELT I unit, a focusing current source 2, a D / A converter 3. a control unit 4, an amplifier 5. a filter 6. amplitude detector 7. a delay unit 8. a mark pulse extraction unit 9, a time-amplitude converter 10, a pulse counter I I, a division unit 12, an analog-to-digital converter 13, a memory register 14, a comparison unit 15. The device improves the focusing accuracy of the electron beam due to a more accurate consideration of the waveform of the mark from the output of the ZELT block. 2 Il.

Description

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The invention relates to automation and measurement technology and can be used to automatically adjust the focusing current of storage cathode-ray tubes (ZELT).

The purpose of the invention is to improve the accuracy of electron beam focusing.

FIG. Figure 1 shows the structural electrical circuit of the device for automagically focusing the electron beam of the electron-beam magnetization laser; in fig. 2 is a control block diagram.

A device for automatic focusing of an electron beam ZELT contains a block I ZELT, a focusing source 2 (GoF), a digital-to-analog converter (CAC) 3, a control unit 4, an amplifier 5, a filter 6, an amplitude detector 7, a delay unit K, a pulse extraction unit 9 marks, converter 10 time-amplitude, pulse counter 11, division unit 12, schalog-digital converter (ACG1) 13, memory register 14 and comparison unit 15, the delay unit K) 18 being part of control unit 4, the first. element 19, trigger 20, inverter 21, and second element C 22.

The device works as follows.

In the initial state, the digital equivalent of the initial focusing current of the SELT is recorded in the counter 1 1 from the pre-set input. The level "1 at the output of the trigger 20 permits the passage of pulses from the output of the third delay element 18 to the input of the trigger 20 through the first element 1 19. The level" O at the output of the inverter 21 and the passage of pulses from the output of the second delay element 17 to the first input of the comparison unit 15 through the second element and 22.

C. The arrival of a pulse from the start input to the second input of the ZELT unit 1 on the ZELT target records a test signal line with an inclination of 45 to the horizontal axis. The potential terrain is read when the ZELT target is scanned with an electron beam in a vertical line. When the electron beam crosses the potential terrain line, a level signal is generated, which is amplified in amplifier 5. Band-pass filter 6 eliminates high-frequency and low-frequency interferences in the level signal. The delay unit 8 delays the signal of a mark for a time equal to the duration of this signal without changing its shape. The signal from the output of the filter 6 is fed to the first input of the amplitude detector 7. At the second output of the amplitude detector 7, a voltage of 1 / l is formed, equal to the amplitude of the level signal, and a voltage equal to half the amplitude of the level signal is formed at the first input. At the first input of the pulse extraction unit 9, the delayed signal of the elevation arrives, the second level on

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yarn corresponding to half the amplitude of the signal mark. At the output of the pulse extraction block 9, a pulse is formed — a pulse of a stabler amplitude with a duration equal to the duration of the mark signal at a level of 0.5. This pulse arrives at the converter 10 time-amplitude, at the output of which a constant voltage Ur is formed, the amplitude of which is proportional to the duration of the pulse pulse. This voltage is supplied to the second input of dividing unit 12, the first input of which is supplied with voltage U + from the output of amplitude detector 7. At the output of dividing unit 12, a focus quality voltage U is formed, equal to the ratio of the voltages UT and BD (UH-UT / / Uj). Best focus is achieved with a minimum value of focus quality voltage. The focus quality voltage is converted by the ADC 13 into digital form under the influence of a pulse coming from the control unit 4. This pulse is generated at the output of the first delay element 16. The first delay element 16 delays the start pulse by the time required for the voltage UK to appear at the output of dividing unit 12. From the output of the first delay element 16, a pulse arrives at the second delay element 17, which delays the pulse for a time equal to the conversion time of the A / D converter 13. From the output of the second delay element 17, the pulse arrives at the second input of the second element And 22, the input of the third delay element 18, the second inputs of the time-amplitude converter and the amplitude detector 7 for restoring them, as well as the first input of the counter 1 1 for switching it to the next state. Since at the first input of the second element And 22 there is a level "O", the first pulse from the output of the second delay element 17 does not pass to the first input of the comparison unit 15. From the output of the third delay element 18, a delayed pulse arrives at the first input of the memory register 14, into which a digital code is written from the output of the ADC 13. This pulse, through the first element 19, arrives at the flip-flop 20, which switches to the "O" state. The level "O from the output of the trigger 20 is supplied to the second input of the first element I 19, which leads to the prohibition of the passage of pulses from the output of the third element 18 to the input of the trigger 20 and to block its switching. At the same time, the level "1 from the output of the inverter 21 permits the passage of pulses from the output of the delay element 17 through the second element 22 to the first input of the comparison unit 15.

The output code of the counter 11 is converted by the DAC 3 into a voltage that is fed to the 2 FT source. In this case, a new value of the current of the focusing electrodes of the block 1 ZE / 1T is set.

When the next pulse arrives at the start input, a mark signal is generated at the output of the ZELT block, the parameters of which (amplitude and duration) depend on the FT value. At the output of dividing unit 12, the current value of the focus quality voltage U is formed, which is converted into digital form by means of A / D converter 3 and fed to the second input of comparator unit 15.

At the first input of the comparison unit 15, the previous value of the digital quality code of the adjustment from the output of the memory register 14 is supplied. The impulse from control unit 4 compares these digital codes. After comparing the codes, the new value of the focus quality is written to the memory register 14 by the pulse coming from the control unit 4.

When optimal focus is achieved, the relation is satisfied, where UЈ is the current value of the focus quality; U f - the previous value of the focus quality. In this case, from the output of block 15 to the output of the focusing end, a signal arrives informing you that the optimum focus has been 1Ј if T (the optimization process repeats.

Claims (1)

Invention Formula A device for automatically focusing an electron beam of a storage cathode ray tube, containing therefore, the connected control unit, pulse counter, digital-to-analog converter, is the source of the focusing current, the storage cathode-ray tube unit, amplifier, filter, and amnlit bottom; detector, serially connected analog-to-digital converter. the memory register and the comparison unit, to another input of which the corresponding output of the analog-digital converter is connected, to the control input of which and to the control inputs of the memory register and the comparison unit there are connected the corresponding outputs of the control unit, characterized in that. In order to increase the focusing accuracy of the electron beam, a series-connected delay unit, a mark selection pulse block, a time-amplitude converter and a dividing block are inserted, and the output of the filter and the first additional amplitude output to the input of the delay block and the second input of the mark selection pulse block, respectively detector, the second additional output of which is connected to another input unit. division, the output of which is connected to the input 5 analog-digital converter, and the control input of the converter time amplitude is connected to the input of the pulse counter and an additional input of the amplitude detector, and the input of the control unit is connected to another input of the memory cathode-ray tube unit and is a signal input The setting of which is the corresponding PULSE counter input. To ADC / / start /. Amplitude detector, cvefnvt / xt /, time lagger - a & register memory - compare