SU1646021A1 - Device for controlling reactive power compensator - Google Patents

Description

t

(21) 4644066/07

(22) 01.31.89

(46) 04.30.91. Bullo K ° 16 (75) V.V.Butko

(53) 621.316.925 (088.8)

(56) USSR Copyright Certificate No. 1314415, CL „H 02 J 3/18. 1985.

(54) DEVICE FOR CONTROLLING THE COMPENSATOR OF REACTIVE POWER

(57) The invention relates to electrical engineering and can be used in systems of reactive power compensation of electrical networks. The purpose of the invention is to reduce distortion of the sinusoidal shape of the AC network voltage by improving the accuracy of controlling the balance of reactive power. The goal is achieved by. by introducing comparators 7 and 8 currents, which have two antiphase outputs of inductive and capacitive

 channels, respectively. The current comparators have dead zones, and this eliminates false triggering of the regulator 1. In addition, the output of the voltage comparator 9 is connected to the input of the shaper 10 of the leading edge of the voltage comparator, the output of which is connected to the first inputs of logic circuits 2 and 11 and 12, and to the second, the outputs of the current comparator 7 and 8 of the inductive and capacitive channels. the induction channel matching logic circuit is connected to the summing input of the reversible counter 13, and the output of the capacitance logic circuit is connected to the subtracting input of the reversing counter that controls the regulator 1. 3 silt

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FIG. one

The invention relates to electrical engineering and is intended for use in reactive power compensation systems of electrical networks.

The aim of the invention is to reduce the distortion of the sinusoidal shape of the voltage of the AC network by improving the accuracy of controlling the balance of reactive power.

Fig about 1 shows the functional diagram of the device; in fig. 2 - schematic diagram of the current comparator; Fig 3 - timing charts of the device.

The device contains a regulator 1 discrete action, connected in parallel with the active-inductive load 2 and in series with the current sensor 3, a voltage sensor 4 connected to the same phase as the current sensor 3, resistors 5 and 6, necessary for matching the input and output resistances of current sensor 3 and current comparators 7 and 8, voltage comparator 9, driver 10 pulses, two two-input logic elements 2I 11 and 12 of the selection of capacitive and inductive components of the network current and reversible counter 13 o

Comparators 7 and 8 of current are identical and contain in each channel separation capacitors 14 and 15, resistors 16 and 17, and zener diodes 18 and 19 limiting input signals during overloads and starting load currents, regulators 20 and 21 of sensitivity of capacitive and inductive channels, respectively. Formers 22 and 23 rectangular pulses. And inverters 24 and 25 capacitive and inductive channels „

The time diagrams of the device operation are shown: U1 is the voltage of the phase of the AC network; U2 is the voltage at the output of the voltage comparator; U3 are the pulses formed from the leading edge of the voltage of the comparator 9; U4, U5 — antiphase voltages at the outputs of current sensor 3; U6, U7 are the voltages at the outputs of the comparators 7 and 8 of the capacitive and inductive channels; U8, U9 - signals generated at the outputs of logic circuits 2 and 11 and 12 for recording in the subtractive or summing input of the reversible counter 13.

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five

The device works as follows.

The first inputs of logic circuits 2 and 11 and 12 with a network frequency receive pulses U3, formed from the leading edge of the output voltage U2 of the comparator 9.

With the inductive nature of the load (Fig. 3, the instants of time t. And t.), The current lags behind the mains voltage and rectangular pulses U7 are formed at the output of the inductive channel comparator 8, coinciding in time with the pulses U3 from the output of the former 10, with At the time of the passage of these pulses, the logical element 2I 12 opens, the summing input of the reversing counter 13 receives a sequence of pulses U9, increasing its output binary code and the capacity of the regulator 1 until the circuit between the load 2 and regulator 1 will not come up with a reactive power balance.

Since the pulses U6 from the output of the comparator 7 in this case do not coincide in phase with the pulses U3, the logic element 2I 11 is closed at this time and there are no control pulses on the subtractive input of the counter 13.

When the input signals U4 and U5 are reduced to values limited by the sensitivity controls of the capacitive and inductive channels, the pulses U6 and U7 do not coincide with the pulses U3, the output binary code of the reversing counter 13 and the capacitance of the regulator 1 remain constant, while load 2 is kept constant and sinusoidal.

When the inductive component of the load current decreases (overcompensation), and the magnitude of the signal from the secondary winding of the current sensor 3 falls into the sensitivity zone of the capacitive channel comparator 7, the pulses U6 coincide with the output of the comparator 7 with the pulses U3, while at the subtracting input of the reversible counter 13 The control pulses U8, reducing its output binary code, restoring the balance of reactive power between the load and the regulator 1.

With the active load (Fig. 3, time t,), the rectangular signals U6 and the phase offset by the sensitivity adjusters 20 and 21 do not coincide in time with the pulses U3 and from the outputs of the logic circuits 2I 11 and 12 the write pulses into the reversible counter 13 do not come.

The use of the invention makes it possible, by improving the accuracy of adjusting the balance of reactive power, to reduce the distortion of the sinusoidal shape of the AC network voltage while at the same time reducing the losses in the power grids from the reactive component of the current and increasing the energy characteristics of the power supply systems.

Claims (1)

Invention Formula A device for controlling a reactive power compensator, comprising a discrete action regulator connected in parallel to the load, voltage and current sensors, a voltage comparator and a current comparator, a pulse driver 15 20 25 2I logic circuit, reversible-I counter, characterized in that, in order to reduce the distortion of the sinusoidal shape of the AC mains voltage by increasing the accuracy of adjusting the balance of reactive power, it is additionally equipped with a second logic circuit 2I, the second current comparator. , two resistors, the output of the voltage comparator connected to the input of the pulse driver, the output of which is connected to the first inputs of both logic circuits 2I, the inputs of the current comparators are connected to the outputs of the current sensor, to which Two series-connected resistors are connected, to the midpoint of which are common inputs of current comparators, the output of the first current comparator is connected to the second input of the first logic circuit 2I, the output of which is connected to the subtractive input of the reversing counter, the output of the second current comparator is connected to the second input of the second logic circuit 2I , the output of which is connected to the summing input of the reversible counter. from tone sensor 3 to blocks 11, K FIG. 2 Fig.Z