SU1580510A1 - Inverter - Google Patents

Abstract

The invention relates to power converter technology and can be used in a traction electric drive with asynchronous short-circuited electric motors. The goal is to improve weight and size. The inverter contains thyristors 1-6 of the main bridge, thyristors 13-18 of the reverse bridge and thyristors 7-12 of the distribution bridge. Elements 19-28 form two forced switching units. Thanks to the input voltage sensors 39 and 40 of the switching capacitors 19 and 20 and the corresponding operation logic implemented by the control unit 32-42, the adaptive nature of the charging of the switching capacitors is ensured. 8 il.

Description

The invention relates to a converter technique used mainly in a traction electric drive with asynchronous short-circuited electric motors.

The aim of the invention is to improve the weight and size indicators.

FIG. 1 is a schematic diagram of the proposed inverter; in fig. 2 - pulse timing diagrams; in FIG. 3 - the known circuit of the delay unit and the circuit of connecting the elements implementing the logic function Prohibition, with the elements common to the formers of the switching on of the reverse controlled gates and the main thyristors; Fig. 4 is a wiring diagram of the elements of the actual pulse driver of switching on the main thyristors; in fig. 5 is a diagram of the connections of the actual pulse driver of the activation of the reverse controlled gates; in fig. 6 is a diagram of a driver for driving control pulses with switching lockable thyristors; in fig. 7 is a simplified circuit of a control pulse amplifier with lockable thyristors; in FIG. 8 is a timing diagram illustrating the operation of the circuits in FIG. 6 and 7.

The inverter circuit (Fig. 1) contains a main thyristor bridge 1-6, a bridge thyristor distribution 7-12, and a bridge of reverse controlled valves 13-18. All bridges are interconnected on the AC side. The opposite poles of the main thyristor bridges, 1-6 and inverse-controlled gates 13-18 are interconnected. Switching capacitors 19, 20 and switching locked thyristors 21, 22 form two successive chains connected between the opposite poles of the direct current of the main bridges 1-6 and distribution 7-12 thyristors.

Charge diodes 23 and 24, respectively, are connected in parallel to the switching thyristors 21 and 22. Auxiliary sources 25 and 26 are connected to switching capacitors 19 and 20, respectively, through dozbrir thyristors 27 and 28, respectively. The voltage of sources 25 and 26 is stable. The separation diode 29 is connected between the poles of the bridge distribution thyristors 7-12. The inverter power supply 30 is connected to the poles of main bridges 1-6 and reverse 13-18 thyristors. The magnitude of the voltage of the power source 30 may vary widely. Accepted that source 30 has inverse conductivity. In a traction electric drive locomotive as a source

30 power supply system is used the main synchronous generator - rectifier - capacitor filter, as auxiliary sources 25 and 26 the system uses an auxiliary synchronous generator - separation transformer with two secondary windings from which two diodes are fed. The load 31 is connected to the phase of the bridges of main 0-6 and distribution switch 7-12 thyristors and non-return valves 13-18. In a diesel locomotive, such a load is an asynchronous electric motor with a short-closed rotor,

5 The inverter control system contains a frequency adjuster 32 controlled by a signal Uy from the drive control system. The output signal Gr of the setter 32 is fed to the inputs 0 of the distributor 33 and the delay block 34, the output signals DI m GI of which are fed to the inputs of the drivers 35-38 of the thyristor on and off pulses. The sensors 39 and 40 of the voltage level are connected respectively to the switching capacitors 19 and 20. The output signals U19, U20 of the sensors 39 and 40, respectively, have a logic unit code with the voltage on the capacitors 19 and 20, respectively, equal to or greater than when the voltage on the capacitors is less than a predetermined level, the voltage that is set on the switching capacitor — 5, the mountain at which the sensor is activated, the voltage of the auxiliary charge sources 25 and 28 is received. Elements 41 and 42 that implement the logic function Ban, with their enable inputs 0, are connected to the output of the delay channel 6 from turning on the reverse controlled valves of the delay unit 34, and the inhibiting inputs are connected to the outputs of the sensors 39 and 40, respectively. The inputs of the elements 41 and 42 5 are connected to the inputs of the formers 37 and 38 of the switching on impulses of the reverse controlled gates 13-18, the charge thyristors 27 and 28, the main thyristors 1-6.

The inverter works as follows.

Frequency generator 2 generates clock signals Gr, the frequency of which varies depending on the control signal Uy. Distributor 5 33 outputs a series of signals DI-O and D7-12, shifted relative to each other by time T / 6 with a repetition period T 1 / f, where f is the frequency of the inverter output voltage. The signals are amplified by shaper 35, the output pulses of which

served on control electrodes of distribution thyristors 7-12, respectively. Block 34 generates a series of signals GB, Go, Sz, following each other with predetermined delay times. The duration ts of the signals GB determines the switching-on delay of the switching lockable thyristors 21 and 22 from the switching on times of the distribution thyristors 7-12. The duration, to, of the signals Go determines the delay in switching off the lockable thyristors from the moment they are turned on, i.e. determines the time allowed by the circuit to turn off the main thyristors. The duration 1p of the Gp signals determines the calculated delay for turning on the reverse controlled gates 13-18 after switching off the corresponding switching lockable thyristors 21 and 22. The true delay tM for switching on the reverse controlled gates is determined by the moment when the voltage on the corresponding switching capacitor 19 or 20 reaches sensor 39 and 40 is triggered, the output of which blocks the further passage of signal 6c using elements 41 and 42 that perform the logic function Disable. The outputs Szl and Sz of the elements 41 and 42, the outputs Di-e of the distributor 33 and the outputs GB, Go of the delay unit 34 are fed to the inputs of the drivers 36-38 of the valve control pulses. The sequence of switching on and off of the inverter valves is determined by the program shown in FIG. 2

The valve switching processes are identical at each interval and are repeated with a period of T / 6. Consider one of them, starting from the time T / 2 (Fig. 2). At the time T / 2, the switching-on pulse of the main thyristor 1 is removed and the switching thyristor 7 is turned on, thereby preparing the switching-off circuit of the main thyristor 1. Switching the switching thyristor with delay tB 21 and the discharge of the switching capacitor across the circuit begins. Capacitor 19 - diode 29

-distribution thyristor 7 - main thyristor 1 - switching thyristor 21

capacitor 19. The voltage across capacitor 19 decreases below a predetermined level, as a result of which the output signal Dig of sensor 39 becomes zero. The discharge current of the capacitor 19 displaces the load current from the main thyristor 1 and the latter is switched off. Switched load current flows through the circuit source 30 - thyristor 21 - capacitor 19 - diode 29 and thyristor 7 - load 31 - thyristor 2 - source 30. After the time t0 has elapsed, the switching thyristor 21 switches off in control. Switched load current 5 closes in circuit capacitor 20 - thyristor 7 - load 31 - thyristor 2 - diode 24 - capacitor 20. In this case, capacitor 20 is charged and, when the voltage across it reaches a predetermined level, is triggered

10, the sensor 40 and outputs a signal U20, which is applied to the inhibit input element 42, as a result of which the G3 signal stops flowing. The 6z signal thus generated is true.

5 by turning on the next reverse controlled valve 13. At the end of the signal C3, the drivers 37 and 38 produce pulses F4, Fia, F28 for switching on valves 4, 13 and 28, respectively. Insofar as

0 the voltage of the auxiliary source 26 is less than a predetermined voltage level on the capacitor 20, the inclusion of the dosage of the bottom thyristor 28 does not lead to a change in the voltage level on the switching voltage

5 to a capacitor 20. Since in the actual circuit the source 26 contains a rectifier at the output, the inclusion of a discharging thyristor 28, to which a reverse voltage is applied, is equal to the difference of the voltages

0 to the capacitor 20 and the source 26, remains without consequences and the CL of the thyristor 28 itself. The reactive load current is closed in the backward-controlled gate 13 - the load 31 - the main thyristor 2 - the gate 13

5 until the current drops to zero, after which the thyristor 13 is turned off, the load current in the switched phase changes direction and flows through the main thyristor 4. In FIG. 3-7 shows the nodes almost

0 implemented inverter control system.

FIG. 3, elements 43-45 (one-shot) form a delay unit (pos. 34, fig. 1), elements 46-48 and 49-51 (four elements

5 2I-NOT) form the BAN elements (pos. 41 and 42, fig. 1), elements 52 and 53 (four elements 2ILI) and 54, 55 (four elements 2 OR-NOT) perform the summation of delays - VGi, and elements 56 and 57 (one-shot) form the signals Cu1 and Cu, which are delayed by time t and or t3 after switching off the lockable thyristors.

5 A circuit of the actual pulse generator (Fig. 4) of switching on the main thyristors 1-6 contains elements 58-60 (two switches of four inputs per output) and signal amplifiers 61-66, based on the known circuits.

The circuit of the actual pulse generator (Fig. 5) of switching on the reverse-controlled valves 13-18 and the reference thyristors 27 and 28 contains elements 67-69 (two switches of four inputs per output), elements 70-73 (four elements 2ILI), performed summation signals, and amplifiers 74-81 signals.

The control driver circuit (Fig. 6) of switching lockable thyristors 21 and 22 (pos. 36. Fig. 1) contains element 82 (element 2-2-2-ЗИ-4ИЛЙ-НЕ) and element 83 (four elements 2ИЛИ-НЕ ), revealing the inter-chambers of coincidence and mismatch of the signals DL Oz, Ds. Elements 84 and 85 (one-shot) form the signals GB and Go, respectively, which define the duration of the on and off pulses of lockable thyristors. The distribution and conversion of the signals VDi.3.5, VDus.-Ge and Co are implemented using elements 86-93 (four alemeite 2I and four elements 2 AND L AND), resulting in two series of signals Dai and D22 for control amplifiers 94 and 95 signals, which produce pulses F21 and F22, respectively. FIG. 7 shows a known circuit of a control pulse amplifier with a lockable thyristor (pos. 94, 95 in FIG. 6). The power supply 96 is connected to transformers 97 and 98 through transistors 99-102 and resistor 103. The output windings of transformers 97 and 98 are connected to the control electrodes of the lockable thyristor 104 through forming chains. The forming circuits contain thyristor 105, diodes 106 and 107, resistors 108-111 and capacitor 112,

The operation of the switching pulse thyristor control pulse generator (Fig. 6) together with the amplifiers (Fig. 7) is illustrated by the diagrams in Fig. 8. With a delay of time ts, signals DI (I 21, 22) are generated, which turn on transistor 99, and DI, which turn on transistor 100, as a result of which a positive turn-on momentum of a lockable thyristor is generated. At the end of the signal, DI transistor 99 shuts off, the transistor 100 remains on, so that the lockable thyristor is kept in the on state. At the end of the DI signal, the transistor 100 is turned off, the DS and the OL signals are generated, which turn on the transistors 101 and 102, respectively, as well as the thyristor 104, resulting in a negative turn-off pulse of the lockable thyristor. At the end of the DI signal

the transistor 101 is turned off, the transistor 102 remains on, so that the lockable thyristor is maintained in the off state, etc.

The dosage and switching capacitors from the auxiliary source do not occur in the normal long-term recovery mode of the drive. From the auxiliary power the power consumed

0 only when the inverter is started for the initial single charge of the switching capacitors. The need for a tir.noMOi atelier source can also arise when the normal

5 of the drive, for example, with a sharp reset and load recovery, coinciding in time with switching processes. Episodic power consumption from aspomodelone source

0 will reduce its mass and volume. Thus, in a known inverter, the power of the auxiliary source — zgo source is approximately 0.4% of the installed power of the inverter, which gives 0.7% of the volume of auxiliary equipment of the volume of the active parts of the inverter. The proposed technical solution allows reducing the volume of auxiliary equipment of the dosage and up to 0.3% of the volume. Additional effect from

The use of the invention is to increase the reliability of the inverter by eliminating the dependence of the inverter on the state of the source of the dose.

five

Claims (1)

Claims of Invention An inverter comprising main and reverse thyristor bridges interconnected, respectively, with alternating current and direct current leads, shunded by a separating diode at direct current terminals, a distribution thyristor bridge connected 5 reverse bridges, switching circuits between opposite ends of the direct current of the main and distribution bridges switching circuits in the form of serially connected switching capacitors, shunted by a controlled source of charging, and switching lockable thyristor, shunted by a counter-activated charging diode, control unit including successively interconnected frequency master, pulse distributor and on / off pulse shapers switching thyristors and thyristors of the main, reverse and distribution bridges, as well as a unit of corresponding delays for switching on and off switching thyristors and thyristors of the main and reverse bridges, connected between the frequency setting unit and the corresponding pulse shapers, characterized in that, in order to improve the weight and size parameters, it is equipped with threshold sensors the voltage level on the switching capacitors and connected to their outputs by the elements that perform the logic function; Prevent the on delay of switching on the thyristors of the reverse and main bridges when the voltage on the switching capacitors exceeds a given level. Fie.2 FogZ l t Figm