SU1547027A1 - Device for reading information - Google Patents

Abstract

The invention relates to computing, namely, memory devices, and can be used in magnetic RAM and ROM as a read unit. The purpose of the invention is to increase the noise immunity-is achieved by the introduction of a compensating element, a limiter and an integrating capacitor, as well as the implementation of a delay element adjustable. In the read mode, input 9 has a high potential, and input 10 has a low potential, delay element 2 operates with a short delay time, and the device quickly processes changes in the potential of input 8. After the transient processes are completed, a low potential appears at input 9 and the time switches delay, which is approximately equal to the duration of the input signal. Upon completion of the switching of the delay time, an input signal of a low amplitude negative polarity is input to input 8. Differential amplifier (DL) 3 amplifies the difference between the non-delayed and delayed signals. The amplified signal is fed to the inputs of the DC restoration element 5 and the limiter 4, the limit level of which is chosen so that the useful signal is not limited. Element 5 provides the suppression of the potential due to the mismatch of the emitter base voltage of the pair of transistors 13 and 19, 25 and 26 of the DMD. When voltage is applied to the selector 7, it is compared with a threshold, above which a negative pulse of large amplitude appears at the output of the selector 7, which corresponds to a single state of the storage cell. 1 hp f-ly, 2 ill.

Description

due to the voltage mismatch of the emitter base of the pair of transistors 13 and 19, 25 and 26 of the DME. When voltage is applied to the selector 7, it is compared with the threshold above which

At the output of the selector 7, a large negative amplitude pulse appears, which corresponds to a single state of the storage cell of the storage device .1 Cp f-ly, 2 ill.

The invention relates to computing technology, in particular, to storage devices, and can be used in operational and permanent magnetic storage devices as a unit for reading information.

The purpose of the invention is to improve the noise immunity of the device.

Figure 1 shows a functional diagram of the device proposed in Figure 2 - timing diagrams explaining the operation of the device.

The device contains a compensating element 1, a delay element 2, a differential amplifier 35, a limiter 4, a restoration element 5 of a constant component of the signal, an integrating capacitor 6, an amplitude selector 7, a device information input 8, a device delay control input 9, a gating input 10 devices, output 11 devices.

The compensating element 1 is made in the form of an emitter follower on transistors 12 and 13, the load circuit of which includes adjustable current sources on transistors 14-17 and a limiting resistor 18

The delay element 2 is made on the emitter follower on the transistor 19, the load circuit of which includes a transistor 20, a capacitor 21, resistors 22 and 23 and a transistor 24.

Differential amplifier 3 is made on transistors 25 and 26, re, - resistors 27 and 28 and current generator 29.

The limiter 4 is made on the diodes 30 and 31.

The constant-recovery element 5 of the signal is implemented on transistors 32-34, resistors 35-41, and capacitor 42. Amplitude selector 7 is performed on transistors 42-44, current generators 45 and 46, and resistor 47.

The device works as follows.

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At the beginning of the read cycle, a column (not shown) is selected, while a high potential appears at the input 9 (plot 1 in Fig. 2), and a low potential appears at the input 10 (plot 3 in Fig. 2). The delay element 2 operates with a short delay time and the device quickly processes changes in the potential of input 8. After the transient processes have ended, a low potential appears at input 9 (plot 1 in Fig. 2) and the delay time is switched. The principle of changing the delay time and operation of the compensating element 1 is as follows. When a low potential appears at the input 9 (plot 1 in Fig. 2), the transistor 24 switches to the cut-off mode. The current of the current sources at transistors 15 and 20 drops sharply to a lower value determined by resistor 23. The discharge time constant of capacitor 21 increases significantly, which determines the delay time at transistors 19 and 20 for negative pulses. The delay time of element 2 is approximately equal to the duration of the input signal. When the current sources change in transistors 15 and 20, the voltage on the inputs of the differential amplifier 3 changes by the same amount, equal to the voltage change on the emitter-base of transistors 1J and 19. The slight increase in voltage at the input of the differential amplifier 3 is due to the speed of the transistor 13. This short differential voltage pulse at the inputs of the differential amplifier 3 is eliminated by a certain delay in the arrival of the input signal relative to the switching time of the delay time. When the current through the transistors 13 and 19 changes, the base current of these transistors changes, which can lead to a change in potential at the input. To eliminate the effect of a change in the base current of transistors 13 and 19, this change is compensated for by a proportional increase in the collector current of transistor 14. After switching the delay time to input 8, an input signal of negative polarity of small amplitude is received (plot 2 in Fig. 2). At one of the inputs of the differential amplifier 3 passes the delayed signal from the compensating element 1, and the other input of the differential amplifier 3 receives a delayed signal from the element 2 delay. Differential amplifier 3 amplifies the difference between unused and delayed signals. The amplified signal from the differential amplifier 3 is fed to the input of the DC element 5 of the signal and the limiter 4. The level of the limitation is chosen so that the useful signal is not limited, and the noise and high frequency interference is limited to the level of the useful signal. Element 5 provides the suppression of the potential due to voltage mismatch emitter-base pairs of transistors 13 and 19 and transistors 25 and 26 of differential amplifier 3, as well as the temperature drift of these voltages. The input 10 receives a strobe signal, which arrives with some delay relative to the input signal (plot 3 in figure 2). Element 5 further amplifies

signal to ensure the operation of the amplitude selector 7. The gain of the element 5 depends on the amplitude of the strobe signal at input 10. With the arrival of the strobe at the input 10, the input of the integrating capacitor 6 begins with the input signal (plot 4 in figure 2). Integrating capacitor 6 provides filtering for limited high-frequency noise and interference. The linearly increasing voltage between the inputs of the amplitude selector 7 is compared with the threshold. When the threshold at the output 11 of the amplitude selector 7 is exceeded, a large negative amplitude pulse appears (plot 5 in Fig. 2), which corresponds to the unit state of the storage cell (not shown). After the end of the strobe pulse input

10, the integrating capacitor 6 is discharged. When a high potential appears at the input 9, the delay element 2 is switched over

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work with malm delay time. The threshold of the amplitude selector 7 depends on the gain of the element 5, since the gain of the element 5 is controlled by the amplitude of the pulse at the input 10.

Thus, the introduction of a compensating element, a limiter, an integrating capacitor, and the execution of a delayed element into the readout device allows increasing the device’s resistance to noise and high frequency noise by increasing the speed of the input circuits and accumulating charge on the integrating capacitor. scheme with several switchable columns, since transients are significantly accelerated when switching columns of information storage .

Claims (2)

1. An information reading device comprising a delay element, the output of which is connected to the first input of a differential amplifier, a restoration element of a constant component of the signal, the first information input of which is connected to the first output of a differential amplifier, an amplitude selector, the first information input of which is connected to the first output of the element reconstructing the constant component of the signal, the gate input of which is the gate input of the device, the output of the amplitude selector is in device, characterized in that, in order to increase the noise immunity of the device, a compensating element, a limiter and an integrating capacitor, the plates of which are connected to the outputs of the DC element of the signal, are entered into it, the information input of the compensating element is the information input of the device, the second input of the differential amplifier is connected to the first output of the compensating element, the second output of which is connected to the input of the delay element, the outputs are differential an amplifier connected to the inputs-outputs of the limiter, the second output dif0 five 0 five 0 five A potential amplifier is connected to the second information input of a DC element of the restoration of the signal, the second output of which is connected to the second information input of an amplitude selector, the input Plot 1 6A od9 Epurel Log 2 Plot 3 dkhyo73 Epures U C1S plots output controlling the delay time of the delay element is the input controlling the delay time of the devices. 2. The device according to claim 1, characterized in that the delay element is adjustable. FIG. 2